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Groups > linux.kernel > #1246550 > unrolled thread
| Started by | "Suzuki K. Poulose" <suzuki.poulose@arm.com> |
|---|---|
| First post | 2015-10-14 13:30 +0200 |
| Last post | 2015-10-14 19:20 +0200 |
| Articles | 12 — 5 participants |
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[PATCHv3 00/11] arm64: 16K translation granule support "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-14 13:30 +0200
[PATCHv3 07/11] arm64: Kconfig: Fix help text about AArch32 support with 64K pages "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-14 13:30 +0200
Re: [PATCHv3 07/11] arm64: Kconfig: Fix help text about AArch32 support with 64K pages Mark Rutland <mark.rutland@arm.com> - 2015-10-14 19:20 +0200
[PATCHv3 10/11] arm64: Add 16K page size support "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-14 13:30 +0200
Re: [PATCHv3 10/11] arm64: Add 16K page size support Jeremy Linton <jeremy.linton@arm.com> - 2015-10-14 17:50 +0200
Re: [PATCHv3 10/11] arm64: Add 16K page size support "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-10-14 18:00 +0200
Re: [PATCHv3 10/11] arm64: Add 16K page size support Mark Rutland <mark.rutland@arm.com> - 2015-10-15 16:10 +0200
Re: [PATCHv3 10/11] arm64: Add 16K page size support "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-10-15 16:50 +0200
Re: [PATCHv3 10/11] arm64: Add 16K page size support Steve Capper <steve.capper@linaro.org> - 2015-10-15 17:40 +0200
Re: [PATCHv3 10/11] arm64: Add 16K page size support "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-10-15 17:50 +0200
[PATCHv3 05/11] arm64: Handle 4 level page table for swapper "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-14 13:30 +0200
Re: [PATCHv3 05/11] arm64: Handle 4 level page table for swapper Mark Rutland <mark.rutland@arm.com> - 2015-10-14 19:20 +0200
| From | "Suzuki K. Poulose" <suzuki.poulose@arm.com> |
|---|---|
| Date | 2015-10-14 13:30 +0200 |
| Subject | [PATCHv3 00/11] arm64: 16K translation granule support |
| Message-ID | <qjspQ-5qz-3@gated-at.bofh.it> |
This series enables the 16K page size support on Linux for arm64.
Adds support for 48bit VA(4 level), 47bit VA(3 level) and
36bit VA(2 level) with 16K. 16K was a late addition to the architecture
and is not implemented by all CPUs. Added a check to ensure the
selected granule size is supported by the CPU, failing which the CPU
won't proceed with booting. Also the kernel page size is added to the
kernel image header (patch from Ard).
KVM support has been dropped from this series, as we need to rewrite the
KVM stage-2 pagetable handling code to get rid of the fake page table
levels (as recommended by Christoffer and Marc). So, with 16K, we cannot
run KVM.
Patches 1-7 cleans up the kernel page size handling code.
Patch 8 Adds a check to ensure the CPU supports the selected granule size.
Patch 9 Adds the page size information to image header.
Patches 10-11 Adds the support for 16K page size
This series applies on top for aarch64:for-next/core with Contiguous bit
support for kernel pagetables.
The tree is also available here:
git://linux-arm.org/linux-skp.git 16k/v3-aarch64-4.3-next
There is also another branch rebased on top of my 'CPU feature' series here:
git://linux-arm.org/linux-skp.git 16k/v3-aarch64-4.3-next+ftr
Changes since V2:
- Dropped KVM support patches
- Added proper comments for the page-table helper macros
- Change ARM64_HW_PGTABLE_LEVEL_SHIFT() to accept page table level as described
by ARM ARM.
- Added reviews/acks
- Added CONT_SHIFT for 16K
Changes since V1:
- Rebase to 4.3-rc1
- Fix vmemmap_populate for 16K (use !ARM64_SWAPPER_USES_SECTION_MAPS)
- Better description for patch2 (suggested-by: Ard)
- Add page size information to the image header flags.
- Added reviewed-by/tested-by Ard.
Ard Biesheuvel (1):
arm64: Add page size to the kernel image header
Suzuki K. Poulose (10):
arm64: Move swapper pagetable definitions
arm64: Handle section maps for swapper/idmap
arm64: Introduce helpers for page table levels
arm64: Calculate size for idmap_pg_dir at compile time
arm64: Handle 4 level page table for swapper
arm64: Clean config usages for page size
arm64: Kconfig: Fix help text about AArch32 support with 64K pages
arm64: Check for selected granule support
arm64: Add 16K page size support
arm64: 36 bit VA
Documentation/arm64/booting.txt | 7 ++-
arch/arm64/Kconfig | 37 +++++++++++----
arch/arm64/Kconfig.debug | 2 +-
arch/arm64/include/asm/fixmap.h | 4 +-
arch/arm64/include/asm/kernel-pgtable.h | 77 +++++++++++++++++++++++++++++++
arch/arm64/include/asm/page.h | 21 ++-------
arch/arm64/include/asm/pgtable-hwdef.h | 25 ++++++++--
arch/arm64/include/asm/sysreg.h | 12 +++++
arch/arm64/include/asm/thread_info.h | 4 +-
arch/arm64/kernel/head.S | 75 +++++++++++++++++-------------
arch/arm64/kernel/image.h | 5 +-
arch/arm64/kernel/vmlinux.lds.S | 1 +
arch/arm64/kvm/Kconfig | 3 ++
arch/arm64/mm/mmu.c | 72 +++++++++++++----------------
arch/arm64/mm/proc.S | 4 +-
15 files changed, 242 insertions(+), 107 deletions(-)
create mode 100644 arch/arm64/include/asm/kernel-pgtable.h
--
1.7.9.5
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| From | "Suzuki K. Poulose" <suzuki.poulose@arm.com> |
|---|---|
| Date | 2015-10-14 13:30 +0200 |
| Subject | [PATCHv3 07/11] arm64: Kconfig: Fix help text about AArch32 support with 64K pages |
| Message-ID | <qjspS-5qz-51@gated-at.bofh.it> |
| In reply to | #1246550 |
Update the help text for ARM64_64K_PAGES to reflect the reality about AArch32 support. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- arch/arm64/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 4654c27..13b51a0 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -368,8 +368,8 @@ config ARM64_64K_PAGES help This feature enables 64KB pages support (4KB by default) allowing only two levels of page tables and faster TLB - look-up. AArch32 emulation is not available when this feature - is enabled. + look-up. AArch32 emulation requires applications compiled + with 64K aligned segments. endchoice -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Date | 2015-10-14 19:20 +0200 |
| Subject | Re: [PATCHv3 07/11] arm64: Kconfig: Fix help text about AArch32 support with 64K pages |
| Message-ID | <qjxSy-58q-17@gated-at.bofh.it> |
| In reply to | #1246553 |
On Wed, Oct 14, 2015 at 12:20:30PM +0100, Suzuki K. Poulose wrote: > Update the help text for ARM64_64K_PAGES to reflect the reality > about AArch32 support. > > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will.deacon@arm.com> > Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> > Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > --- > arch/arm64/Kconfig | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 4654c27..13b51a0 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -368,8 +368,8 @@ config ARM64_64K_PAGES > help > This feature enables 64KB pages support (4KB by default) > allowing only two levels of page tables and faster TLB > - look-up. AArch32 emulation is not available when this feature > - is enabled. > + look-up. AArch32 emulation requires applications compiled > + with 64K aligned segments. > > endchoice Acked-by: Mark Rutland <mark.rutland@arm.com> Thanks, Mark. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | "Suzuki K. Poulose" <suzuki.poulose@arm.com> |
|---|---|
| Date | 2015-10-14 13:30 +0200 |
| Subject | [PATCHv3 10/11] arm64: Add 16K page size support |
| Message-ID | <qjspS-5qz-59@gated-at.bofh.it> |
| In reply to | #1246550 |
This patch turns on the 16K page support in the kernel. We
support 48bit VA (4 level page tables) and 47bit VA (3 level
page tables).
With 16K we can map 128 entries using contiguous bit hint
at level 3 to map 2M using single TLB entry.
TODO: 16K supports 32 contiguous entries at level 2 to get us
1G(which is not yet supported by the infrastructure). That should
be a separate patch altogether.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Jeremy Linton <jeremy.linton@arm.com>
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Changes since V2:
- Add CONT_SHIFT definitions for 16K
---
arch/arm64/Kconfig | 25 ++++++++++++++++++++-----
arch/arm64/include/asm/fixmap.h | 4 +++-
arch/arm64/include/asm/page.h | 3 +++
arch/arm64/include/asm/thread_info.h | 2 ++
arch/arm64/kernel/head.S | 7 ++++++-
arch/arm64/kvm/Kconfig | 3 +++
arch/arm64/mm/proc.S | 4 +++-
7 files changed, 40 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 13b51a0..e78045c 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -173,7 +173,8 @@ config PGTABLE_LEVELS
default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
- default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
+ default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47
+ default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48
source "init/Kconfig"
@@ -363,6 +364,13 @@ config ARM64_4K_PAGES
help
This feature enables 4KB pages support.
+config ARM64_16K_PAGES
+ bool "16KB"
+ help
+ The system will use 16KB pages support. AArch32 emulation
+ requires applications compiled with 16K(or multiple of 16K)
+ aligned segments.
+
config ARM64_64K_PAGES
bool "64KB"
help
@@ -376,6 +384,7 @@ endchoice
choice
prompt "Virtual address space size"
default ARM64_VA_BITS_39 if ARM64_4K_PAGES
+ default ARM64_VA_BITS_47 if ARM64_16K_PAGES
default ARM64_VA_BITS_42 if ARM64_64K_PAGES
help
Allows choosing one of multiple possible virtual address
@@ -390,6 +399,10 @@ config ARM64_VA_BITS_42
bool "42-bit"
depends on ARM64_64K_PAGES
+config ARM64_VA_BITS_47
+ bool "47-bit"
+ depends on ARM64_16K_PAGES
+
config ARM64_VA_BITS_48
bool "48-bit"
@@ -399,6 +412,7 @@ config ARM64_VA_BITS
int
default 39 if ARM64_VA_BITS_39
default 42 if ARM64_VA_BITS_42
+ default 47 if ARM64_VA_BITS_47
default 48 if ARM64_VA_BITS_48
config CPU_BIG_ENDIAN
@@ -466,7 +480,7 @@ config ARCH_WANT_GENERAL_HUGETLB
def_bool y
config ARCH_WANT_HUGE_PMD_SHARE
- def_bool y if ARM64_4K_PAGES
+ def_bool y if ARM64_4K_PAGES || ARM64_16K_PAGES
config HAVE_ARCH_TRANSPARENT_HUGEPAGE
def_bool y
@@ -503,6 +517,7 @@ config XEN
config FORCE_MAX_ZONEORDER
int
default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
+ default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE)
default "11"
menuconfig ARMV8_DEPRECATED
@@ -689,9 +704,9 @@ config COMPAT
the user helper functions, VFP support and the ptrace interface are
handled appropriately by the kernel.
- If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
- will only be able to execute AArch32 binaries that were compiled with
- 64k aligned segments.
+ If you use a page size other than 4KB(i.e, 16KB or 64KB), please be aware
+ that you will only be able to execute AArch32 binaries that were compiled
+ with page size aligned segments.
If you want to execute 32-bit userspace applications, say Y.
diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm/fixmap.h
index 8b9884c..a294c70 100644
--- a/arch/arm64/include/asm/fixmap.h
+++ b/arch/arm64/include/asm/fixmap.h
@@ -55,8 +55,10 @@ enum fixed_addresses {
* Temporary boot-time mappings, used by early_ioremap(),
* before ioremap() is functional.
*/
-#ifdef CONFIG_ARM64_64K_PAGES
+#if defined(CONFIG_ARM64_64K_PAGES)
#define NR_FIX_BTMAPS 4
+#elif defined (CONFIG_ARM64_16K_PAGES)
+#define NR_FIX_BTMAPS 16
#else
#define NR_FIX_BTMAPS 64
#endif
diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h
index da32354..736ed4c 100644
--- a/arch/arm64/include/asm/page.h
+++ b/arch/arm64/include/asm/page.h
@@ -24,6 +24,9 @@
#ifdef CONFIG_ARM64_64K_PAGES
#define PAGE_SHIFT 16
#define CONT_SHIFT 5
+#elif defined(CONFIG_ARM64_16K_PAGES)
+#define PAGE_SHIFT 14
+#define CONT_SHIFT 9
#else
#define PAGE_SHIFT 12
#define CONT_SHIFT 4
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index 5eac6a2..90c7ff2 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -25,6 +25,8 @@
#ifdef CONFIG_ARM64_4K_PAGES
#define THREAD_SIZE_ORDER 2
+#elif defined(CONFIG_ARM64_16K_PAGES)
+#define THREAD_SIZE_ORDER 0
#endif
#define THREAD_SIZE 16384
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index b6aa9e0..2ed57a8 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -624,7 +624,12 @@ ENDPROC(__secondary_switched)
#define id_aa64mmfr0_tgran_shift ID_AA64MMFR0_TGRAN64_SHIFT
#define id_aa64mmfr0_tgran_on ID_AA64MMFR0_TGRAN64_ON
-#else
+#elif defined(CONFIG_ARM64_16K_PAGES)
+
+#define id_aa64mmfr0_tgran_shift ID_AA64MMFR0_TGRAN16_SHIFT
+#define id_aa64mmfr0_tgran_on ID_AA64MMFR0_TGRAN16_ON
+
+#elif defined(CONFIG_ARM64_4K_PAGES)
#define id_aa64mmfr0_tgran_shift ID_AA64MMFR0_TGRAN4_SHIFT
#define id_aa64mmfr0_tgran_on ID_AA64MMFR0_TGRAN4_ON
diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
index 5c7e920..6a7d5cd 100644
--- a/arch/arm64/kvm/Kconfig
+++ b/arch/arm64/kvm/Kconfig
@@ -19,6 +19,7 @@ if VIRTUALIZATION
config KVM
bool "Kernel-based Virtual Machine (KVM) support"
depends on OF
+ depends on !ARM64_16K_PAGES
select MMU_NOTIFIER
select PREEMPT_NOTIFIERS
select ANON_INODES
@@ -33,6 +34,8 @@ config KVM
select HAVE_KVM_IRQFD
---help---
Support hosting virtualized guest machines.
+ We don't support KVM with 16K page tables yet, due to the multiple
+ levels of fake page tables.
If unsure, say N.
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 91cb2ea..3a4b8b1 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -30,7 +30,9 @@
#ifdef CONFIG_ARM64_64K_PAGES
#define TCR_TG_FLAGS TCR_TG0_64K | TCR_TG1_64K
-#else
+#elif defined(CONFIG_ARM64_16K_PAGES)
+#define TCR_TG_FLAGS TCR_TG0_16K | TCR_TG1_16K
+#else /* CONFIG_ARM64_4K_PAGES */
#define TCR_TG_FLAGS TCR_TG0_4K | TCR_TG1_4K
#endif
--
1.7.9.5
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| From | Jeremy Linton <jeremy.linton@arm.com> |
|---|---|
| Date | 2015-10-14 17:50 +0200 |
| Subject | Re: [PATCHv3 10/11] arm64: Add 16K page size support |
| Message-ID | <qjwtr-2XK-11@gated-at.bofh.it> |
| In reply to | #1246556 |
On 10/14/2015 06:20 AM, Suzuki K. Poulose wrote: > diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h > index da32354..736ed4c 100644 > --- a/arch/arm64/include/asm/page.h > +++ b/arch/arm64/include/asm/page.h > @@ -24,6 +24,9 @@ > #ifdef CONFIG_ARM64_64K_PAGES > #define PAGE_SHIFT 16 > #define CONT_SHIFT 5 > +#elif defined(CONFIG_ARM64_16K_PAGES) > +#define PAGE_SHIFT 14 > +#define CONT_SHIFT 9 > #else > #define PAGE_SHIFT 12 > #define CONT_SHIFT 4 Suzuki, Is CONT_SHIFT correct? I thought it should be 7? The ARM-ARM says that a contiguous 3rd level lookup is 128 entries. Thanks, Jeremy -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> |
|---|---|
| Date | 2015-10-14 18:00 +0200 |
| Subject | Re: [PATCHv3 10/11] arm64: Add 16K page size support |
| Message-ID | <qjwD8-39a-17@gated-at.bofh.it> |
| In reply to | #1246921 |
On 14/10/15 16:40, Jeremy Linton wrote: > On 10/14/2015 06:20 AM, Suzuki K. Poulose wrote: >> diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h >> index da32354..736ed4c 100644 >> --- a/arch/arm64/include/asm/page.h >> +++ b/arch/arm64/include/asm/page.h >> @@ -24,6 +24,9 @@ >> #ifdef CONFIG_ARM64_64K_PAGES >> #define PAGE_SHIFT 16 >> #define CONT_SHIFT 5 >> +#elif defined(CONFIG_ARM64_16K_PAGES) >> +#define PAGE_SHIFT 14 >> +#define CONT_SHIFT 9 >> #else >> #define PAGE_SHIFT 12 >> #define CONT_SHIFT 4 > > Suzuki, > > Is CONT_SHIFT correct? I thought it should be 7? The ARM-ARM says that a contiguous 3rd level lookup is 128 entries. > Err, you are right. I tested it with 9 and I still got contiguous mappings. May be because we anyway have 7 contiguous bits and the kernel text is read-only. I will fix that, thanks for spotting. Suzuki -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Date | 2015-10-15 16:10 +0200 |
| Subject | Re: [PATCHv3 10/11] arm64: Add 16K page size support |
| Message-ID | <qjRog-dR-51@gated-at.bofh.it> |
| In reply to | #1246556 |
Hi,
> +config ARM64_16K_PAGES
> + bool "16KB"
> + help
> + The system will use 16KB pages support. AArch32 emulation
> + requires applications compiled with 16K(or multiple of 16K)
> + aligned segments.
Nit: missing space before '('
Nit: 'a multiple of'
> @@ -503,6 +517,7 @@ config XEN
> config FORCE_MAX_ZONEORDER
> int
> default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
> + default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE)
> default "11"
I'm a little lost here. How are these numbers derived?
> menuconfig ARMV8_DEPRECATED
> @@ -689,9 +704,9 @@ config COMPAT
> the user helper functions, VFP support and the ptrace interface are
> handled appropriately by the kernel.
>
> - If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
> - will only be able to execute AArch32 binaries that were compiled with
> - 64k aligned segments.
> + If you use a page size other than 4KB(i.e, 16KB or 64KB), please be aware
Nit: missing space before '(' please.
> diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm/fixmap.h
> index 8b9884c..a294c70 100644
> --- a/arch/arm64/include/asm/fixmap.h
> +++ b/arch/arm64/include/asm/fixmap.h
> @@ -55,8 +55,10 @@ enum fixed_addresses {
> * Temporary boot-time mappings, used by early_ioremap(),
> * before ioremap() is functional.
> */
> -#ifdef CONFIG_ARM64_64K_PAGES
> +#if defined(CONFIG_ARM64_64K_PAGES)
> #define NR_FIX_BTMAPS 4
> +#elif defined (CONFIG_ARM64_16K_PAGES)
> +#define NR_FIX_BTMAPS 16
> #else
> #define NR_FIX_BTMAPS 64
> #endif
We could include <linux/sizes.h> and simplify this to:
#define NR_FIX_BTMAPS (SZ_256K / PAGE_SIZE)
Which works for me locally.
> diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
> index 5eac6a2..90c7ff2 100644
> --- a/arch/arm64/include/asm/thread_info.h
> +++ b/arch/arm64/include/asm/thread_info.h
> @@ -25,6 +25,8 @@
>
> #ifdef CONFIG_ARM64_4K_PAGES
> #define THREAD_SIZE_ORDER 2
> +#elif defined(CONFIG_ARM64_16K_PAGES)
> +#define THREAD_SIZE_ORDER 0
> #endif
> #define THREAD_SIZE 16384
The above looks correct.
As an open/general question, why do both THREAD_SIZE_ORDER and
THREAD_SIZE exist? One really should be defined in terms of the other.
As far as I can tell,the only user of THREAD_SIZE_ORDER outside of arch
code is fork.c, which could calculate it as:
ilog2(DIV_ROUND_UP(THREAD_SIZE, PAGE_SIZE))
Though I suspect we can't do that in a macro here for fear of a fragile
build, so that's something for another time.
> diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
> index b6aa9e0..2ed57a8 100644
> --- a/arch/arm64/kernel/head.S
> +++ b/arch/arm64/kernel/head.S
> @@ -624,7 +624,12 @@ ENDPROC(__secondary_switched)
> #define id_aa64mmfr0_tgran_shift ID_AA64MMFR0_TGRAN64_SHIFT
> #define id_aa64mmfr0_tgran_on ID_AA64MMFR0_TGRAN64_ON
>
> -#else
> +#elif defined(CONFIG_ARM64_16K_PAGES)
> +
> +#define id_aa64mmfr0_tgran_shift ID_AA64MMFR0_TGRAN16_SHIFT
> +#define id_aa64mmfr0_tgran_on ID_AA64MMFR0_TGRAN16_ON
> +
> +#elif defined(CONFIG_ARM64_4K_PAGES)
>
> #define id_aa64mmfr0_tgran_shift ID_AA64MMFR0_TGRAN4_SHIFT
> #define id_aa64mmfr0_tgran_on ID_AA64MMFR0_TGRAN4_ON
I assume you'll s/ON/SUPPORTED/ per comments in another thread.
Otherwise this looks fine to me.
Thanks,
Mark.
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| From | "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> |
|---|---|
| Date | 2015-10-15 16:50 +0200 |
| Subject | Re: [PATCHv3 10/11] arm64: Add 16K page size support |
| Message-ID | <qjS0V-Yf-11@gated-at.bofh.it> |
| In reply to | #1247830 |
On 15/10/15 15:06, Mark Rutland wrote:
> Hi,
>
I have fixed all the nits locally. Thanks for pointing them out.
>> config FORCE_MAX_ZONEORDER
>> int
>> default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
>> + default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE)
>> default "11"
>
> I'm a little lost here. How are these numbers derived?
>
I struggled to find the right value for 16K. Thanks to Steve Capper
for the following explanation. I will add it as a comment.
All allocations from the buddy allocator have to have compound order
strictly less than MAX_ORDER. i.e, the maximum allocation size is
(MAX_ORDER - 1) PAGES. To align with the transparent huge page size,
we get :
(MAX_ORDER - 1) + PAGE_SHIFT = PMD_SHIFT
Which gives us:
MAX_ORDER = PAGE_SHIFT - 3 + PAGE_SHIFT - PAGE_SHIFT + 1
= PAGE_SHIFT - 2
That raises an interesting question about the selection of the value
for 4K. Shouldn't that be 10 instead of 11 ?
Steve ?
>> -#ifdef CONFIG_ARM64_64K_PAGES
>> +#if defined(CONFIG_ARM64_64K_PAGES)
>> #define NR_FIX_BTMAPS 4
>> +#elif defined (CONFIG_ARM64_16K_PAGES)
>> +#define NR_FIX_BTMAPS 16
>> #else
>> #define NR_FIX_BTMAPS 64
>> #endif
>
> We could include <linux/sizes.h> and simplify this to:
>
> #define NR_FIX_BTMAPS (SZ_256K / PAGE_SIZE)
>
> Which works for me locally.
Nice cleanup. I will pick that as a separate patch in the series.
>
>> diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
>> index 5eac6a2..90c7ff2 100644
>> --- a/arch/arm64/include/asm/thread_info.h
>> +++ b/arch/arm64/include/asm/thread_info.h
>> @@ -25,6 +25,8 @@
>>
>> #ifdef CONFIG_ARM64_4K_PAGES
>> #define THREAD_SIZE_ORDER 2
>> +#elif defined(CONFIG_ARM64_16K_PAGES)
>> +#define THREAD_SIZE_ORDER 0
>> #endif
>> #define THREAD_SIZE 16384
>
> The above looks correct.
>
> As an open/general question, why do both THREAD_SIZE_ORDER and
> THREAD_SIZE exist? One really should be defined in terms of the other.
I think its mainly for choosing the mechanism for stack allocation. If it
is a multiple of a page, you allocate a page. If not, uses a kmem_cache.
>> #define id_aa64mmfr0_tgran_shift ID_AA64MMFR0_TGRAN4_SHIFT
>> #define id_aa64mmfr0_tgran_on ID_AA64MMFR0_TGRAN4_ON
>
> I assume you'll s/ON/SUPPORTED/ per comments in another thread.
>
Yes
Thanks
Suzuki
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| From | Steve Capper <steve.capper@linaro.org> |
|---|---|
| Date | 2015-10-15 17:40 +0200 |
| Subject | Re: [PATCHv3 10/11] arm64: Add 16K page size support |
| Message-ID | <qjSNk-2aP-27@gated-at.bofh.it> |
| In reply to | #1247859 |
On 15 October 2015 at 15:48, Suzuki K. Poulose <Suzuki.Poulose@arm.com> wrote: > On 15/10/15 15:06, Mark Rutland wrote: >> >> Hi, >> > > I have fixed all the nits locally. Thanks for pointing them out. > >>> config FORCE_MAX_ZONEORDER >>> int >>> default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE) >>> + default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE) >>> default "11" >> >> >> I'm a little lost here. How are these numbers derived? >> > > I struggled to find the right value for 16K. Thanks to Steve Capper > for the following explanation. I will add it as a comment. > > All allocations from the buddy allocator have to have compound order > strictly less than MAX_ORDER. i.e, the maximum allocation size is > (MAX_ORDER - 1) PAGES. To align with the transparent huge page size, > we get : > > (MAX_ORDER - 1) + PAGE_SHIFT = PMD_SHIFT > > Which gives us: > > MAX_ORDER = PAGE_SHIFT - 3 + PAGE_SHIFT - PAGE_SHIFT + 1 > = PAGE_SHIFT - 2 > > That raises an interesting question about the selection of the value > for 4K. Shouldn't that be 10 instead of 11 ? > > Steve ? Hi, My understanding is that 11 is a "good minimum" value for the page allocator with 4KB pages. (There are references to it being 10 in 2.4 kernels but raised to 11 on 2.6 kernels?) We need to raise the minimum when we have a 16KB or 64KB PAGE_SIZE to be able allocate a 32MB or 512MB Transparent HugePages. Cheers, -- Steve > >>> -#ifdef CONFIG_ARM64_64K_PAGES >>> +#if defined(CONFIG_ARM64_64K_PAGES) >>> #define NR_FIX_BTMAPS 4 >>> +#elif defined (CONFIG_ARM64_16K_PAGES) >>> +#define NR_FIX_BTMAPS 16 >>> #else >>> #define NR_FIX_BTMAPS 64 >>> #endif >> >> >> We could include <linux/sizes.h> and simplify this to: >> >> #define NR_FIX_BTMAPS (SZ_256K / PAGE_SIZE) >> >> Which works for me locally. > > > Nice cleanup. I will pick that as a separate patch in the series. > >> >>> diff --git a/arch/arm64/include/asm/thread_info.h >>> b/arch/arm64/include/asm/thread_info.h >>> index 5eac6a2..90c7ff2 100644 >>> --- a/arch/arm64/include/asm/thread_info.h >>> +++ b/arch/arm64/include/asm/thread_info.h >>> @@ -25,6 +25,8 @@ >>> >>> #ifdef CONFIG_ARM64_4K_PAGES >>> #define THREAD_SIZE_ORDER 2 >>> +#elif defined(CONFIG_ARM64_16K_PAGES) >>> +#define THREAD_SIZE_ORDER 0 >>> #endif >>> #define THREAD_SIZE 16384 >> >> >> The above looks correct. >> >> As an open/general question, why do both THREAD_SIZE_ORDER and >> THREAD_SIZE exist? One really should be defined in terms of the other. > > > I think its mainly for choosing the mechanism for stack allocation. If it > is a multiple of a page, you allocate a page. If not, uses a kmem_cache. > > >>> #define id_aa64mmfr0_tgran_shift ID_AA64MMFR0_TGRAN4_SHIFT >>> #define id_aa64mmfr0_tgran_on ID_AA64MMFR0_TGRAN4_ON >> >> >> I assume you'll s/ON/SUPPORTED/ per comments in another thread. >> > > Yes > > Thanks > Suzuki > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> |
|---|---|
| Date | 2015-10-15 17:50 +0200 |
| Subject | Re: [PATCHv3 10/11] arm64: Add 16K page size support |
| Message-ID | <qjSX0-2mu-7@gated-at.bofh.it> |
| In reply to | #1247909 |
On 15/10/15 16:36, Steve Capper wrote: > On 15 October 2015 at 15:48, Suzuki K. Poulose <Suzuki.Poulose@arm.com> wrote: >> On 15/10/15 15:06, Mark Rutland wrote: >>> >>> Hi, >>> >> >> I have fixed all the nits locally. Thanks for pointing them out. >> >>>> config FORCE_MAX_ZONEORDER >>>> int >>>> default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE) >>>> + default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE) >>>> default "11" >>> >>> >>> I'm a little lost here. How are these numbers derived? >>> >> >> I struggled to find the right value for 16K. Thanks to Steve Capper >> for the following explanation. I will add it as a comment. >> >> All allocations from the buddy allocator have to have compound order >> strictly less than MAX_ORDER. i.e, the maximum allocation size is >> (MAX_ORDER - 1) PAGES. To align with the transparent huge page size, >> we get : >> >> (MAX_ORDER - 1) + PAGE_SHIFT = PMD_SHIFT >> >> Which gives us: >> >> MAX_ORDER = PAGE_SHIFT - 3 + PAGE_SHIFT - PAGE_SHIFT + 1 >> = PAGE_SHIFT - 2 >> >> That raises an interesting question about the selection of the value >> for 4K. Shouldn't that be 10 instead of 11 ? >> >> Steve ? > > Hi, > My understanding is that 11 is a "good minimum" value for the page > allocator with 4KB pages. > (There are references to it being 10 in 2.4 kernels but raised to 11 > on 2.6 kernels?) > > We need to raise the minimum when we have a 16KB or 64KB PAGE_SIZE to > be able allocate a 32MB or 512MB Transparent HugePages. > Thanks Steve, for the clarification. I will add the following comment to the Kconfig # # All allocations from the buddy allocator have to have compound order # strictly less than MAX_ORDER. i.e, the maximum allocation size is # (MAX_ORDER - 1) PAGES. To align with the transparent huge page size, # we get : # # (MAX_ORDER - 1) + PAGE_SHIFT = PMD_SHIFT # # Which gives us: # # MAX_ORDER = PAGE_SHIFT - 3 + PAGE_SHIFT - PAGE_SHIFT + 1 # = PAGE_SHIFT - 2 # # However for 4K, we choose a higher default value 11 as opposed to 10, (giving us size 4M) # matching the default value used by the generic code. # Thanks Suzuki -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | "Suzuki K. Poulose" <suzuki.poulose@arm.com> |
|---|---|
| Date | 2015-10-14 13:30 +0200 |
| Subject | [PATCHv3 05/11] arm64: Handle 4 level page table for swapper |
| Message-ID | <qjspS-5qz-61@gated-at.bofh.it> |
| In reply to | #1246550 |
At the moment, we only support maximum of 3-level page table for swapper. With 48bit VA, 64K has only 3 levels and 4K uses section mapping. Add support for 4-level page table for swapper, needed by 16K pages. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- arch/arm64/kernel/head.S | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 149fce3..7ace955 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -271,7 +271,10 @@ ENDPROC(preserve_boot_args) */ .macro create_pgd_entry, tbl, virt, tmp1, tmp2 create_table_entry \tbl, \virt, PGDIR_SHIFT, PTRS_PER_PGD, \tmp1, \tmp2 -#if SWAPPER_PGTABLE_LEVELS == 3 +#if SWAPPER_PGTABLE_LEVELS > 3 + create_table_entry \tbl, \virt, PUD_SHIFT, PTRS_PER_PUD, \tmp1, \tmp2 +#endif +#if SWAPPER_PGTABLE_LEVELS > 2 create_table_entry \tbl, \virt, SWAPPER_TABLE_SHIFT, PTRS_PER_PTE, \tmp1, \tmp2 #endif .endm -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Date | 2015-10-14 19:20 +0200 |
| Subject | Re: [PATCHv3 05/11] arm64: Handle 4 level page table for swapper |
| Message-ID | <qjxSy-58q-19@gated-at.bofh.it> |
| In reply to | #1246557 |
On Wed, Oct 14, 2015 at 12:20:28PM +0100, Suzuki K. Poulose wrote: > At the moment, we only support maximum of 3-level page table for > swapper. With 48bit VA, 64K has only 3 levels and 4K uses section > mapping. Add support for 4-level page table for swapper, needed > by 16K pages. > > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will.deacon@arm.com> > Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> > Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > --- > arch/arm64/kernel/head.S | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > index 149fce3..7ace955 100644 > --- a/arch/arm64/kernel/head.S > +++ b/arch/arm64/kernel/head.S > @@ -271,7 +271,10 @@ ENDPROC(preserve_boot_args) > */ > .macro create_pgd_entry, tbl, virt, tmp1, tmp2 > create_table_entry \tbl, \virt, PGDIR_SHIFT, PTRS_PER_PGD, \tmp1, \tmp2 > -#if SWAPPER_PGTABLE_LEVELS == 3 > +#if SWAPPER_PGTABLE_LEVELS > 3 > + create_table_entry \tbl, \virt, PUD_SHIFT, PTRS_PER_PUD, \tmp1, \tmp2 > +#endif > +#if SWAPPER_PGTABLE_LEVELS > 2 > create_table_entry \tbl, \virt, SWAPPER_TABLE_SHIFT, PTRS_PER_PTE, \tmp1, \tmp2 > #endif > .endm Acked-by: Mark Rutland <mark.rutland@arm.com> Thanks, Mark. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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