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Groups > linux.kernel > #1242566 > unrolled thread
| Started by | Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
|---|---|
| First post | 2015-10-08 18:00 +0200 |
| Last post | 2015-10-11 21:20 +0200 |
| Articles | 2 — 2 participants |
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[PATCH 1/1] x86/cpu/intel: enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2015-10-08 18:00 +0200
[tip:x86/cpufeature] x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield tip-bot for Andy Shevchenko <tipbot@zytor.com> - 2015-10-11 21:20 +0200
| From | Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
|---|---|
| Date | 2015-10-08 18:00 +0200 |
| Subject | [PATCH 1/1] x86/cpu/intel: enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield |
| Message-ID | <qhlLQ-81t-21@gated-at.bofh.it> |
The Intel Merrifield SoC is a successor of the Intel MID line of SoCs. Let's
set the neccessary capability for that chip. See commit c54fdbb2823d (x86: Add
cpu capability flag X86_FEATURE_NONSTOP_TSC_S3) for the details.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
arch/x86/kernel/cpu/intel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 98a13db..209ac1e 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -97,6 +97,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
switch (c->x86_model) {
case 0x27: /* Penwell */
case 0x35: /* Cloverview */
+ case 0x4a: /* Merrifield */
set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
break;
default:
--
2.5.3
--
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| From | tip-bot for Andy Shevchenko <tipbot@zytor.com> |
|---|---|
| Date | 2015-10-11 21:20 +0200 |
| Subject | [tip:x86/cpufeature] x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield |
| Message-ID | <qiuk1-L5-5@gated-at.bofh.it> |
| In reply to | #1242566 |
Commit-ID: 1cc0166752d598a69f6bb99381d828cbfb5fa9a5
Gitweb: http://git.kernel.org/tip/1cc0166752d598a69f6bb99381d828cbfb5fa9a5
Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
AuthorDate: Thu, 8 Oct 2015 18:56:26 +0300
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Sun, 11 Oct 2015 21:07:26 +0200
x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield
The Intel Merrifield SoC is a successor of the Intel MID line of
SoCs. Let's set the neccessary capability for that chip. See commit
c54fdbb2823d (x86: Add cpu capability flag X86_FEATURE_NONSTOP_TSC_S3)
for the details.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: http://lkml.kernel.org/r/1444319786-36125-1-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/kernel/cpu/intel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 98a13db..209ac1e 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -97,6 +97,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
switch (c->x86_model) {
case 0x27: /* Penwell */
case 0x35: /* Cloverview */
+ case 0x4a: /* Merrifield */
set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
break;
default:
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
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