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[PATCH] ARM: debug: add support for alternate 8250 register layout

Started byMans Rullgard <mans@mansr.com>
First post2015-10-02 14:20 +0200
Last post2015-10-02 16:40 +0200
Articles 6 — 3 participants

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  [PATCH] ARM: debug: add support for alternate 8250 register layout Mans Rullgard <mans@mansr.com> - 2015-10-02 14:20 +0200
    Re: [PATCH] ARM: debug: add support for alternate 8250 register layout Måns Rullgård <mans@mansr.com> - 2015-10-02 16:20 +0200
    Re: [PATCH] ARM: debug: add support for alternate 8250 register  layout Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> - 2015-10-02 16:20 +0200
      Re: [PATCH] ARM: debug: add support for alternate 8250 register layout Måns Rullgård <mans@mansr.com> - 2015-10-02 16:30 +0200
        Re: [PATCH] ARM: debug: add support for alternate 8250 register  layout Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> - 2015-10-02 16:40 +0200
          Re: [PATCH] ARM: debug: add support for alternate 8250 register layout Måns Rullgård <mans@mansr.com> - 2015-10-02 16:40 +0200

#1238155 — [PATCH] ARM: debug: add support for alternate 8250 register layout

FromMans Rullgard <mans@mansr.com>
Date2015-10-02 14:20 +0200
Subject[PATCH] ARM: debug: add support for alternate 8250 register layout
Message-ID<qf7tE-351-11@gated-at.bofh.it>
Some SoCs have a UART with a non-standard register layout. This
allows the debug console to work with these.

Signed-off-by: Mans Rullgard <mans@mansr.com>
---
I would have preferred a more accurate description of the UART, but I've
not managed to figure out who the vendor is.
---
 arch/arm/Kconfig.debug        |  4 ++++
 arch/arm/include/debug/8250.S | 12 ++++++++++++
 2 files changed, 16 insertions(+)

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 0cfd7f9..8d5c837 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1597,6 +1597,10 @@ config DEBUG_UART_8250_WORD
 		DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \
 		DEBUG_BRCMSTB_UART
 
+config DEBUG_UART_8250_AU
+       bool "8250 UART has Alchemy register layout"
+       depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
+
 config DEBUG_UART_8250_FLOW_CONTROL
 	bool "Enable flow control for 8250 UART"
 	depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S
index 7f7446f..3c9ef68 100644
--- a/arch/arm/include/debug/8250.S
+++ b/arch/arm/include/debug/8250.S
@@ -9,6 +9,18 @@
  */
 #include <linux/serial_reg.h>
 
+#ifdef CONFIG_DEBUG_UART_8250_AU
+
+#undef UART_TX
+#undef UART_LSR
+#undef UART_MSR
+
+#define UART_TX 1
+#define UART_LSR 7
+#define UART_MSR 8
+
+#endif
+
 		.macro	addruart, rp, rv, tmp
 		ldr	\rp, =CONFIG_DEBUG_UART_PHYS
 		ldr	\rv, =CONFIG_DEBUG_UART_VIRT
-- 
2.5.3

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#1238313

FromMåns Rullgård <mans@mansr.com>
Date2015-10-02 16:20 +0200
Message-ID<qf9lM-5Mt-13@gated-at.bofh.it>
In reply to#1238155
Mans Rullgard <mans@mansr.com> writes:

> Some SoCs have a UART with a non-standard register layout. This
> allows the debug console to work with these.
>
> Signed-off-by: Mans Rullgard <mans@mansr.com>
> ---
> I would have preferred a more accurate description of the UART, but I've
> not managed to figure out who the vendor is.

I've been informed it is provided by Palmchip.  I'll make a new patch.

-- 
Måns Rullgård
mans@mansr.com
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#1238316 — Re: [PATCH] ARM: debug: add support for alternate 8250 register layout

FromSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Date2015-10-02 16:20 +0200
SubjectRe: [PATCH] ARM: debug: add support for alternate 8250 register layout
Message-ID<qf9lM-5Mt-21@gated-at.bofh.it>
In reply to#1238155
Hello.

On 10/2/2015 3:12 PM, Mans Rullgard wrote:

> Some SoCs have a UART with a non-standard register layout. This
> allows the debug console to work with these.

> Signed-off-by: Mans Rullgard <mans@mansr.com>
> ---
> I would have preferred a more accurate description of the UART, but I've
> not managed to figure out who the vendor is.

    You haven't seem the Alchemy datasheets? I can send you some if so.

> ---
>   arch/arm/Kconfig.debug        |  4 ++++
>   arch/arm/include/debug/8250.S | 12 ++++++++++++
>   2 files changed, 16 insertions(+)
>
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
> index 0cfd7f9..8d5c837 100644
> --- a/arch/arm/Kconfig.debug
> +++ b/arch/arm/Kconfig.debug
> @@ -1597,6 +1597,10 @@ config DEBUG_UART_8250_WORD
>   		DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \
>   		DEBUG_BRCMSTB_UART
>
> +config DEBUG_UART_8250_AU
> +       bool "8250 UART has Alchemy register layout"
> +       depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
> +

    So Alchemy UART got reused on ARM?

MBR, Sergei

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#1238322

FromMåns Rullgård <mans@mansr.com>
Date2015-10-02 16:30 +0200
Message-ID<qf9vs-5XN-17@gated-at.bofh.it>
In reply to#1238316
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> writes:

> Hello.
>
> On 10/2/2015 3:12 PM, Mans Rullgard wrote:
>
>> Some SoCs have a UART with a non-standard register layout. This
>> allows the debug console to work with these.
>
>> Signed-off-by: Mans Rullgard <mans@mansr.com>
>> ---
>> I would have preferred a more accurate description of the UART, but I've
>> not managed to figure out who the vendor is.
>
>    You haven't seem the Alchemy datasheets? I can send you some if so.

I have.  They don't say where Alchemy bought the UART block.

>> ---
>>   arch/arm/Kconfig.debug        |  4 ++++
>>   arch/arm/include/debug/8250.S | 12 ++++++++++++
>>   2 files changed, 16 insertions(+)
>>
>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
>> index 0cfd7f9..8d5c837 100644
>> --- a/arch/arm/Kconfig.debug
>> +++ b/arch/arm/Kconfig.debug
>> @@ -1597,6 +1597,10 @@ config DEBUG_UART_8250_WORD
>>   		DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \
>>   		DEBUG_BRCMSTB_UART
>>
>> +config DEBUG_UART_8250_AU
>> +       bool "8250 UART has Alchemy register layout"
>> +       depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
>> +
>
>    So Alchemy UART got reused on ARM?

The UART is actually a Palmchip IP core used by several SoC companies.

-- 
Måns Rullgård
mans@mansr.com
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#1238328 — Re: [PATCH] ARM: debug: add support for alternate 8250 register layout

FromSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Date2015-10-02 16:40 +0200
SubjectRe: [PATCH] ARM: debug: add support for alternate 8250 register layout
Message-ID<qf9F7-690-13@gated-at.bofh.it>
In reply to#1238322
On 10/2/2015 5:26 PM, Måns Rullgård wrote:

>>> Some SoCs have a UART with a non-standard register layout. This
>>> allows the debug console to work with these.
>>
>>> Signed-off-by: Mans Rullgard <mans@mansr.com>
>>> ---
>>> I would have preferred a more accurate description of the UART, but I've
>>> not managed to figure out who the vendor is.
>>
>>     You haven't seem the Alchemy datasheets? I can send you some if so.
>
> I have.  They don't say where Alchemy bought the UART block.

    In fact, seeing at least Au1550 databook googling for "alchemy databook".
The UART registers are described there. Perhaps, it's not accurate enought for 
your needs, though...

>>> ---
>>>    arch/arm/Kconfig.debug        |  4 ++++
>>>    arch/arm/include/debug/8250.S | 12 ++++++++++++
>>>    2 files changed, 16 insertions(+)
>>>
>>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
>>> index 0cfd7f9..8d5c837 100644
>>> --- a/arch/arm/Kconfig.debug
>>> +++ b/arch/arm/Kconfig.debug
>>> @@ -1597,6 +1597,10 @@ config DEBUG_UART_8250_WORD
>>>    		DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \
>>>    		DEBUG_BRCMSTB_UART
>>>
>>> +config DEBUG_UART_8250_AU
>>> +       bool "8250 UART has Alchemy register layout"
>>> +       depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
>>> +
>>
>>     So Alchemy UART got reused on ARM?
>
> The UART is actually a Palmchip IP core used by several SoC companies.

    Hm, how have you figured out that;s Palmchip if the Alchemy databooks are 
silent about that? :-)

MBR, Sergei

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#1238331

FromMåns Rullgård <mans@mansr.com>
Date2015-10-02 16:40 +0200
Message-ID<qf9F8-690-25@gated-at.bofh.it>
In reply to#1238328
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> writes:

> On 10/2/2015 5:26 PM, Måns Rullgård wrote:
>
>>>> Some SoCs have a UART with a non-standard register layout. This
>>>> allows the debug console to work with these.
>>>
>>>> Signed-off-by: Mans Rullgard <mans@mansr.com>
>>>> ---
>>>> I would have preferred a more accurate description of the UART, but I've
>>>> not managed to figure out who the vendor is.
>>>
>>>     You haven't seem the Alchemy datasheets? I can send you some if so.
>>
>> I have.  They don't say where Alchemy bought the UART block.
>
>    In fact, seeing at least Au1550 databook googling for "alchemy databook".
> The UART registers are described there. Perhaps, it's not accurate
> enought for your needs, though...

I have all the information I need about how it works.

>>>> ---
>>>>    arch/arm/Kconfig.debug        |  4 ++++
>>>>    arch/arm/include/debug/8250.S | 12 ++++++++++++
>>>>    2 files changed, 16 insertions(+)
>>>>
>>>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
>>>> index 0cfd7f9..8d5c837 100644
>>>> --- a/arch/arm/Kconfig.debug
>>>> +++ b/arch/arm/Kconfig.debug
>>>> @@ -1597,6 +1597,10 @@ config DEBUG_UART_8250_WORD
>>>>    		DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \
>>>>    		DEBUG_BRCMSTB_UART
>>>>
>>>> +config DEBUG_UART_8250_AU
>>>> +       bool "8250 UART has Alchemy register layout"
>>>> +       depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
>>>> +
>>>
>>>     So Alchemy UART got reused on ARM?
>>
>> The UART is actually a Palmchip IP core used by several SoC companies.
>
>    Hm, how have you figured out that;s Palmchip if the Alchemy
> databooks are silent about that? :-)

Someone with access to hardware design files told me.

-- 
Måns Rullgård
mans@mansr.com
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