Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1325316 > unrolled thread
| Started by | Paul Burton <paul.burton@imgtec.com> |
|---|---|
| First post | 2016-02-03 13:10 +0100 |
| Last post | 2016-02-03 18:00 +0100 |
| Articles | 2 — 2 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
[PATCH v2 6/6] net: pch_gbe: Allow longer for resets Paul Burton <paul.burton@imgtec.com> - 2016-02-03 13:10 +0100
RE: [PATCH v2 6/6] net: pch_gbe: Allow longer for resets David Laight <David.Laight@ACULAB.COM> - 2016-02-03 18:00 +0100
| From | Paul Burton <paul.burton@imgtec.com> |
|---|---|
| Date | 2016-02-03 13:10 +0100 |
| Subject | [PATCH v2 6/6] net: pch_gbe: Allow longer for resets |
| Message-ID | <qY4pZ-1KZ-37@gated-at.bofh.it> |
Resets of the EG20T MAC on the MIPS Boston development board take longer than the 1000 loops that pch_gbe_wait_clr_bit was performing. Bump up the number of loops. Signed-off-by: Paul Burton <paul.burton@imgtec.com> --- Changes in v2: None drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index 00ef83c..87994d2 100644 --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c @@ -321,7 +321,7 @@ static void pch_gbe_wait_clr_bit(void *reg, u32 bit) u32 tmp; /* wait busy */ - tmp = 1000; + tmp = 10000; while ((ioread32(reg) & bit) && --tmp) cpu_relax(); if (!tmp) -- 2.7.0
[toc] | [next] | [standalone]
| From | David Laight <David.Laight@ACULAB.COM> |
|---|---|
| Date | 2016-02-03 18:00 +0100 |
| Message-ID | <qY8WD-4vK-25@gated-at.bofh.it> |
| In reply to | #1325316 |
From: Paul Burton > Sent: 03 February 2016 12:03 > Resets of the EG20T MAC on the MIPS Boston development board take longer > than the 1000 loops that pch_gbe_wait_clr_bit was performing. Bump up > the number of loops. ... > diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki- > semi/pch_gbe/pch_gbe_main.c > index 00ef83c..87994d2 100644 > --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c > +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c > @@ -321,7 +321,7 @@ static void pch_gbe_wait_clr_bit(void *reg, u32 bit) > u32 tmp; > > /* wait busy */ > - tmp = 1000; > + tmp = 10000; > while ((ioread32(reg) & bit) && --tmp) > cpu_relax(); > if (!tmp) Why not sleep for (say) 100us ? That'll stop the loop depending on the cpu speed. David
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web