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Groups > linux.kernel > #1324346 > unrolled thread
| Started by | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| First post | 2016-02-02 19:10 +0100 |
| Last post | 2016-02-03 12:20 +0100 |
| Articles | 20 on this page of 33 — 7 participants |
Back to article view | Back to linux.kernel
[PATCH 00/10] Add support for the Armada 3700 SoC an mvebu ARM64 based Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:10 +0100
[PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:10 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Mark Rutland <mark.rutland@arm.com> - 2016-02-02 19:30 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Mark Rutland <mark.rutland@arm.com> - 2016-02-02 19:30 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk> - 2016-02-02 19:30 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-03 17:10 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Mark Rutland <mark.rutland@arm.com> - 2016-02-02 19:40 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-03 17:40 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-03 18:00 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Mark Rutland <mark.rutland@arm.com> - 2016-02-03 18:10 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Arnd Bergmann <arnd@arndb.de> - 2016-02-02 22:10 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-03 17:50 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Rob Herring <robh@kernel.org> - 2016-02-02 22:20 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Marcin Wojtas <mw@semihalf.com> - 2016-02-03 09:10 +0100
Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-03 17:50 +0100
[PATCH 04/10] Documentation: dt-bindings: Add a new compatible for the Armada 3700 Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:20 +0100
Re: [PATCH 04/10] Documentation: dt-bindings: Add a new compatible for the Armada 3700 Rob Herring <robh@kernel.org> - 2016-02-02 22:30 +0100
[PATCH 08/10] MAINTAINERS: Extend dts entry for ARM64 mvebu files Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:20 +0100
[PATCH 07/10] arm64: dts: add the Marvell Armada 3700 family and a development board Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:20 +0100
Re: [PATCH 07/10] arm64: dts: add the Marvell Armada 3700 family and a development board Mark Rutland <mark.rutland@arm.com> - 2016-02-02 19:40 +0100
Re: [PATCH 07/10] arm64: dts: add the Marvell Armada 3700 family and a development board Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-03 11:50 +0100
Re: [PATCH 07/10] arm64: dts: add the Marvell Armada 3700 family and a development board Jisheng Zhang <jszhang@marvell.com> - 2016-02-03 07:50 +0100
[PATCH 02/10] ata: ahci_mvebu: add support for Armada 3700 variant Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:20 +0100
[PATCH 09/10] Documentation: arm: update supported Marvell EBU processors Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:20 +0100
[PATCH 10/10] arm64: defconfig: enable Armada 3700 related config Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:20 +0100
[PATCH 06/10] devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC family Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:20 +0100
Re: [PATCH 06/10] devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC family Rob Herring <robh@kernel.org> - 2016-02-02 22:30 +0100
Re: [PATCH 06/10] devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC family Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-03 09:10 +0100
[PATCH 03/10] arm64: add Armada 3700 architecture entry Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-02 19:20 +0100
Re: [PATCH 03/10] arm64: add Armada 3700 architecture entry Jisheng Zhang <jszhang@marvell.com> - 2016-02-03 07:30 +0100
Re: [PATCH 03/10] arm64: add Armada 3700 architecture entry Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-03 09:00 +0100
Re: [PATCH 03/10] arm64: add Armada 3700 architecture entry Arnd Bergmann <arnd@arndb.de> - 2016-02-03 10:20 +0100
Re: [PATCH 03/10] arm64: add Armada 3700 architecture entry Gregory CLEMENT <gregory.clement@free-electrons.com> - 2016-02-03 12:20 +0100
Page 1 of 2 [1] 2 Next page →
| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-02 19:10 +0100 |
| Subject | [PATCH 00/10] Add support for the Armada 3700 SoC an mvebu ARM64 based |
| Message-ID | <qXNyN-6U3-3@gated-at.bofh.it> |
Hi,
This series introduce the support of the Armada 3700 family: it is the
first ARM64 SoC of the mvebu family submitted to the mainline!
Currently there are two members of the Armada 3700 family, the only
difference is the number of core: the Armada 3710 comes with one
Cortex-A53 whereas the Armada 3720 comes with 2 Cortex-A53. In this
series we enabled only the minimum to boot, pinctrl and clock tree
will come soon.
Besides this the patches are pretty usual:
The first patch introduces a new serial driver for the uart used on
this SoC. The driver remains simple even if the hardware is capable of
doing more.
The second one adapts the ahci driver to support the Armada 3700 SoC.
The forth patch updates the binding documentation with the new
compatible string.
The third patch adds a new entry Kconfig entry for this SoC family.
I took the opportunity of this series to tidy up the Marvell related
files in the binding documentation with the fifth patch.
The sixth patch introduces the compatible string for the SoCs of the
Armada 3700 family.
The seventh patch could be considered as the bulk of this series: it
adds the device tree files for the Armada 3700 SoCs and for the
reference board.
With the introduction of this new family the MAINTAINERS file, the
Marvell README and the ARM64 defconfig files have to be updated: it is
the purpose of the last 3 patches.
The first two patches could be taken directly by the maintainer of
their respective subsystem as there is no dependency at all with the
rest of the series. I think that the rest of the series should go
through the arm-soc maintainer but in doubt I also added the ARM64
maintainer as suggested by get_maintainer.pl. Actually all the patches
are independents.
Thanks,
Gregory
Gregory CLEMENT (8):
arm64: add Armada 3700 architecture entry
Documentation: dt-bindings: Add a new compatible for the Armada 3700
Documentation: dt: Tidy up the Marvell related files
devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC
family
arm64: dts: add the Marvell Armada 3700 family and a development board
MAINTAINERS: Extend dts entry for ARM64 mvebu files
Documentation: arm: update supported Marvell EBU processors
arm64: defconfig: enable Armada 3700 related config
Lior Amsalem (1):
ata: ahci_mvebu: add support for Armada 3700 variant
Wilson Ding (1):
serial: mvebu-uart: initial support for Armada-3700 serial port
Documentation/arm/Marvell/README | 13 +
.../arm/{ => marvell}/armada-370-xp-pmsu.txt | 0
.../bindings/arm/{ => marvell}/armada-370-xp.txt | 0
.../bindings/arm/{ => marvell}/armada-375.txt | 0
.../bindings/arm/marvell/armada-37xx.txt | 17 +
.../{ => marvell}/armada-380-mpcore-soc-ctrl.txt | 0
.../bindings/arm/{ => marvell}/armada-38x.txt | 0
.../bindings/arm/{ => marvell}/armada-39x.txt | 0
.../arm/{ => marvell}/armada-cpu-reset.txt | 0
.../arm/{ => marvell}/coherency-fabric.txt | 0
.../bindings/arm/{ => marvell}/kirkwood.txt | 0
.../bindings/arm/{ => marvell}/marvell,berlin.txt | 0
.../bindings/arm/{ => marvell}/marvell,dove.txt | 0
.../arm/{ => marvell}/marvell,kirkwood.txt | 0
.../arm/{ => marvell}/mvebu-cpu-config.txt | 0
.../arm/{ => marvell}/mvebu-system-controller.txt | 0
.../devicetree/bindings/ata/ahci-platform.txt | 1 +
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.txt | 6 +
MAINTAINERS | 1 +
arch/arm64/Kconfig.platforms | 6 +
arch/arm64/boot/dts/marvell/Makefile | 4 +
arch/arm64/boot/dts/marvell/armada-371x.dtsi | 53 ++
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 87 +++
arch/arm64/boot/dts/marvell/armada-372x.dtsi | 63 ++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 131 +++++
arch/arm64/configs/defconfig | 5 +
drivers/ata/Kconfig | 2 +-
drivers/ata/ahci_mvebu.c | 14 +-
drivers/tty/serial/Kconfig | 22 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/mvebu-uart.c | 649 +++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
33 files changed, 1085 insertions(+), 6 deletions(-)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp-pmsu.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-375.txt (100%)
create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-380-mpcore-soc-ctrl.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-38x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-39x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-cpu-reset.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/coherency-fabric.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,berlin.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,dove.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-cpu-config.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-system-controller.txt (100%)
create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
create mode 100644 arch/arm64/boot/dts/marvell/armada-371x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-db.dts
create mode 100644 arch/arm64/boot/dts/marvell/armada-372x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-37xx.dtsi
create mode 100644 drivers/tty/serial/mvebu-uart.c
--
2.5.0
[toc] | [next] | [standalone]
| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-02 19:10 +0100 |
| Subject | [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qXNyP-6U3-23@gated-at.bofh.it> |
| In reply to | #1324346 |
From: Wilson Ding <dingwei@marvell.com>
Armada-3700's uart is a simple serial port, which doesn't
support. Configuring the modem control lines. The uart port has a 32
bytes Tx FIFO and a 64 bytes Rx FIFO
The uart driver implements the uart core operations. It also support the
system (early) console based on Armada-3700's serial port.
Known Issue:
The uart driver currently doesn't support clock programming, which means
the baud-rate stays with the default value configured by the bootloader
at boot time
[gregory.clement@free-electrons.com: Rewrite many part which are too long
to enumerate]
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.txt | 6 +
drivers/tty/serial/Kconfig | 22 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/mvebu-uart.c | 649 +++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
6 files changed, 694 insertions(+)
create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
create mode 100644 drivers/tty/serial/mvebu-uart.c
diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
new file mode 100644
index 000000000000..6087defd9f93
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
@@ -0,0 +1,13 @@
+* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
+
+Required properties:
+- compatible: "marvell,armada-3700-uart"
+- reg: offset and length of the register set for the device.
+- interrupts: device interrupt
+
+Example:
+ serial@12000 {
+ compatible = "marvell,armada-3700-uart";
+ reg = <0x12000 0x400>;
+ interrupts = <43>;
+ };
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 87d40a72f6a1..198f6bd56e84 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
A valid base address must be provided, and the serial
port must already be setup and configured.
+ mvebu_uart,<addr>
+ Start an early, polled-mode console on an some mvebu
+ SoC (as the Armada-3700) serial port at the specified
+ address. The serial port must already be setup and
+ configured. Options are not yet supported.
+
earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
earlyprintk=vga
earlyprintk=efi
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 39721ec4f415..b291f934d51b 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
depends on SERIAL_STM32=y
select SERIAL_CORE_CONSOLE
+config SERIAL_MVEBU_UART
+ bool "Marvell EBU serial port support"
+ select SERIAL_CORE
+ help
+ This driver is for Marvell EBU SoC's UART. If you have a machine
+ based on the Armada-3700 SoC and wish to use the on-board serial
+ port,
+ say 'Y' here.
+ Otherwise, say 'N'.
+
+config SERIAL_MVEBU_CONSOLE
+ bool "Console on Marvell EBU serial port"
+ depends on SERIAL_MVEBU_UART
+ select SERIAL_CORE_CONSOLE
+ select SERIAL_EARLYCON
+ default y
+ help
+ Say 'Y' here if you wish to use Armada-3700 UART as the system console.
+ (the system console is the device which receives all kernel messages
+ and warnings and which allows logins in single user mode)
+ Otherwise, say 'N'.
+
endmenu
config SERIAL_MCTRL_GPIO
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index b391c9b31960..988167595330 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
+obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
# GPIOLIB helpers for modem control lines
obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
new file mode 100644
index 000000000000..9624070d6058
--- /dev/null
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -0,0 +1,649 @@
+/*
+* ***************************************************************************
+* Copyright (C) 2015 Marvell International Ltd.
+* ***************************************************************************
+* This program is free software: you can redistribute it and/or modify it
+* under the terms of the GNU General Public License as published by the Free
+* Software Foundation, either version 2 of the License, or any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program. If not, see <http://www.gnu.org/licenses/>.
+* ***************************************************************************
+*/
+
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/slab.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+
+/* Register Map */
+#define UART_RBR 0x00
+#define RBR_BRK_DET BIT(15)
+#define RBR_FRM_ERR_DET BIT(14)
+#define RBR_PAR_ERR_DET BIT(13)
+#define RBR_OVR_ERR_DET BIT(12)
+
+#define UART_TSH 0x04
+
+#define UART_CTRL 0x08
+#define CTRL_SOFT_RST BIT(31)
+#define CTRL_TXFIFO_RST BIT(15)
+#define CTRL_RXFIFO_RST BIT(14)
+#define CTRL_ST_MIRR_EN BIT(13)
+#define CTRL_LPBK_EN BIT(12)
+#define CTRL_SND_BRK_SEQ BIT(11)
+#define CTRL_PAR_EN BIT(10)
+#define CTRL_TWO_STOP BIT(9)
+#define CTRL_TX_HFL_INT BIT(8)
+#define CTRL_RX_HFL_INT BIT(7)
+#define CTRL_TX_EMP_INT BIT(6)
+#define CTRL_TX_RDY_INT BIT(5)
+#define CTRL_RX_RDY_INT BIT(4)
+#define CTRL_BRK_DET_INT BIT(3)
+#define CTRL_FRM_ERR_INT BIT(2)
+#define CTRL_PAR_ERR_INT BIT(1)
+#define CTRL_OVR_ERR_INT BIT(0)
+#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
+ CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
+
+#define UART_STAT 0x0c
+#define STAT_TX_FIFO_EMP BIT(13)
+#define STAT_RX_FIFO_EMP BIT(12)
+#define STAT_TX_FIFO_FUL BIT(11)
+#define STAT_TX_FIFO_HFL BIT(10)
+#define STAT_RX_TOGL BIT(9)
+#define STAT_RX_FIFO_FUL BIT(8)
+#define STAT_RX_FIFO_HFL BIT(7)
+#define STAT_TX_EMP BIT(6)
+#define STAT_TX_RDY BIT(5)
+#define STAT_RX_RDY BIT(4)
+#define STAT_BRK_DET BIT(3)
+#define STAT_FRM_ERR BIT(2)
+#define STAT_PAR_ERR BIT(1)
+#define STAT_OVR_ERR BIT(0)
+#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
+ | STAT_PAR_ERR | STAT_OVR_ERR)
+
+#define UART_BRDV 0x10
+
+#define MVEBU_NR_UARTS 1
+
+#define MVEBU_UART_TYPE "mvebu-uart"
+
+static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
+
+struct mvebu_uart_data {
+ struct uart_port *port;
+ struct clk *clk;
+};
+
+/* Core UART Driver Operations */
+static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
+{
+ unsigned long flags;
+ unsigned int st;
+
+ spin_lock_irqsave(&port->lock, flags);
+ st = readl(port->membase + UART_STAT);
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
+}
+
+static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
+{
+ return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+}
+
+static void mvebu_uart_set_mctrl(struct uart_port *port,
+ unsigned int mctrl)
+{
+/*
+ * Even if we do not support configuring the modem control lines, this
+ * function must be proided to the serial core
+ */
+}
+
+static void mvebu_uart_stop_tx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl &= ~CTRL_TX_RDY_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_start_tx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl |= CTRL_TX_RDY_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_stop_rx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl &= ~CTRL_RX_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
+{
+ unsigned int ctl;
+ unsigned long flags;
+
+ spin_lock_irqsave(&port->lock, flags);
+ ctl = readl(port->membase + UART_CTRL);
+ if (brk == -1)
+ ctl |= CTRL_SND_BRK_SEQ;
+ else
+ ctl &= ~CTRL_SND_BRK_SEQ;
+ writel(ctl, port->membase + UART_CTRL);
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
+{
+ struct tty_port *tport = &port->state->port;
+ unsigned char ch = 0;
+ char flag = 0;
+
+ do {
+ if (status & STAT_RX_RDY) {
+ ch = readl(port->membase + UART_RBR);
+ ch &= 0xff;
+ flag = TTY_NORMAL;
+ port->icount.rx++;
+
+ if (status & STAT_PAR_ERR)
+ port->icount.parity++;
+ }
+
+ if (status & STAT_BRK_DET) {
+ port->icount.brk++;
+ status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
+ if (uart_handle_break(port))
+ goto ignore_char;
+ }
+
+ if (status & STAT_OVR_ERR)
+ port->icount.overrun++;
+
+ if (status & STAT_FRM_ERR)
+ port->icount.frame++;
+
+ if (uart_handle_sysrq_char(port, ch))
+ goto ignore_char;
+
+ if (status & port->ignore_status_mask & STAT_PAR_ERR)
+ status &= ~STAT_RX_RDY;
+
+ status &= port->read_status_mask;
+
+ if (status & STAT_PAR_ERR)
+ flag = TTY_PARITY;
+
+ status &= ~port->ignore_status_mask;
+
+ if (status & STAT_RX_RDY)
+ tty_insert_flip_char(tport, ch, flag);
+
+ if (status & STAT_BRK_DET)
+ tty_insert_flip_char(tport, 0, TTY_BREAK);
+
+ if (status & STAT_FRM_ERR)
+ tty_insert_flip_char(tport, 0, TTY_FRAME);
+
+ if (status & STAT_OVR_ERR)
+ tty_insert_flip_char(tport, 0, TTY_OVERRUN);
+
+ignore_char:
+ status = readl(port->membase + UART_STAT);
+ } while (status & (STAT_RX_RDY | STAT_BRK_DET));
+
+ tty_flip_buffer_push(tport);
+}
+
+static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
+{
+ struct circ_buf *xmit = &port->state->xmit;
+ unsigned int count;
+ unsigned int st;
+
+ if (port->x_char) {
+ writel(port->x_char, port->membase + UART_TSH);
+ port->icount.tx++;
+ port->x_char = 0;
+ return;
+ }
+
+ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+ mvebu_uart_stop_tx(port);
+ return;
+ }
+
+ for (count = 0; count < port->fifosize; count++) {
+ writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ port->icount.tx++;
+
+ if (uart_circ_empty(xmit))
+ break;
+
+ st = readl(port->membase + UART_STAT);
+ if (st & STAT_TX_FIFO_FUL)
+ break;
+ }
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(port);
+
+ if (uart_circ_empty(xmit))
+ mvebu_uart_stop_tx(port);
+}
+
+static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
+{
+ struct uart_port *port = (struct uart_port *)dev_id;
+ unsigned int st = readl(port->membase + UART_STAT);
+
+ if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
+ mvebu_uart_rx_chars(port, st);
+
+ if (st & STAT_TX_RDY)
+ mvebu_uart_tx_chars(port, st);
+
+ return IRQ_HANDLED;
+}
+
+static int mvebu_uart_startup(struct uart_port *port)
+{
+ int ret;
+
+ writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
+ port->membase + UART_CTRL);
+ udelay(1);
+ writel(CTRL_RX_INT, port->membase + UART_CTRL);
+
+ ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
+ port);
+ if (ret) {
+ dev_err(port->dev, "failed to request irq\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static void mvebu_uart_shutdown(struct uart_port *port)
+{
+ writel(0, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_set_termios(struct uart_port *port,
+ struct ktermios *termios,
+ struct ktermios *old)
+{
+ unsigned long flags;
+ unsigned int baud;
+
+ spin_lock_irqsave(&port->lock, flags);
+
+ port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
+ STAT_TX_RDY | STAT_TX_FIFO_FUL;
+
+ if (termios->c_iflag & INPCK)
+ port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
+
+ port->ignore_status_mask = 0;
+ if (termios->c_iflag & IGNPAR)
+ port->ignore_status_mask |=
+ STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
+
+ if ((termios->c_cflag & CREAD) == 0)
+ port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
+
+ baud = uart_get_baud_rate(port, termios, old, 0, 460800);
+ uart_update_timeout(port, termios->c_cflag, baud);
+
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static const char *mvebu_uart_type(struct uart_port *port)
+{
+ return MVEBU_UART_TYPE;
+}
+
+static void mvebu_uart_release_port(struct uart_port *port)
+{
+ /* Nothing to do here */
+}
+
+static int mvebu_uart_request_port(struct uart_port *port)
+{
+ return 0;
+}
+
+#ifdef CONFIG_CONSOLE_POLL
+static int mvebu_uart_get_poll_char(struct uart_port *port)
+{
+ unsigned int st = readl(port->membase + UART_STAT);
+
+ if (!(st & STAT_RX_RDY))
+ return NO_POLL_CHAR;
+
+ return readl(port->membase + UART_RBR);
+}
+
+static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
+{
+ unsigned int st;
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+
+ if (!(st & STAT_TX_FIFO_FUL))
+ break;
+
+ udelay(1);
+ }
+
+ writel(c, port->membase + UART_TSH);
+}
+#endif
+
+static const struct uart_ops mvebu_uart_ops = {
+ .tx_empty = mvebu_uart_tx_empty,
+ .set_mctrl = mvebu_uart_set_mctrl,
+ .get_mctrl = mvebu_uart_get_mctrl,
+ .stop_tx = mvebu_uart_stop_tx,
+ .start_tx = mvebu_uart_start_tx,
+ .stop_rx = mvebu_uart_stop_rx,
+ .break_ctl = mvebu_uart_break_ctl,
+ .startup = mvebu_uart_startup,
+ .shutdown = mvebu_uart_shutdown,
+ .set_termios = mvebu_uart_set_termios,
+ .type = mvebu_uart_type,
+ .release_port = mvebu_uart_release_port,
+ .request_port = mvebu_uart_request_port,
+#ifdef CONFIG_CONSOLE_POLL
+ .poll_get_char = mvebu_uart_get_poll_char,
+ .poll_put_char = mvebu_uart_put_poll_char,
+#endif
+};
+
+/* Console Driver Operations */
+
+#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
+/* Early Console */
+static void mvebu_uart_putc(struct uart_port *port, int c)
+{
+ unsigned int st;
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+ if (!(st & STAT_TX_FIFO_FUL))
+ break;
+ }
+
+ writel(c, port->membase + UART_TSH);
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+ if (st & STAT_TX_FIFO_EMP)
+ break;
+ }
+}
+
+static void mvebu_uart_putc_early_write(struct console *con,
+ const char *s,
+ unsigned n)
+{
+ struct earlycon_device *dev = con->data;
+
+ uart_console_write(&dev->port, s, n, mvebu_uart_putc);
+}
+
+static int __init
+mvebu_uart_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+ if (!device->port.membase)
+ return -ENODEV;
+
+ device->con->write = mvebu_uart_putc_early_write;
+
+ return 0;
+}
+
+EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
+OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
+ mvebu_uart_early_console_setup);
+
+static void wait_for_xmitr(struct uart_port *port)
+{
+ u32 val;
+
+ readl_poll_timeout_atomic(port->membase + UART_STAT, val,
+ (val & STAT_TX_EMP), 1, 10000);
+}
+
+static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
+{
+ wait_for_xmitr(port);
+ writel(ch, port->membase + UART_TSH);
+}
+
+static void mvebu_uart_console_write(struct console *co, const char *s,
+ unsigned int count)
+{
+ struct uart_port *port = &mvebu_uart_ports[co->index];
+ unsigned long flags;
+ unsigned int ier;
+ int locked = 1;
+
+ if (oops_in_progress)
+ locked = spin_trylock_irqsave(&port->lock, flags);
+ else
+ spin_lock_irqsave(&port->lock, flags);
+
+ ier = readl(port->membase + UART_CTRL) &
+ (CTRL_RX_INT | CTRL_TX_RDY_INT);
+ writel(0, port->membase + UART_CTRL);
+
+ uart_console_write(port, s, count, mvebu_uart_console_putchar);
+
+ wait_for_xmitr(port);
+
+ if (ier)
+ writel(ier, port->membase + UART_CTRL);
+
+ if (locked)
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static int mvebu_uart_console_setup(struct console *co, char *options)
+{
+ struct uart_port *port;
+ int baud = 9600;
+ int bits = 8;
+ int parity = 'n';
+ int flow = 'n';
+
+ if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
+ return -EINVAL;
+
+ port = &mvebu_uart_ports[co->index];
+
+ if (!port->mapbase || !port->membase) {
+ pr_debug("console on ttyS%i not present\n", co->index);
+ return -ENODEV;
+ }
+
+ if (options)
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+ return uart_set_options(port, co, baud, parity, bits, flow);
+}
+
+static struct uart_driver mvebu_uart_driver;
+
+static struct console mvebu_uart_console = {
+ .name = "ttyS",
+ .write = mvebu_uart_console_write,
+ .device = uart_console_device,
+ .setup = mvebu_uart_console_setup,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+ .data = &mvebu_uart_driver,
+};
+
+static int __init mvebu_uart_console_init(void)
+{
+ register_console(&mvebu_uart_console);
+ return 0;
+}
+
+console_initcall(mvebu_uart_console_init);
+
+
+#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
+
+static struct uart_driver mvebu_uart_driver = {
+ .owner = THIS_MODULE,
+ .driver_name = "serial",
+ .dev_name = "ttyS",
+ .major = TTY_MAJOR,
+ .minor = 64,
+ .nr = MVEBU_NR_UARTS,
+#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
+ .cons = &mvebu_uart_console,
+#endif
+};
+
+static int mvebu_uart_probe(struct platform_device *pdev)
+{
+ struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ struct uart_port *port;
+ struct mvebu_uart_data *data;
+ int ret;
+
+ if (!reg || !irq) {
+ dev_err(&pdev->dev, "no registers/irq defined\n");
+ return -EINVAL;
+ }
+
+ port = &mvebu_uart_ports[0];
+
+ spin_lock_init(&port->lock);
+
+ port->dev = &pdev->dev;
+ port->type = PORT_MVEBU;
+ port->ops = &mvebu_uart_ops;
+ port->regshift = 0;
+
+ port->fifosize = 32;
+ port->iotype = UPIO_MEM32;
+ port->flags = UPF_FIXED_PORT;
+ port->line = 0; /* single port: force line number to 0 */
+
+ port->irq = irq->start;
+ port->irqflags = 0;
+ port->mapbase = reg->start;
+
+ port->membase = devm_ioremap_resource(&pdev->dev, reg);
+ if (IS_ERR(port->membase))
+ return -PTR_ERR(port->membase);
+
+ data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
+ GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->port = port;
+
+ port->private_data = data;
+ platform_set_drvdata(pdev, data);
+
+ ret = uart_add_one_port(&mvebu_uart_driver, port);
+ if (ret)
+ return ret;
+ return 0;
+}
+
+static int mvebu_uart_remove(struct platform_device *pdev)
+{
+ struct mvebu_uart_data *data = platform_get_drvdata(pdev);
+
+ uart_remove_one_port(&mvebu_uart_driver, data->port);
+ data->port->private_data = NULL;
+ data->port->mapbase = 0;
+ return 0;
+}
+
+/* Match table for of_platform binding */
+static const struct of_device_id mvebu_uart_of_match[] = {
+ { .compatible = "marvell,armada-3700-uart", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
+
+static struct platform_driver mvebu_uart_platform_driver = {
+ .probe = mvebu_uart_probe,
+ .remove = mvebu_uart_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "mvebu-uart",
+ .of_match_table = of_match_ptr(mvebu_uart_of_match),
+ },
+};
+
+static int __init mvebu_uart_init(void)
+{
+ int ret;
+
+ ret = uart_register_driver(&mvebu_uart_driver);
+ if (ret)
+ return ret;
+
+ ret = platform_driver_register(&mvebu_uart_platform_driver);
+ if (ret)
+ uart_unregister_driver(&mvebu_uart_driver);
+
+ return ret;
+}
+
+static void __exit mvebu_uart_exit(void)
+{
+ platform_driver_unregister(&mvebu_uart_platform_driver);
+ uart_unregister_driver(&mvebu_uart_driver);
+}
+
+arch_initcall(mvebu_uart_init);
+module_exit(mvebu_uart_exit);
+
+MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
+MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
+MODULE_LICENSE("GPL");
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 3e5d757407fb..e513a4ee369b 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -261,4 +261,7 @@
/* STM32 USART */
#define PORT_STM32 113
+/* MVEBU UART */
+#define PORT_MVEBU 114
+
#endif /* _UAPILINUX_SERIAL_CORE_H */
--
2.5.0
[toc] | [prev] | [next] | [standalone]
| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Date | 2016-02-02 19:30 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qXNSa-72M-3@gated-at.bofh.it> |
| In reply to | #1324347 |
On Tue, Feb 02, 2016 at 07:07:39PM +0100, Gregory CLEMENT wrote:
> From: Wilson Ding <dingwei@marvell.com>
>
> Armada-3700's uart is a simple serial port, which doesn't
> support. Configuring the modem control lines. The uart port has a 32
> bytes Tx FIFO and a 64 bytes Rx FIFO
>
> The uart driver implements the uart core operations. It also support the
> system (early) console based on Armada-3700's serial port.
>
> Known Issue:
>
> The uart driver currently doesn't support clock programming, which means
> the baud-rate stays with the default value configured by the bootloader
> at boot time
This looks like any other early console.
Why does this not use the earlycon infrastructure?
See {OF_,}EARLYCON_DECLARE (e.g. in drivers/tty/serial/amba-pl011.c).
Mark.
> [gregory.clement@free-electrons.com: Rewrite many part which are too long
> to enumerate]
>
> Signed-off-by: Wilson Ding <dingwei@marvell.com>
> Signed-off-by: Nadav Haklai <nadavh@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> .../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
> Documentation/kernel-parameters.txt | 6 +
> drivers/tty/serial/Kconfig | 22 +
> drivers/tty/serial/Makefile | 1 +
> drivers/tty/serial/mvebu-uart.c | 649 +++++++++++++++++++++
> include/uapi/linux/serial_core.h | 3 +
> 6 files changed, 694 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> create mode 100644 drivers/tty/serial/mvebu-uart.c
>
> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> new file mode 100644
> index 000000000000..6087defd9f93
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> @@ -0,0 +1,13 @@
> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
> +
> +Required properties:
> +- compatible: "marvell,armada-3700-uart"
> +- reg: offset and length of the register set for the device.
> +- interrupts: device interrupt
> +
> +Example:
> + serial@12000 {
> + compatible = "marvell,armada-3700-uart";
> + reg = <0x12000 0x400>;
> + interrupts = <43>;
> + };
> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
> index 87d40a72f6a1..198f6bd56e84 100644
> --- a/Documentation/kernel-parameters.txt
> +++ b/Documentation/kernel-parameters.txt
> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
> A valid base address must be provided, and the serial
> port must already be setup and configured.
>
> + mvebu_uart,<addr>
> + Start an early, polled-mode console on an some mvebu
> + SoC (as the Armada-3700) serial port at the specified
> + address. The serial port must already be setup and
> + configured. Options are not yet supported.
> +
> earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
> earlyprintk=vga
> earlyprintk=efi
> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> index 39721ec4f415..b291f934d51b 100644
> --- a/drivers/tty/serial/Kconfig
> +++ b/drivers/tty/serial/Kconfig
> @@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
> depends on SERIAL_STM32=y
> select SERIAL_CORE_CONSOLE
>
> +config SERIAL_MVEBU_UART
> + bool "Marvell EBU serial port support"
> + select SERIAL_CORE
> + help
> + This driver is for Marvell EBU SoC's UART. If you have a machine
> + based on the Armada-3700 SoC and wish to use the on-board serial
> + port,
> + say 'Y' here.
> + Otherwise, say 'N'.
> +
> +config SERIAL_MVEBU_CONSOLE
> + bool "Console on Marvell EBU serial port"
> + depends on SERIAL_MVEBU_UART
> + select SERIAL_CORE_CONSOLE
> + select SERIAL_EARLYCON
> + default y
> + help
> + Say 'Y' here if you wish to use Armada-3700 UART as the system console.
> + (the system console is the device which receives all kernel messages
> + and warnings and which allows logins in single user mode)
> + Otherwise, say 'N'.
> +
> endmenu
>
> config SERIAL_MCTRL_GPIO
> diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
> index b391c9b31960..988167595330 100644
> --- a/drivers/tty/serial/Makefile
> +++ b/drivers/tty/serial/Makefile
> @@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
> obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
> obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
> obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
> +obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
>
> # GPIOLIB helpers for modem control lines
> obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
> diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
> new file mode 100644
> index 000000000000..9624070d6058
> --- /dev/null
> +++ b/drivers/tty/serial/mvebu-uart.c
> @@ -0,0 +1,649 @@
> +/*
> +* ***************************************************************************
> +* Copyright (C) 2015 Marvell International Ltd.
> +* ***************************************************************************
> +* This program is free software: you can redistribute it and/or modify it
> +* under the terms of the GNU General Public License as published by the Free
> +* Software Foundation, either version 2 of the License, or any later version.
> +*
> +* This program is distributed in the hope that it will be useful,
> +* but WITHOUT ANY WARRANTY; without even the implied warranty of
> +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +* GNU General Public License for more details.
> +*
> +* You should have received a copy of the GNU General Public License
> +* along with this program. If not, see <http://www.gnu.org/licenses/>.
> +* ***************************************************************************
> +*/
> +
> +#include <linux/clk.h>
> +#include <linux/console.h>
> +#include <linux/delay.h>
> +#include <linux/device.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/serial.h>
> +#include <linux/serial_core.h>
> +#include <linux/slab.h>
> +#include <linux/tty.h>
> +#include <linux/tty_flip.h>
> +
> +/* Register Map */
> +#define UART_RBR 0x00
> +#define RBR_BRK_DET BIT(15)
> +#define RBR_FRM_ERR_DET BIT(14)
> +#define RBR_PAR_ERR_DET BIT(13)
> +#define RBR_OVR_ERR_DET BIT(12)
> +
> +#define UART_TSH 0x04
> +
> +#define UART_CTRL 0x08
> +#define CTRL_SOFT_RST BIT(31)
> +#define CTRL_TXFIFO_RST BIT(15)
> +#define CTRL_RXFIFO_RST BIT(14)
> +#define CTRL_ST_MIRR_EN BIT(13)
> +#define CTRL_LPBK_EN BIT(12)
> +#define CTRL_SND_BRK_SEQ BIT(11)
> +#define CTRL_PAR_EN BIT(10)
> +#define CTRL_TWO_STOP BIT(9)
> +#define CTRL_TX_HFL_INT BIT(8)
> +#define CTRL_RX_HFL_INT BIT(7)
> +#define CTRL_TX_EMP_INT BIT(6)
> +#define CTRL_TX_RDY_INT BIT(5)
> +#define CTRL_RX_RDY_INT BIT(4)
> +#define CTRL_BRK_DET_INT BIT(3)
> +#define CTRL_FRM_ERR_INT BIT(2)
> +#define CTRL_PAR_ERR_INT BIT(1)
> +#define CTRL_OVR_ERR_INT BIT(0)
> +#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
> + CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
> +
> +#define UART_STAT 0x0c
> +#define STAT_TX_FIFO_EMP BIT(13)
> +#define STAT_RX_FIFO_EMP BIT(12)
> +#define STAT_TX_FIFO_FUL BIT(11)
> +#define STAT_TX_FIFO_HFL BIT(10)
> +#define STAT_RX_TOGL BIT(9)
> +#define STAT_RX_FIFO_FUL BIT(8)
> +#define STAT_RX_FIFO_HFL BIT(7)
> +#define STAT_TX_EMP BIT(6)
> +#define STAT_TX_RDY BIT(5)
> +#define STAT_RX_RDY BIT(4)
> +#define STAT_BRK_DET BIT(3)
> +#define STAT_FRM_ERR BIT(2)
> +#define STAT_PAR_ERR BIT(1)
> +#define STAT_OVR_ERR BIT(0)
> +#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
> + | STAT_PAR_ERR | STAT_OVR_ERR)
> +
> +#define UART_BRDV 0x10
> +
> +#define MVEBU_NR_UARTS 1
> +
> +#define MVEBU_UART_TYPE "mvebu-uart"
> +
> +static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
> +
> +struct mvebu_uart_data {
> + struct uart_port *port;
> + struct clk *clk;
> +};
> +
> +/* Core UART Driver Operations */
> +static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
> +{
> + unsigned long flags;
> + unsigned int st;
> +
> + spin_lock_irqsave(&port->lock, flags);
> + st = readl(port->membase + UART_STAT);
> + spin_unlock_irqrestore(&port->lock, flags);
> +
> + return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
> +}
> +
> +static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
> +{
> + return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
> +}
> +
> +static void mvebu_uart_set_mctrl(struct uart_port *port,
> + unsigned int mctrl)
> +{
> +/*
> + * Even if we do not support configuring the modem control lines, this
> + * function must be proided to the serial core
> + */
> +}
> +
> +static void mvebu_uart_stop_tx(struct uart_port *port)
> +{
> + unsigned int ctl = readl(port->membase + UART_CTRL);
> +
> + ctl &= ~CTRL_TX_RDY_INT;
> + writel(ctl, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_start_tx(struct uart_port *port)
> +{
> + unsigned int ctl = readl(port->membase + UART_CTRL);
> +
> + ctl |= CTRL_TX_RDY_INT;
> + writel(ctl, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_stop_rx(struct uart_port *port)
> +{
> + unsigned int ctl = readl(port->membase + UART_CTRL);
> +
> + ctl &= ~CTRL_RX_INT;
> + writel(ctl, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
> +{
> + unsigned int ctl;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&port->lock, flags);
> + ctl = readl(port->membase + UART_CTRL);
> + if (brk == -1)
> + ctl |= CTRL_SND_BRK_SEQ;
> + else
> + ctl &= ~CTRL_SND_BRK_SEQ;
> + writel(ctl, port->membase + UART_CTRL);
> + spin_unlock_irqrestore(&port->lock, flags);
> +}
> +
> +static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
> +{
> + struct tty_port *tport = &port->state->port;
> + unsigned char ch = 0;
> + char flag = 0;
> +
> + do {
> + if (status & STAT_RX_RDY) {
> + ch = readl(port->membase + UART_RBR);
> + ch &= 0xff;
> + flag = TTY_NORMAL;
> + port->icount.rx++;
> +
> + if (status & STAT_PAR_ERR)
> + port->icount.parity++;
> + }
> +
> + if (status & STAT_BRK_DET) {
> + port->icount.brk++;
> + status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
> + if (uart_handle_break(port))
> + goto ignore_char;
> + }
> +
> + if (status & STAT_OVR_ERR)
> + port->icount.overrun++;
> +
> + if (status & STAT_FRM_ERR)
> + port->icount.frame++;
> +
> + if (uart_handle_sysrq_char(port, ch))
> + goto ignore_char;
> +
> + if (status & port->ignore_status_mask & STAT_PAR_ERR)
> + status &= ~STAT_RX_RDY;
> +
> + status &= port->read_status_mask;
> +
> + if (status & STAT_PAR_ERR)
> + flag = TTY_PARITY;
> +
> + status &= ~port->ignore_status_mask;
> +
> + if (status & STAT_RX_RDY)
> + tty_insert_flip_char(tport, ch, flag);
> +
> + if (status & STAT_BRK_DET)
> + tty_insert_flip_char(tport, 0, TTY_BREAK);
> +
> + if (status & STAT_FRM_ERR)
> + tty_insert_flip_char(tport, 0, TTY_FRAME);
> +
> + if (status & STAT_OVR_ERR)
> + tty_insert_flip_char(tport, 0, TTY_OVERRUN);
> +
> +ignore_char:
> + status = readl(port->membase + UART_STAT);
> + } while (status & (STAT_RX_RDY | STAT_BRK_DET));
> +
> + tty_flip_buffer_push(tport);
> +}
> +
> +static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
> +{
> + struct circ_buf *xmit = &port->state->xmit;
> + unsigned int count;
> + unsigned int st;
> +
> + if (port->x_char) {
> + writel(port->x_char, port->membase + UART_TSH);
> + port->icount.tx++;
> + port->x_char = 0;
> + return;
> + }
> +
> + if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
> + mvebu_uart_stop_tx(port);
> + return;
> + }
> +
> + for (count = 0; count < port->fifosize; count++) {
> + writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
> + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
> + port->icount.tx++;
> +
> + if (uart_circ_empty(xmit))
> + break;
> +
> + st = readl(port->membase + UART_STAT);
> + if (st & STAT_TX_FIFO_FUL)
> + break;
> + }
> +
> + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
> + uart_write_wakeup(port);
> +
> + if (uart_circ_empty(xmit))
> + mvebu_uart_stop_tx(port);
> +}
> +
> +static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
> +{
> + struct uart_port *port = (struct uart_port *)dev_id;
> + unsigned int st = readl(port->membase + UART_STAT);
> +
> + if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
> + mvebu_uart_rx_chars(port, st);
> +
> + if (st & STAT_TX_RDY)
> + mvebu_uart_tx_chars(port, st);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int mvebu_uart_startup(struct uart_port *port)
> +{
> + int ret;
> +
> + writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
> + port->membase + UART_CTRL);
> + udelay(1);
> + writel(CTRL_RX_INT, port->membase + UART_CTRL);
> +
> + ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
> + port);
> + if (ret) {
> + dev_err(port->dev, "failed to request irq\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static void mvebu_uart_shutdown(struct uart_port *port)
> +{
> + writel(0, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_set_termios(struct uart_port *port,
> + struct ktermios *termios,
> + struct ktermios *old)
> +{
> + unsigned long flags;
> + unsigned int baud;
> +
> + spin_lock_irqsave(&port->lock, flags);
> +
> + port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
> + STAT_TX_RDY | STAT_TX_FIFO_FUL;
> +
> + if (termios->c_iflag & INPCK)
> + port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
> +
> + port->ignore_status_mask = 0;
> + if (termios->c_iflag & IGNPAR)
> + port->ignore_status_mask |=
> + STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
> +
> + if ((termios->c_cflag & CREAD) == 0)
> + port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
> +
> + baud = uart_get_baud_rate(port, termios, old, 0, 460800);
> + uart_update_timeout(port, termios->c_cflag, baud);
> +
> + spin_unlock_irqrestore(&port->lock, flags);
> +}
> +
> +static const char *mvebu_uart_type(struct uart_port *port)
> +{
> + return MVEBU_UART_TYPE;
> +}
> +
> +static void mvebu_uart_release_port(struct uart_port *port)
> +{
> + /* Nothing to do here */
> +}
> +
> +static int mvebu_uart_request_port(struct uart_port *port)
> +{
> + return 0;
> +}
> +
> +#ifdef CONFIG_CONSOLE_POLL
> +static int mvebu_uart_get_poll_char(struct uart_port *port)
> +{
> + unsigned int st = readl(port->membase + UART_STAT);
> +
> + if (!(st & STAT_RX_RDY))
> + return NO_POLL_CHAR;
> +
> + return readl(port->membase + UART_RBR);
> +}
> +
> +static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
> +{
> + unsigned int st;
> +
> + for (;;) {
> + st = readl(port->membase + UART_STAT);
> +
> + if (!(st & STAT_TX_FIFO_FUL))
> + break;
> +
> + udelay(1);
> + }
> +
> + writel(c, port->membase + UART_TSH);
> +}
> +#endif
> +
> +static const struct uart_ops mvebu_uart_ops = {
> + .tx_empty = mvebu_uart_tx_empty,
> + .set_mctrl = mvebu_uart_set_mctrl,
> + .get_mctrl = mvebu_uart_get_mctrl,
> + .stop_tx = mvebu_uart_stop_tx,
> + .start_tx = mvebu_uart_start_tx,
> + .stop_rx = mvebu_uart_stop_rx,
> + .break_ctl = mvebu_uart_break_ctl,
> + .startup = mvebu_uart_startup,
> + .shutdown = mvebu_uart_shutdown,
> + .set_termios = mvebu_uart_set_termios,
> + .type = mvebu_uart_type,
> + .release_port = mvebu_uart_release_port,
> + .request_port = mvebu_uart_request_port,
> +#ifdef CONFIG_CONSOLE_POLL
> + .poll_get_char = mvebu_uart_get_poll_char,
> + .poll_put_char = mvebu_uart_put_poll_char,
> +#endif
> +};
> +
> +/* Console Driver Operations */
> +
> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
> +/* Early Console */
> +static void mvebu_uart_putc(struct uart_port *port, int c)
> +{
> + unsigned int st;
> +
> + for (;;) {
> + st = readl(port->membase + UART_STAT);
> + if (!(st & STAT_TX_FIFO_FUL))
> + break;
> + }
> +
> + writel(c, port->membase + UART_TSH);
> +
> + for (;;) {
> + st = readl(port->membase + UART_STAT);
> + if (st & STAT_TX_FIFO_EMP)
> + break;
> + }
> +}
> +
> +static void mvebu_uart_putc_early_write(struct console *con,
> + const char *s,
> + unsigned n)
> +{
> + struct earlycon_device *dev = con->data;
> +
> + uart_console_write(&dev->port, s, n, mvebu_uart_putc);
> +}
> +
> +static int __init
> +mvebu_uart_early_console_setup(struct earlycon_device *device,
> + const char *opt)
> +{
> + if (!device->port.membase)
> + return -ENODEV;
> +
> + device->con->write = mvebu_uart_putc_early_write;
> +
> + return 0;
> +}
> +
> +EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
> +OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
> + mvebu_uart_early_console_setup);
> +
> +static void wait_for_xmitr(struct uart_port *port)
> +{
> + u32 val;
> +
> + readl_poll_timeout_atomic(port->membase + UART_STAT, val,
> + (val & STAT_TX_EMP), 1, 10000);
> +}
> +
> +static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
> +{
> + wait_for_xmitr(port);
> + writel(ch, port->membase + UART_TSH);
> +}
> +
> +static void mvebu_uart_console_write(struct console *co, const char *s,
> + unsigned int count)
> +{
> + struct uart_port *port = &mvebu_uart_ports[co->index];
> + unsigned long flags;
> + unsigned int ier;
> + int locked = 1;
> +
> + if (oops_in_progress)
> + locked = spin_trylock_irqsave(&port->lock, flags);
> + else
> + spin_lock_irqsave(&port->lock, flags);
> +
> + ier = readl(port->membase + UART_CTRL) &
> + (CTRL_RX_INT | CTRL_TX_RDY_INT);
> + writel(0, port->membase + UART_CTRL);
> +
> + uart_console_write(port, s, count, mvebu_uart_console_putchar);
> +
> + wait_for_xmitr(port);
> +
> + if (ier)
> + writel(ier, port->membase + UART_CTRL);
> +
> + if (locked)
> + spin_unlock_irqrestore(&port->lock, flags);
> +}
> +
> +static int mvebu_uart_console_setup(struct console *co, char *options)
> +{
> + struct uart_port *port;
> + int baud = 9600;
> + int bits = 8;
> + int parity = 'n';
> + int flow = 'n';
> +
> + if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
> + return -EINVAL;
> +
> + port = &mvebu_uart_ports[co->index];
> +
> + if (!port->mapbase || !port->membase) {
> + pr_debug("console on ttyS%i not present\n", co->index);
> + return -ENODEV;
> + }
> +
> + if (options)
> + uart_parse_options(options, &baud, &parity, &bits, &flow);
> +
> + return uart_set_options(port, co, baud, parity, bits, flow);
> +}
> +
> +static struct uart_driver mvebu_uart_driver;
> +
> +static struct console mvebu_uart_console = {
> + .name = "ttyS",
> + .write = mvebu_uart_console_write,
> + .device = uart_console_device,
> + .setup = mvebu_uart_console_setup,
> + .flags = CON_PRINTBUFFER,
> + .index = -1,
> + .data = &mvebu_uart_driver,
> +};
> +
> +static int __init mvebu_uart_console_init(void)
> +{
> + register_console(&mvebu_uart_console);
> + return 0;
> +}
> +
> +console_initcall(mvebu_uart_console_init);
> +
> +
> +#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
> +
> +static struct uart_driver mvebu_uart_driver = {
> + .owner = THIS_MODULE,
> + .driver_name = "serial",
> + .dev_name = "ttyS",
> + .major = TTY_MAJOR,
> + .minor = 64,
> + .nr = MVEBU_NR_UARTS,
> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
> + .cons = &mvebu_uart_console,
> +#endif
> +};
> +
> +static int mvebu_uart_probe(struct platform_device *pdev)
> +{
> + struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> + struct uart_port *port;
> + struct mvebu_uart_data *data;
> + int ret;
> +
> + if (!reg || !irq) {
> + dev_err(&pdev->dev, "no registers/irq defined\n");
> + return -EINVAL;
> + }
> +
> + port = &mvebu_uart_ports[0];
> +
> + spin_lock_init(&port->lock);
> +
> + port->dev = &pdev->dev;
> + port->type = PORT_MVEBU;
> + port->ops = &mvebu_uart_ops;
> + port->regshift = 0;
> +
> + port->fifosize = 32;
> + port->iotype = UPIO_MEM32;
> + port->flags = UPF_FIXED_PORT;
> + port->line = 0; /* single port: force line number to 0 */
> +
> + port->irq = irq->start;
> + port->irqflags = 0;
> + port->mapbase = reg->start;
> +
> + port->membase = devm_ioremap_resource(&pdev->dev, reg);
> + if (IS_ERR(port->membase))
> + return -PTR_ERR(port->membase);
> +
> + data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
> + GFP_KERNEL);
> + if (!data)
> + return -ENOMEM;
> +
> + data->port = port;
> +
> + port->private_data = data;
> + platform_set_drvdata(pdev, data);
> +
> + ret = uart_add_one_port(&mvebu_uart_driver, port);
> + if (ret)
> + return ret;
> + return 0;
> +}
> +
> +static int mvebu_uart_remove(struct platform_device *pdev)
> +{
> + struct mvebu_uart_data *data = platform_get_drvdata(pdev);
> +
> + uart_remove_one_port(&mvebu_uart_driver, data->port);
> + data->port->private_data = NULL;
> + data->port->mapbase = 0;
> + return 0;
> +}
> +
> +/* Match table for of_platform binding */
> +static const struct of_device_id mvebu_uart_of_match[] = {
> + { .compatible = "marvell,armada-3700-uart", },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
> +
> +static struct platform_driver mvebu_uart_platform_driver = {
> + .probe = mvebu_uart_probe,
> + .remove = mvebu_uart_remove,
> + .driver = {
> + .owner = THIS_MODULE,
> + .name = "mvebu-uart",
> + .of_match_table = of_match_ptr(mvebu_uart_of_match),
> + },
> +};
> +
> +static int __init mvebu_uart_init(void)
> +{
> + int ret;
> +
> + ret = uart_register_driver(&mvebu_uart_driver);
> + if (ret)
> + return ret;
> +
> + ret = platform_driver_register(&mvebu_uart_platform_driver);
> + if (ret)
> + uart_unregister_driver(&mvebu_uart_driver);
> +
> + return ret;
> +}
> +
> +static void __exit mvebu_uart_exit(void)
> +{
> + platform_driver_unregister(&mvebu_uart_platform_driver);
> + uart_unregister_driver(&mvebu_uart_driver);
> +}
> +
> +arch_initcall(mvebu_uart_init);
> +module_exit(mvebu_uart_exit);
> +
> +MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
> +MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
> +MODULE_LICENSE("GPL");
> diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
> index 3e5d757407fb..e513a4ee369b 100644
> --- a/include/uapi/linux/serial_core.h
> +++ b/include/uapi/linux/serial_core.h
> @@ -261,4 +261,7 @@
> /* STM32 USART */
> #define PORT_STM32 113
>
> +/* MVEBU UART */
> +#define PORT_MVEBU 114
> +
> #endif /* _UAPILINUX_SERIAL_CORE_H */
> --
> 2.5.0
>
[toc] | [prev] | [next] | [standalone]
| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Date | 2016-02-02 19:30 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qXNSc-72M-63@gated-at.bofh.it> |
| In reply to | #1324396 |
On Tue, Feb 02, 2016 at 06:19:29PM +0000, Mark Rutland wrote: > On Tue, Feb 02, 2016 at 07:07:39PM +0100, Gregory CLEMENT wrote: > > From: Wilson Ding <dingwei@marvell.com> > > > > Armada-3700's uart is a simple serial port, which doesn't > > support. Configuring the modem control lines. The uart port has a 32 > > bytes Tx FIFO and a 64 bytes Rx FIFO > > > > The uart driver implements the uart core operations. It also support the > > system (early) console based on Armada-3700's serial port. > > > > Known Issue: > > > > The uart driver currently doesn't support clock programming, which means > > the baud-rate stays with the default value configured by the bootloader > > at boot time > > This looks like any other early console. > > Why does this not use the earlycon infrastructure? Ah, it does, and I misread the diff quite badly. Apologies for the noise. Mark.
[toc] | [prev] | [next] | [standalone]
| From | One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk> |
|---|---|
| Date | 2016-02-02 19:30 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qXNSa-72M-17@gated-at.bofh.it> |
| In reply to | #1324347 |
> +static void mvebu_uart_set_termios(struct uart_port *port,
> + struct ktermios *termios,
> + struct ktermios *old)
> +{
> + unsigned long flags;
> + unsigned int baud;
> +
> + spin_lock_irqsave(&port->lock, flags);
> +
> + port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
> + STAT_TX_RDY | STAT_TX_FIFO_FUL;
> +
> + if (termios->c_iflag & INPCK)
> + port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
> +
> + port->ignore_status_mask = 0;
> + if (termios->c_iflag & IGNPAR)
> + port->ignore_status_mask |=
> + STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
> +
> + if ((termios->c_cflag & CREAD) == 0)
> + port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
If you don't support parity or charactive size then you should be forcing
those bits in the tty->termios so that the caller sees what settings they
get. tty_termios_copy_hw is close to what you need except that you can
support IGNPAR.
You also want to provide the actual baud rate chosen (see how 8250.c does
it using tty_termios_encode_baud_rate().
> +static struct uart_driver mvebu_uart_driver = {
> + .owner = THIS_MODULE,
> + .driver_name = "serial",
> + .dev_name = "ttyS",
> + .major = TTY_MAJOR,
> + .minor = 64,
NAK
TTY_MAJOR 64+ is the 8250 driver and ttyS is the 8250 driver name. You
should be using a dynamic major (0) for all new drivers and you need to
pick a different and unused ttyXXX format name.
Alan
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| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-03 17:10 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qY8ae-4bZ-11@gated-at.bofh.it> |
| In reply to | #1324400 |
Hi,
On mar., févr. 02 2016, One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk> wrote:
>> +static void mvebu_uart_set_termios(struct uart_port *port,
>> + struct ktermios *termios,
>> + struct ktermios *old)
>> +{
>> + unsigned long flags;
>> + unsigned int baud;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> +
>> + port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
>> + STAT_TX_RDY | STAT_TX_FIFO_FUL;
>> +
>> + if (termios->c_iflag & INPCK)
>> + port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
>> +
>> + port->ignore_status_mask = 0;
>> + if (termios->c_iflag & IGNPAR)
>> + port->ignore_status_mask |=
>> + STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
>> +
>> + if ((termios->c_cflag & CREAD) == 0)
>> + port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
>
> If you don't support parity or charactive size then you should be forcing
> those bits in the tty->termios so that the caller sees what settings they
> get. tty_termios_copy_hw is close to what you need except that you can
> support IGNPAR.
OK thanks for the pointer.
>
> You also want to provide the actual baud rate chosen (see how 8250.c does
> it using tty_termios_encode_baud_rate().
>
>
>> +static struct uart_driver mvebu_uart_driver = {
>> + .owner = THIS_MODULE,
>> + .driver_name = "serial",
>> + .dev_name = "ttyS",
>> + .major = TTY_MAJOR,
>> + .minor = 64,
>
> NAK
>
> TTY_MAJOR 64+ is the 8250 driver and ttyS is the 8250 driver name. You
> should be using a dynamic major (0) for all new drivers and you need to
> pick a different and unused ttyXXX format name.
I missed this one, I will remove .major and .minor and use our own
ttyXX.
Thanks,
Gregory
>
> Alan
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Date | 2016-02-02 19:40 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qXO1S-76E-51@gated-at.bofh.it> |
| In reply to | #1324347 |
On Tue, Feb 02, 2016 at 07:07:39PM +0100, Gregory CLEMENT wrote:
> From: Wilson Ding <dingwei@marvell.com>
>
> Armada-3700's uart is a simple serial port, which doesn't
> support. Configuring the modem control lines. The uart port has a 32
> bytes Tx FIFO and a 64 bytes Rx FIFO
>
> The uart driver implements the uart core operations. It also support the
> system (early) console based on Armada-3700's serial port.
>
> Known Issue:
>
> The uart driver currently doesn't support clock programming, which means
> the baud-rate stays with the default value configured by the bootloader
> at boot time
To ensure that the bootloader and kernel match, it's best to place the
rate in the stdout-path property (as in
Documentation/devicetree/bindings/chosen.txt).
Presumably that is what you want?
Is it difficutl to add clock programming?
>
> [gregory.clement@free-electrons.com: Rewrite many part which are too long
> to enumerate]
>
> Signed-off-by: Wilson Ding <dingwei@marvell.com>
> Signed-off-by: Nadav Haklai <nadavh@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> .../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
> Documentation/kernel-parameters.txt | 6 +
> drivers/tty/serial/Kconfig | 22 +
> drivers/tty/serial/Makefile | 1 +
> drivers/tty/serial/mvebu-uart.c | 649 +++++++++++++++++++++
> include/uapi/linux/serial_core.h | 3 +
> 6 files changed, 694 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> create mode 100644 drivers/tty/serial/mvebu-uart.c
>
> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> new file mode 100644
> index 000000000000..6087defd9f93
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> @@ -0,0 +1,13 @@
> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
> +
> +Required properties:
> +- compatible: "marvell,armada-3700-uart"
> +- reg: offset and length of the register set for the device.
> +- interrupts: device interrupt
> +
> +Example:
> + serial@12000 {
> + compatible = "marvell,armada-3700-uart";
> + reg = <0x12000 0x400>;
> + interrupts = <43>;
> + };
There are no external clock inputs?
> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
> index 87d40a72f6a1..198f6bd56e84 100644
> --- a/Documentation/kernel-parameters.txt
> +++ b/Documentation/kernel-parameters.txt
> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
> A valid base address must be provided, and the serial
> port must already be setup and configured.
>
> + mvebu_uart,<addr>
> + Start an early, polled-mode console on an some mvebu
> + SoC (as the Armada-3700) serial port at the specified
> + address. The serial port must already be setup and
> + configured. Options are not yet supported.
> +
Does the the mvebu UART vary between platforms at all?
Thanks,
Mark.
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| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-03 17:40 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qY8Dg-4ol-5@gated-at.bofh.it> |
| In reply to | #1324440 |
Hi Mark,
On mar., févr. 02 2016, Mark Rutland <mark.rutland@arm.com> wrote:
> On Tue, Feb 02, 2016 at 07:07:39PM +0100, Gregory CLEMENT wrote:
>> From: Wilson Ding <dingwei@marvell.com>
>>
>> Armada-3700's uart is a simple serial port, which doesn't
>> support. Configuring the modem control lines. The uart port has a 32
>> bytes Tx FIFO and a 64 bytes Rx FIFO
>>
>> The uart driver implements the uart core operations. It also support the
>> system (early) console based on Armada-3700's serial port.
>>
>> Known Issue:
>>
>> The uart driver currently doesn't support clock programming, which means
>> the baud-rate stays with the default value configured by the bootloader
>> at boot time
>
> To ensure that the bootloader and kernel match, it's best to place the
> rate in the stdout-path property (as in
> Documentation/devicetree/bindings/chosen.txt).
>
> Presumably that is what you want?
It is done in patch 7.
>
> Is it difficutl to add clock programming?
Currently there is no clock tree support before adding it I would like
to be able to test it.
Thanks,
Gregory
>
>>
>> [gregory.clement@free-electrons.com: Rewrite many part which are too long
>> to enumerate]
>>
>> Signed-off-by: Wilson Ding <dingwei@marvell.com>
>> Signed-off-by: Nadav Haklai <nadavh@marvell.com>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>> ---
>> .../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
>> Documentation/kernel-parameters.txt | 6 +
>> drivers/tty/serial/Kconfig | 22 +
>> drivers/tty/serial/Makefile | 1 +
>> drivers/tty/serial/mvebu-uart.c | 649 +++++++++++++++++++++
>> include/uapi/linux/serial_core.h | 3 +
>> 6 files changed, 694 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> create mode 100644 drivers/tty/serial/mvebu-uart.c
>>
>> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> new file mode 100644
>> index 000000000000..6087defd9f93
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> @@ -0,0 +1,13 @@
>> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
>> +
>> +Required properties:
>> +- compatible: "marvell,armada-3700-uart"
>> +- reg: offset and length of the register set for the device.
>> +- interrupts: device interrupt
>> +
>> +Example:
>> + serial@12000 {
>> + compatible = "marvell,armada-3700-uart";
>> + reg = <0x12000 0x400>;
>> + interrupts = <43>;
>> + };
>
> There are no external clock inputs?
>
>> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
>> index 87d40a72f6a1..198f6bd56e84 100644
>> --- a/Documentation/kernel-parameters.txt
>> +++ b/Documentation/kernel-parameters.txt
>> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
>> A valid base address must be provided, and the serial
>> port must already be setup and configured.
>>
>> + mvebu_uart,<addr>
>> + Start an early, polled-mode console on an some mvebu
>> + SoC (as the Armada-3700) serial port at the specified
>> + address. The serial port must already be setup and
>> + configured. Options are not yet supported.
>> +
>
> Does the the mvebu UART vary between platforms at all?
>
> Thanks,
> Mark.
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-03 18:00 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qY8WD-4vK-43@gated-at.bofh.it> |
| In reply to | #1324440 |
Hi Mark,
On mar., févr. 02 2016, Mark Rutland <mark.rutland@arm.com> wrote:
>> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> new file mode 100644
>> index 000000000000..6087defd9f93
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> @@ -0,0 +1,13 @@
>> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
>> +
>> +Required properties:
>> +- compatible: "marvell,armada-3700-uart"
>> +- reg: offset and length of the register set for the device.
>> +- interrupts: device interrupt
>> +
>> +Example:
>> + serial@12000 {
>> + compatible = "marvell,armada-3700-uart";
>> + reg = <0x12000 0x400>;
>> + interrupts = <43>;
>> + };
>
> There are no external clock inputs?
Right, even if we don't use it in the driver we should ad it in the
binding because there is an external clock input.
>
>> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
>> index 87d40a72f6a1..198f6bd56e84 100644
>> --- a/Documentation/kernel-parameters.txt
>> +++ b/Documentation/kernel-parameters.txt
>> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
>> A valid base address must be provided, and the serial
>> port must already be setup and configured.
>>
>> + mvebu_uart,<addr>
>> + Start an early, polled-mode console on an some mvebu
>> + SoC (as the Armada-3700) serial port at the specified
>> + address. The serial port must already be setup and
>> + configured. Options are not yet supported.
>> +
>
> Does the the mvebu UART vary between platforms at all?
I am not sure to undersatnd your question.
If you asked about the UART used on the other mvebu SoCs then my answer
is: on all the other mvebu SoC until now third party IPs were used. This
one is the first one dedicated to an mevbu SoC and currently only used
on Armada 3700 but I don't know what are the plan for the future mvebu
SoCs.
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Date | 2016-02-03 18:10 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qY96j-4P4-31@gated-at.bofh.it> |
| In reply to | #1325689 |
On Wed, Feb 03, 2016 at 05:56:56PM +0100, Gregory CLEMENT wrote: > Hi Mark, > > On mar., févr. 02 2016, Mark Rutland <mark.rutland@arm.com> wrote: > >> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt > >> index 87d40a72f6a1..198f6bd56e84 100644 > >> --- a/Documentation/kernel-parameters.txt > >> +++ b/Documentation/kernel-parameters.txt > >> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. > >> A valid base address must be provided, and the serial > >> port must already be setup and configured. > >> > >> + mvebu_uart,<addr> > >> + Start an early, polled-mode console on an some mvebu > >> + SoC (as the Armada-3700) serial port at the specified > >> + address. The serial port must already be setup and > >> + configured. Options are not yet supported. > >> + > > > > Does the the mvebu UART vary between platforms at all? > > I am not sure to undersatnd your question. > > If you asked about the UART used on the other mvebu SoCs then my answer > is: on all the other mvebu SoC until now third party IPs were used. Ah, I hadn't realised that. > This one is the first one dedicated to an mevbu SoC and currently only > used on Armada 3700 but I don't know what are the plan for the future > mvebu SoCs. Given that, I think it would be better to use "armada3700_uart=" for now, given it doesn't cover all mvebu SoCs. Thanks, Mark.
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| From | Arnd Bergmann <arnd@arndb.de> |
|---|---|
| Date | 2016-02-02 22:10 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qXQn0-yg-1@gated-at.bofh.it> |
| In reply to | #1324347 |
On Tuesday 02 February 2016 19:07:39 Gregory CLEMENT wrote: > diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig > index 39721ec4f415..b291f934d51b 100644 > --- a/drivers/tty/serial/Kconfig > +++ b/drivers/tty/serial/Kconfig > @@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE > depends on SERIAL_STM32=y > select SERIAL_CORE_CONSOLE > > +config SERIAL_MVEBU_UART > + bool "Marvell EBU serial port support" Could this be a loadable module? > +config SERIAL_MVEBU_CONSOLE > + bool "Console on Marvell EBU serial port" > + depends on SERIAL_MVEBU_UART If yes, this would become depends on SERIAL_MVEBU_UART=y Arnd
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| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-03 17:50 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qY8MY-4sb-45@gated-at.bofh.it> |
| In reply to | #1324629 |
Hi Arnd, On mar., févr. 02 2016, Arnd Bergmann <arnd@arndb.de> wrote: > On Tuesday 02 February 2016 19:07:39 Gregory CLEMENT wrote: > >> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig >> index 39721ec4f415..b291f934d51b 100644 >> --- a/drivers/tty/serial/Kconfig >> +++ b/drivers/tty/serial/Kconfig >> @@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE >> depends on SERIAL_STM32=y >> select SERIAL_CORE_CONSOLE >> >> +config SERIAL_MVEBU_UART >> + bool "Marvell EBU serial port support" > > Could this be a loadable module? I don't see any reason to not being able to use it as a module. But I didn't test it because currently te serial port is the only way ro cimmunicate with the board. > >> +config SERIAL_MVEBU_CONSOLE >> + bool "Console on Marvell EBU serial port" >> + depends on SERIAL_MVEBU_UART > > If yes, this would become > > depends on SERIAL_MVEBU_UART=y OK, let's try to enable it. Thanks, Gregory > > Arnd > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2016-02-02 22:20 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qXQwH-BS-21@gated-at.bofh.it> |
| In reply to | #1324347 |
On Tue, Feb 02, 2016 at 07:07:39PM +0100, Gregory CLEMENT wrote: > From: Wilson Ding <dingwei@marvell.com> > > Armada-3700's uart is a simple serial port, which doesn't > support. Configuring the modem control lines. The uart port has a 32 > bytes Tx FIFO and a 64 bytes Rx FIFO > > The uart driver implements the uart core operations. It also support the > system (early) console based on Armada-3700's serial port. > > Known Issue: > > The uart driver currently doesn't support clock programming, which means > the baud-rate stays with the default value configured by the bootloader > at boot time > > [gregory.clement@free-electrons.com: Rewrite many part which are too long > to enumerate] > > Signed-off-by: Wilson Ding <dingwei@marvell.com> > Signed-off-by: Nadav Haklai <nadavh@marvell.com> > Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> > --- > .../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 + Acked-by: Rob Herring <robh@kernel.org> > Documentation/kernel-parameters.txt | 6 + > drivers/tty/serial/Kconfig | 22 + > drivers/tty/serial/Makefile | 1 + > drivers/tty/serial/mvebu-uart.c | 649 +++++++++++++++++++++ > include/uapi/linux/serial_core.h | 3 + > 6 files changed, 694 insertions(+) > create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt > create mode 100644 drivers/tty/serial/mvebu-uart.c
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| From | Marcin Wojtas <mw@semihalf.com> |
|---|---|
| Date | 2016-02-03 09:10 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qY0FI-7K9-21@gated-at.bofh.it> |
| In reply to | #1324347 |
Hi Gregory
> +
> +static int mvebu_uart_startup(struct uart_port *port)
> +{
> + int ret;
> +
> + writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
> + port->membase + UART_CTRL);
> + udelay(1);
> + writel(CTRL_RX_INT, port->membase + UART_CTRL);
> +
> + ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
> + port);
> + if (ret) {
> + dev_err(port->dev, "failed to request irq\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int mvebu_uart_probe(struct platform_device *pdev)
> +{
> + struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> + struct uart_port *port;
> + struct mvebu_uart_data *data;
> + int ret;
> +
> + if (!reg || !irq) {
> + dev_err(&pdev->dev, "no registers/irq defined\n");
> + return -EINVAL;
> + }
> +
> + port = &mvebu_uart_ports[0];
> +
> + spin_lock_init(&port->lock);
> +
> + port->dev = &pdev->dev;
> + port->type = PORT_MVEBU;
> + port->ops = &mvebu_uart_ops;
> + port->regshift = 0;
> +
> + port->fifosize = 32;
> + port->iotype = UPIO_MEM32;
> + port->flags = UPF_FIXED_PORT;
> + port->line = 0; /* single port: force line number to 0 */
> +
> + port->irq = irq->start;
> + port->irqflags = 0;
Please use port->irqflags = IRQF_SHARED;
As ubuntu opens multiple consoles A3700 can't boot to it (only to
buildroot with single console).
Best regards,
Marcin
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| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-03 17:50 +0100 |
| Subject | Re: [PATCH 01/10] serial: mvebu-uart: initial support for Armada-3700 serial port |
| Message-ID | <qY8MY-4sb-65@gated-at.bofh.it> |
| In reply to | #1325017 |
Hi Marcin,
On mer., févr. 03 2016, Marcin Wojtas <mw@semihalf.com> wrote:
> Hi Gregory
>
>> +
>> +static int mvebu_uart_startup(struct uart_port *port)
>> +{
>> + int ret;
>> +
>> + writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
>> + port->membase + UART_CTRL);
>> + udelay(1);
>> + writel(CTRL_RX_INT, port->membase + UART_CTRL);
>> +
>> + ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
>> + port);
>> + if (ret) {
>> + dev_err(port->dev, "failed to request irq\n");
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>
>> +static int mvebu_uart_probe(struct platform_device *pdev)
>> +{
>> + struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
>> + struct uart_port *port;
>> + struct mvebu_uart_data *data;
>> + int ret;
>> +
>> + if (!reg || !irq) {
>> + dev_err(&pdev->dev, "no registers/irq defined\n");
>> + return -EINVAL;
>> + }
>> +
>> + port = &mvebu_uart_ports[0];
>> +
>> + spin_lock_init(&port->lock);
>> +
>> + port->dev = &pdev->dev;
>> + port->type = PORT_MVEBU;
>> + port->ops = &mvebu_uart_ops;
>> + port->regshift = 0;
>> +
>> + port->fifosize = 32;
>> + port->iotype = UPIO_MEM32;
>> + port->flags = UPF_FIXED_PORT;
>> + port->line = 0; /* single port: force line number to 0 */
>> +
>> + port->irq = irq->start;
>> + port->irqflags = 0;
>
> Please use port->irqflags = IRQF_SHARED;
> As ubuntu opens multiple consoles A3700 can't boot to it (only to
> buildroot with single console).
But this irq is not shared, this looks like a hack hidding the real
issue.
Gregory
>
> Best regards,
> Marcin
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-02 19:20 +0100 |
| Subject | [PATCH 04/10] Documentation: dt-bindings: Add a new compatible for the Armada 3700 |
| Message-ID | <qXNIt-6Z3-1@gated-at.bofh.it> |
| In reply to | #1324346 |
The AHCI interfaces used in the Armada 3700 has a few differences with the one used in the Armada 38x, so it deserves its own compatible string. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> --- Documentation/devicetree/bindings/ata/ahci-platform.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt index c2340eeeb97f..796e2c23e5df 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt @@ -13,6 +13,7 @@ Required properties: - "hisilicon,hisi-ahci" - "ibm,476gtr-ahci" - "marvell,armada-380-ahci" + - "marvell,armada-3700-ahci" - "snps,dwc-ahci" - "snps,exynos5440-ahci" - "snps,spear-ahci" -- 2.5.0
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2016-02-02 22:30 +0100 |
| Subject | Re: [PATCH 04/10] Documentation: dt-bindings: Add a new compatible for the Armada 3700 |
| Message-ID | <qXQGm-FZ-9@gated-at.bofh.it> |
| In reply to | #1324350 |
On Tue, Feb 02, 2016 at 07:07:42PM +0100, Gregory CLEMENT wrote: > The AHCI interfaces used in the Armada 3700 has a few differences with > the one used in the Armada 38x, so it deserves its own compatible string. > > Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> > Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> > --- > Documentation/devicetree/bindings/ata/ahci-platform.txt | 1 + > 1 file changed, 1 insertion(+) Acked-by: Rob Herring <robh@kernel.org>
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| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-02 19:20 +0100 |
| Subject | [PATCH 08/10] MAINTAINERS: Extend dts entry for ARM64 mvebu files |
| Message-ID | <qXNIu-6Z3-13@gated-at.bofh.it> |
| In reply to | #1324346 |
Extend the mvebu entry to ARM64 device tree sources. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 30aca4aa5467..ad49b62c5abc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1279,6 +1279,7 @@ F: arch/arm/mach-mvebu/ F: drivers/rtc/rtc-armada38x.c F: arch/arm/boot/dts/armada* F: arch/arm/boot/dts/kirkwood* +F: arch/arm64/boot/dts/marvell/armada* ARM/Marvell Berlin SoC support -- 2.5.0
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| From | Gregory CLEMENT <gregory.clement@free-electrons.com> |
|---|---|
| Date | 2016-02-02 19:20 +0100 |
| Subject | [PATCH 07/10] arm64: dts: add the Marvell Armada 3700 family and a development board |
| Message-ID | <qXNIv-6Z3-35@gated-at.bofh.it> |
| In reply to | #1324346 |
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm64/boot/dts/marvell/Makefile | 4 +
arch/arm64/boot/dts/marvell/armada-371x.dtsi | 53 ++++++++++
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 87 ++++++++++++++++
arch/arm64/boot/dts/marvell/armada-372x.dtsi | 63 ++++++++++++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 131 +++++++++++++++++++++++++
5 files changed, 338 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/armada-371x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-db.dts
create mode 100644 arch/arm64/boot/dts/marvell/armada-372x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-37xx.dtsi
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index 348f4db4f313..bc2eabe1cab1 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -1,6 +1,10 @@
+# Berlin SoC Family
dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-dmp.dtb
dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-stb.dtb
+# Mvebu SoC Family
+dtb-$(CONFIG_ARCH_ARMADA_3700) += armada-3720-db.dtb
+
always := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/marvell/armada-371x.dtsi b/arch/arm64/boot/dts/marvell/armada-371x.dtsi
new file mode 100644
index 000000000000..c9e5325b8ac3
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-371x.dtsi
@@ -0,0 +1,53 @@
+/*
+ * Device Tree Include file for Marvell Armada 371x family of SoCs
+ * (also named 88F3710)
+ *
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "armada-37xx.dtsi"
+
+/ {
+ model = "Marvell Armada 3710 SoC";
+ compatible = "marvell,armada3710", "marvell,armada3700";
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
new file mode 100644
index 000000000000..76cae6ba2bd6
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -0,0 +1,87 @@
+/*
+ * Device Tree file for Marvell Armada 3720 development board
+ * (DB-88F3720-DDR3)
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "armada-372x.dtsi"
+
+/ {
+ model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
+ compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3700";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ /* use only 256 MB on the 512 MB available */
+ reg = <0x00000000 0x00000000 0x00000000 0x10000000>;
+ };
+
+ soc {
+ internal-regs {
+ /*
+ * Exported on the micro USB connector CON32
+ * through an FTDI
+ */
+ uart0: serial@12000 {
+ status = "okay";
+ };
+
+ /* CON31 */
+ usb3@58000 {
+ status = "okay";
+ };
+
+ /* CON3 */
+ sata@e0000 {
+ status = "okay";
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/marvell/armada-372x.dtsi b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
new file mode 100644
index 000000000000..f57f41c20ddf
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
@@ -0,0 +1,63 @@
+/*
+ * Device Tree Include file for Marvell Armada 372x family of SoCs
+ * (also named 88F3720)
+ *
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "armada-37xx.dtsi"
+
+/ {
+ model = "Marvell Armada 3720 SoC";
+ compatible = "marvell,armada3720", "marvell,armada3700";
+
+ cpus {
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x1>;
+ enable-method = "psci";
+ };
+ };
+
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
new file mode 100644
index 000000000000..ba9df7ff2a72
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -0,0 +1,131 @@
+/*
+ * Device Tree Include file for Marvell Armada 37xx family of SoCs.
+ *
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Marvell Armada 37xx SoC";
+ compatible = "marvell,armada3700";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ internal-regs {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ /* 32M internal register @ 0xd000_0000 */
+ ranges = <0x0 0x0 0xd0000000 0x2000000>;
+
+ uart0: serial@12000 {
+ compatible = "marvell,armada-3700-uart";
+ reg = <0x12000 0x400>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ usb3@58000 {
+ compatible = "generic-xhci";
+ reg = <0x58000 0x4000>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sata@e0000 {
+ compatible = "marvell,armada-3700-ahci";
+ reg = <0xe0000 0x2000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller@1d00000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1d00000 0x10000>, /* GICD */
+ <0x1d40000 0x40000>; /* GICR */
+ };
+ };
+ };
+};
--
2.5.0
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| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Date | 2016-02-02 19:40 +0100 |
| Subject | Re: [PATCH 07/10] arm64: dts: add the Marvell Armada 3700 family and a development board |
| Message-ID | <qXO1R-76E-35@gated-at.bofh.it> |
| In reply to | #1324365 |
> + memory {
> + device_type = "memory";
> + /* use only 256 MB on the 512 MB available */
> + reg = <0x00000000 0x00000000 0x00000000 0x10000000>;
> + };
It would be good to comment as to why we can't use 256M of the memory.
Otherwise this looks fine.
Mark.
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