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Re: [PATCH v3] watchdog: Add watchdog timer support for the WinSystems EBC-C384

Started byWilliam Breathitt Gray <vilhelm.gray@gmail.com>
First post2016-01-28 01:20 +0100
Last post2016-01-28 12:10 +0100
Articles 3 — 3 participants

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  Re: [PATCH v3] watchdog: Add watchdog timer support for the  WinSystems EBC-C384 William Breathitt Gray <vilhelm.gray@gmail.com> - 2016-01-28 01:20 +0100
    Re: [PATCH v3] watchdog: Add watchdog timer support for the  WinSystems EBC-C384 Guenter Roeck <linux@roeck-us.net> - 2016-01-28 03:00 +0100
    Re: [PATCH v3] watchdog: Add watchdog timer support for the  WinSystems EBC-C384 One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk> - 2016-01-28 12:10 +0100

#1320161 — Re: [PATCH v3] watchdog: Add watchdog timer support for the WinSystems EBC-C384

FromWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Date2016-01-28 01:20 +0100
SubjectRe: [PATCH v3] watchdog: Add watchdog timer support for the WinSystems EBC-C384
Message-ID<qVItz-3lw-9@gated-at.bofh.it>
On Tue, Jan 26, 2016 at 09:02:45PM -0800, Guenter Roeck wrote:
>> Unfortunately, the sensors-detect only reported "No" for each Super I/O
>> chip test, while the superiotool gave an unhelpful "No Super I/O chip
>> detected" message.
>>
>
>Too bad. That suggests that the watchdog may in fact be implemented in the fpga.

I received a response from WinSystems: the watchdog timer is implemented
in the Lattice FPGA (base address 0x298), along with other WinSystems
firmware. I was offered two methods of identifying the chip.

The first method is to use a 16-bit read of the register at port address
0x29E to get the version number of the watchdog timer; my machine
reported a value of 0x0009. Unfortunately, I don't believe this method
is very reliable since the version number may not be consistent across
these motherboards, and the same value could easily happen to be
returned by an unknown hardware.

The second method is slightly more involved so I'll quote WinSystems:

> 8-bit read of 299h – save this value
> 8-bit write of 60h to 299h
> 16-bit read of 29ah should return the base address of the WDT which is 564h
> 8-bit write of saved value to 299h - don’t want t accidentally change the WDT base address

If the system does return a value of 0x564, then it's pretty safe to say
that the watchdog timer is implemented on the chip. However, I'm not
sure it would be safe to send write commands to a port address until the
hardware has been identified; this second method may not be the best
route either.

What do you think?

William Breathitt Gray

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#1320212

FromGuenter Roeck <linux@roeck-us.net>
Date2016-01-28 03:00 +0100
Message-ID<qVK2l-4kg-1@gated-at.bofh.it>
In reply to#1320161
On 01/27/2016 04:18 PM, William Breathitt Gray wrote:
> On Tue, Jan 26, 2016 at 09:02:45PM -0800, Guenter Roeck wrote:
>>> Unfortunately, the sensors-detect only reported "No" for each Super I/O
>>> chip test, while the superiotool gave an unhelpful "No Super I/O chip
>>> detected" message.
>>>
>>
>> Too bad. That suggests that the watchdog may in fact be implemented in the fpga.
>
> I received a response from WinSystems: the watchdog timer is implemented
> in the Lattice FPGA (base address 0x298), along with other WinSystems
> firmware. I was offered two methods of identifying the chip.
>
> The first method is to use a 16-bit read of the register at port address
> 0x29E to get the version number of the watchdog timer; my machine
> reported a value of 0x0009. Unfortunately, I don't believe this method
> is very reliable since the version number may not be consistent across
> these motherboards, and the same value could easily happen to be
> returned by an unknown hardware.
>
> The second method is slightly more involved so I'll quote WinSystems:
>
>> 8-bit read of 299h – save this value
>> 8-bit write of 60h to 299h
>> 16-bit read of 29ah should return the base address of the WDT which is 564h
>> 8-bit write of saved value to 299h - don’t want t accidentally change the WDT base address
>
> If the system does return a value of 0x564, then it's pretty safe to say
> that the watchdog timer is implemented on the chip. However, I'm not
> sure it would be safe to send write commands to a port address until the
> hardware has been identified; this second method may not be the best
> route either.
>
> What do you think?
>
Let's stick with DMI.

Thanks,
Guenter

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#1320563

FromOne Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>
Date2016-01-28 12:10 +0100
Message-ID<qVSCD-2xh-33@gated-at.bofh.it>
In reply to#1320161
> > 8-bit read of 299h – save this value
> > 8-bit write of 60h to 299h
> > 16-bit read of 29ah should return the base address of the WDT which is 564h
> > 8-bit write of saved value to 299h - don’t want t accidentally change the WDT base address  
> 
> If the system does return a value of 0x564, then it's pretty safe to say
> that the watchdog timer is implemented on the chip. However, I'm not
> sure it would be safe to send write commands to a port address until the
> hardware has been identified; this second method may not be the best
> route either.
> 
> What do you think?

Pokng at 299/29a could hang other systems, so DMI is definitely
preferable if it's not described in ACPI as it perhaps ought to have
been. If all boards with that DMI string have the device then sorted, if
not then perhaps check 299/29a after the DMI match.

Alan

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