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Re: [PATCH v14 0/7] fpga area and fpga bridge framework

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  Re: [PATCH v14 0/7] fpga area and fpga bridge framework Jos Huisken <jos.huisken@gmail.com> - 2016-01-11 11:00 +0100

#1305996 — Re: [PATCH v14 0/7] fpga area and fpga bridge framework

On Thu, Dec 10, 2015 at 05:37:04PM -0600, atull@xxxxxxxxxxxxxxxxxxxxx wrote:
 >
 > For v14 I'm dropping the concept of "simple-fpga-bus" for "fpga-area"
 > with reworked bindings.

Works great (using 4.4rc5)!!
With:
- Pantelis' overlay patches and dtc,
- Walter Goossens' sopcinfo with minor overlay patch
- additional board_info.xml
- and some python scripting using pyfdt
Its -almost- possible to automatically generate a bitfile with 
appropriate overlay devicetree blob.
I only have an issue left w.r.t. phandles, I guess.

Using it now on de0-nano and veek kit.

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