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[PATCH 00/10] Patches to get dm814x-evm booting to NFSroot

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  [PATCH 00/10] Patches to get dm814x-evm booting to NFSroot Tony Lindgren <tony@atomide.com> - 2015-12-02 00:40 +0100
    [PATCH 02/10] clk: ti: Add few dm814x clock aliases Tony Lindgren <tony@atomide.com> - 2015-12-02 00:40 +0100
      Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases Tony Lindgren <tony@atomide.com> - 2015-12-08 18:00 +0100
        Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases Tero Kristo <t-kristo@ti.com> - 2015-12-08 20:30 +0100
          Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases Tony Lindgren <tony@atomide.com> - 2015-12-08 21:20 +0100
            Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases Tero Kristo <t-kristo@ti.com> - 2015-12-09 09:00 +0100
              Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases Tony Lindgren <tony@atomide.com> - 2015-12-10 02:00 +0100
    [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx Tony Lindgren <tony@atomide.com> - 2015-12-02 00:50 +0100
      Re: [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx Matthijs van Duin <matthijsvanduin@gmail.com> - 2015-12-02 01:20 +0100
        Re: [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx Tony Lindgren <tony@atomide.com> - 2015-12-02 01:50 +0100
          Re: [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx Tony Lindgren <tony@atomide.com> - 2015-12-02 02:00 +0100
            Re: [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx Tony Lindgren <tony@atomide.com> - 2015-12-02 02:40 +0100
    [PATCH 08/10] ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting Tony Lindgren <tony@atomide.com> - 2015-12-02 00:50 +0100
    Re: [PATCH 00/10] Patches to get dm814x-evm booting to NFSroot Grygorii Strashko <grygorii.strashko@ti.com> - 2015-12-03 19:20 +0100
      Re: [PATCH 00/10] Patches to get dm814x-evm booting to NFSroot Tony Lindgren <tony@atomide.com> - 2015-12-03 20:30 +0100

#1281347 — [PATCH 00/10] Patches to get dm814x-evm booting to NFSroot

Hi all,

Here are some fixes for v4.5 merge window to get dm814x-evm booting.
While hp t410 boots based on the bootloader clocks, dm814x-evm needs
more things configured. Especially the clock dts entries were all
wrong and just happened to be harmless on hp t410.

To boot, you probably want to use v4.4-rc3 because of commit 29f5b34ca1a1
("arm: omap2+: add missing HWMOD_NO_IDLEST in 81xx hwmod data") and also
manually apply commit 0db19b850468 ("net: cpsw: Fix ethernet regression
for dm814x") from Linux next.

I have more changes coming up after this series after I clean them
up a bit. Here's a brief status update for people:

What's working after this series on dm814x-evm and hp t410:

- Timers

- Serial

- Ethernet

- DMA

- I2C (only tested so far with i2cdetect -r 0)

- GPIO (only tested with additional MMC patches for card detect)

I have the following additional patches coming soonish:

- Basic ADPLL clock driver

- MMC support

- USB support

- Minimal j5eco-evm support

Should work with just configuration:

- [PATCH 0/3] pwm: omap: Add PWM support using dual-mode timers

I'm not working on any of the accelerators or graphics FYI. If somebody
has patches coming for those please notify on the linux-omap and
linux-arm-kernel mailings lists so we can avoid duplicate work.

Cheers,

Tony


Tony Lindgren (10):
  ARM: OMAP2+: Fix timer entries for dm814x
  clk: ti: Add few dm814x clock aliases
  ARM: OMAP2+: Add DPPLS clock manager for dm814x
  ARM: OMAP2+: Enable GPIO for dm814x
  ARM: OMAP2+: Disable GPIO softreset for dm81xx
  ARM: OMAP2+: Remove useless check for legacy booting for dm814x
  ARM: dts: Fix dm814x entries for pllss and prcm
  ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting
  ARM: dts: Fix dm8148 control modules ranges
  ARM: dts: Fix dm814x pinctrl address and mask

 arch/arm/boot/dts/dm814x-clocks.dtsi       | 109 +++++++++++++++++++++--------
 arch/arm/boot/dts/dm814x.dtsi              |  25 ++++---
 arch/arm/mach-omap2/io.c                   |   3 +-
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c |  15 ++--
 arch/arm/mach-omap2/prm_common.c           |   6 ++
 drivers/clk/ti/clk-814x.c                  |   4 ++
 include/linux/clk/ti.h                     |   1 +
 7 files changed, 117 insertions(+), 46 deletions(-)

-- 
2.6.2

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#1281348 — [PATCH 02/10] clk: ti: Add few dm814x clock aliases

The timer clock aliases are needed early on dm814x. Let's also
add the aliases for the interconnects and MMC.

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 drivers/clk/ti/clk-814x.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/ti/clk-814x.c b/drivers/clk/ti/clk-814x.c
index e172920..9e85fcc 100644
--- a/drivers/clk/ti/clk-814x.c
+++ b/drivers/clk/ti/clk-814x.c
@@ -14,10 +14,14 @@ static struct ti_dt_clk dm814_clks[] = {
 	DT_CLK(NULL, "devosc_ck", "devosc_ck"),
 	DT_CLK(NULL, "mpu_ck", "mpu_ck"),
 	DT_CLK(NULL, "sysclk4_ck", "sysclk4_ck"),
+	DT_CLK(NULL, "sysclk5_ck", "sysclk5_ck"),
 	DT_CLK(NULL, "sysclk6_ck", "sysclk6_ck"),
+	DT_CLK(NULL, "sysclk8_ck", "sysclk8_ck"),
 	DT_CLK(NULL, "sysclk10_ck", "sysclk10_ck"),
 	DT_CLK(NULL, "sysclk18_ck", "sysclk18_ck"),
 	DT_CLK(NULL, "timer_sys_ck", "devosc_ck"),
+	DT_CLK(NULL, "timer1_fck", "timer1_fck"),
+	DT_CLK(NULL, "timer2_fck", "timer2_fck"),
 	DT_CLK(NULL, "cpsw_125mhz_gclk", "cpsw_125mhz_gclk"),
 	DT_CLK(NULL, "cpsw_cpts_rft_clk", "cpsw_cpts_rft_clk"),
 	{ .node_name = NULL },
-- 
2.6.2

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#1286691 — Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases

* Tony Lindgren <tony@atomide.com> [151201 15:43]:
> The timer clock aliases are needed early on dm814x. Let's also
> add the aliases for the interconnects and MMC.
> 
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: Tero Kristo <t-kristo@ti.com>
> Signed-off-by: Tony Lindgren <tony@atomide.com>

Anybody from the clock department care to ack this one? I'd like to
get this series into Linux next as it fixes some some issues.

Regards,

Tony


>  drivers/clk/ti/clk-814x.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/clk/ti/clk-814x.c b/drivers/clk/ti/clk-814x.c
> index e172920..9e85fcc 100644
> --- a/drivers/clk/ti/clk-814x.c
> +++ b/drivers/clk/ti/clk-814x.c
> @@ -14,10 +14,14 @@ static struct ti_dt_clk dm814_clks[] = {
>  	DT_CLK(NULL, "devosc_ck", "devosc_ck"),
>  	DT_CLK(NULL, "mpu_ck", "mpu_ck"),
>  	DT_CLK(NULL, "sysclk4_ck", "sysclk4_ck"),
> +	DT_CLK(NULL, "sysclk5_ck", "sysclk5_ck"),
>  	DT_CLK(NULL, "sysclk6_ck", "sysclk6_ck"),
> +	DT_CLK(NULL, "sysclk8_ck", "sysclk8_ck"),
>  	DT_CLK(NULL, "sysclk10_ck", "sysclk10_ck"),
>  	DT_CLK(NULL, "sysclk18_ck", "sysclk18_ck"),
>  	DT_CLK(NULL, "timer_sys_ck", "devosc_ck"),
> +	DT_CLK(NULL, "timer1_fck", "timer1_fck"),
> +	DT_CLK(NULL, "timer2_fck", "timer2_fck"),
>  	DT_CLK(NULL, "cpsw_125mhz_gclk", "cpsw_125mhz_gclk"),
>  	DT_CLK(NULL, "cpsw_cpts_rft_clk", "cpsw_cpts_rft_clk"),
>  	{ .node_name = NULL },
> -- 
> 2.6.2
> 
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#1286797 — Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases

On 12/08/2015 06:57 PM, Tony Lindgren wrote:
> * Tony Lindgren <tony@atomide.com> [151201 15:43]:
>> The timer clock aliases are needed early on dm814x. Let's also
>> add the aliases for the interconnects and MMC.
>>
>> Cc: Michael Turquette <mturquette@baylibre.com>
>> Cc: Stephen Boyd <sboyd@codeaurora.org>
>> Cc: Tero Kristo <t-kristo@ti.com>
>> Signed-off-by: Tony Lindgren <tony@atomide.com>
>
> Anybody from the clock department care to ack this one?

Sorry been rather busy lately...

> I'd like to
> get this series into Linux next as it fixes some some issues.

Yeah looks good to me, don't have access to dm814x so can't test.

Acked-by: Tero Kristo <t-kristo@ti.com>

Are you planning to push this via omap tree if this is critical for you?

-Tero

>
> Regards,
>
> Tony
>
>
>>   drivers/clk/ti/clk-814x.c | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/clk/ti/clk-814x.c b/drivers/clk/ti/clk-814x.c
>> index e172920..9e85fcc 100644
>> --- a/drivers/clk/ti/clk-814x.c
>> +++ b/drivers/clk/ti/clk-814x.c
>> @@ -14,10 +14,14 @@ static struct ti_dt_clk dm814_clks[] = {
>>   	DT_CLK(NULL, "devosc_ck", "devosc_ck"),
>>   	DT_CLK(NULL, "mpu_ck", "mpu_ck"),
>>   	DT_CLK(NULL, "sysclk4_ck", "sysclk4_ck"),
>> +	DT_CLK(NULL, "sysclk5_ck", "sysclk5_ck"),
>>   	DT_CLK(NULL, "sysclk6_ck", "sysclk6_ck"),
>> +	DT_CLK(NULL, "sysclk8_ck", "sysclk8_ck"),
>>   	DT_CLK(NULL, "sysclk10_ck", "sysclk10_ck"),
>>   	DT_CLK(NULL, "sysclk18_ck", "sysclk18_ck"),
>>   	DT_CLK(NULL, "timer_sys_ck", "devosc_ck"),
>> +	DT_CLK(NULL, "timer1_fck", "timer1_fck"),
>> +	DT_CLK(NULL, "timer2_fck", "timer2_fck"),
>>   	DT_CLK(NULL, "cpsw_125mhz_gclk", "cpsw_125mhz_gclk"),
>>   	DT_CLK(NULL, "cpsw_cpts_rft_clk", "cpsw_cpts_rft_clk"),
>>   	{ .node_name = NULL },
>> --
>> 2.6.2
>>
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#1286821 — Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases

* Tero Kristo <t-kristo@ti.com> [151208 11:25]:
> On 12/08/2015 06:57 PM, Tony Lindgren wrote:
> >
> >Anybody from the clock department care to ack this one?
> 
> Sorry been rather busy lately...
>
> >I'd like to
> >get this series into Linux next as it fixes some some issues.
> 
> Yeah looks good to me, don't have access to dm814x so can't test.
> 
> Acked-by: Tero Kristo <t-kristo@ti.com>

Thanks.

> Are you planning to push this via omap tree if this is critical for you?

Yes this series needs to be merged in certain order to keep t410
booting. Should not conflict with anything else AFAIK.

Regards,

Tony
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#1287169 — Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases

On 12/08/2015 10:11 PM, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [151208 11:25]:
>> On 12/08/2015 06:57 PM, Tony Lindgren wrote:
>>>
>>> Anybody from the clock department care to ack this one?
>>
>> Sorry been rather busy lately...
>>
>>> I'd like to
>>> get this series into Linux next as it fixes some some issues.
>>
>> Yeah looks good to me, don't have access to dm814x so can't test.
>>
>> Acked-by: Tero Kristo <t-kristo@ti.com>
>
> Thanks.
>
>> Are you planning to push this via omap tree if this is critical for you?
>
> Yes this series needs to be merged in certain order to keep t410
> booting. Should not conflict with anything else AFAIK.

Ok at least I am fine with that. The dm81xx clock alias file is pretty 
independent of anything else.

-Tero

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#1288097 — Re: [PATCH 02/10] clk: ti: Add few dm814x clock aliases

* Tero Kristo <t-kristo@ti.com> [151208 23:50]:
> On 12/08/2015 10:11 PM, Tony Lindgren wrote:
> >* Tero Kristo <t-kristo@ti.com> [151208 11:25]:
> >>On 12/08/2015 06:57 PM, Tony Lindgren wrote:
> >>>
> >>>Anybody from the clock department care to ack this one?
> >>
> >>Sorry been rather busy lately...
> >>
> >>>I'd like to
> >>>get this series into Linux next as it fixes some some issues.
> >>
> >>Yeah looks good to me, don't have access to dm814x so can't test.
> >>
> >>Acked-by: Tero Kristo <t-kristo@ti.com>
> >
> >Thanks.
> >
> >>Are you planning to push this via omap tree if this is critical for you?
> >
> >Yes this series needs to be merged in certain order to keep t410
> >booting. Should not conflict with anything else AFAIK.
> 
> Ok at least I am fine with that. The dm81xx clock alias file is pretty
> independent of anything else.

Pushing this series except for the GPIO reset change into
omap-for-v4.5/81xx-fixes.

Regards,

Tony
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#1281351 — [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx

Looks like GPIO softreset status bit on both dm8168 and dm8148
is broken and only goes high initially. After writing to sysc
softreset bit, the resetdone bit never goes high again.

I noticed this as GPIOs are enabled from u-boot at least on t410.
And this can be tested easliy with the following commands in u-boot:

# mw.l 0x4818155c 0x2
# md.l 0x48032114 1
48032114: 00000001    ....
# mw.l 0x48032010 0x2
# md.l 0x48032114 1
48032114: 00000000    ....

Looks like the GPIO module is functional even with the resetdone
bit down.

Let's just tag the GPIOs for dm81xx with HWMOD_INIT_NO_RESET.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index 1b96cdf..440fd6c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -432,6 +432,7 @@ static struct omap_hwmod_ocp_if dm81xx_l4_ls__elm = {
 	.user		= OCP_USER_MPU,
 };
 
+/* On dm81xx RESETDONE bit seems to never goes high again after SOFTRESET */
 static struct omap_hwmod_class_sysconfig dm81xx_gpio_sysc = {
 	.rev_offs	= 0x0000,
 	.sysc_offs	= 0x0010,
@@ -463,6 +464,7 @@ static struct omap_hwmod dm81xx_gpio1_hwmod = {
 	.name		= "gpio1",
 	.clkdm_name	= "alwon_l3s_clkdm",
 	.class		= &dm81xx_gpio_hwmod_class,
+	.flags		= HWMOD_INIT_NO_RESET,
 	.main_clk	= "sysclk6_ck",
 	.prcm = {
 		.omap4 = {
@@ -490,6 +492,7 @@ static struct omap_hwmod dm81xx_gpio2_hwmod = {
 	.clkdm_name	= "alwon_l3s_clkdm",
 	.class		= &dm81xx_gpio_hwmod_class,
 	.main_clk	= "sysclk6_ck",
+	.flags		= HWMOD_INIT_NO_RESET,
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = DM81XX_CM_ALWON_GPIO_1_CLKCTRL,
-- 
2.6.2

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#1281370 — Re: [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx

On 2 December 2015 at 00:38, Tony Lindgren <tony@atomide.com> wrote:
> Looks like GPIO softreset status bit on both dm8168 and dm8148
> is broken and only goes high initially. After writing to sysc
> softreset bit, the resetdone bit never goes high again.

The resetdone bit works fine, but it needs all clocks active to come
up. You're neglecting to enable the debounce clock to the GPIO module:

> # mw.l 0x4818155c 0x2

That should write 0x102 instead.

You can disable the debounce clock after resetting the module if you
don't need it, though I doubt there's any significant power savings
there. (More likely it exists as a separate bit to allow it to stay
enabled even if the module isn't, for wakeup on debounced inputs.)

Matthijs
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#1281377 — Re: [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx

* Matthijs van Duin <matthijsvanduin@gmail.com> [151201 16:11]:
> On 2 December 2015 at 00:38, Tony Lindgren <tony@atomide.com> wrote:
> > Looks like GPIO softreset status bit on both dm8168 and dm8148
> > is broken and only goes high initially. After writing to sysc
> > softreset bit, the resetdone bit never goes high again.
> 
> The resetdone bit works fine, but it needs all clocks active to come
> up. You're neglecting to enable the debounce clock to the GPIO module:
> 
> > # mw.l 0x4818155c 0x2
> 
> That should write 0x102 instead.

It seems to work only once based on what I've seen :) If you try it
after it's powered it never works. Could be I'm doing something wrong
of course..

> You can disable the debounce clock after resetting the module if you
> don't need it, though I doubt there's any significant power savings
> there. (More likely it exists as a separate bit to allow it to stay
> enabled even if the module isn't, for wakeup on debounced inputs.)

Hmm I tried setting HWMOD_CONTROL_OPT_CLKS_IN_RESET flag like we
have for many SoCs to enable also sysclk18_ck but no luck. I can
recheck that.

Regards,

Tony
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#1281382 — Re: [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx

* Tony Lindgren <tony@atomide.com> [151201 16:42]:
> * Matthijs van Duin <matthijsvanduin@gmail.com> [151201 16:11]:
> > On 2 December 2015 at 00:38, Tony Lindgren <tony@atomide.com> wrote:
> > > Looks like GPIO softreset status bit on both dm8168 and dm8148
> > > is broken and only goes high initially. After writing to sysc
> > > softreset bit, the resetdone bit never goes high again.
> > 
> > The resetdone bit works fine, but it needs all clocks active to come
> > up. You're neglecting to enable the debounce clock to the GPIO module:
> > 
> > > # mw.l 0x4818155c 0x2
> > 
> > That should write 0x102 instead.
> 
> It seems to work only once based on what I've seen :) If you try it
> after it's powered it never works. Could be I'm doing something wrong
> of course..
> 
> > You can disable the debounce clock after resetting the module if you
> > don't need it, though I doubt there's any significant power savings
> > there. (More likely it exists as a separate bit to allow it to stay
> > enabled even if the module isn't, for wakeup on debounced inputs.)
> 
> Hmm I tried setting HWMOD_CONTROL_OPT_CLKS_IN_RESET flag like we
> have for many SoCs to enable also sysclk18_ck but no luck. I can
> recheck that.

You're right with 0x102 it works, need to debug further.

Thanks,

Tony
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#1281395 — Re: [PATCH 05/10] ARM: OMAP2+: Disable GPIO softreset for dm81xx

* Tony Lindgren <tony@atomide.com> [151201 16:56]:
> * Tony Lindgren <tony@atomide.com> [151201 16:42]:
> > * Matthijs van Duin <matthijsvanduin@gmail.com> [151201 16:11]:
> > > On 2 December 2015 at 00:38, Tony Lindgren <tony@atomide.com> wrote:
> > > > Looks like GPIO softreset status bit on both dm8168 and dm8148
> > > > is broken and only goes high initially. After writing to sysc
> > > > softreset bit, the resetdone bit never goes high again.
> > > 
> > > The resetdone bit works fine, but it needs all clocks active to come
> > > up. You're neglecting to enable the debounce clock to the GPIO module:
> > > 
> > > > # mw.l 0x4818155c 0x2
> > > 
> > > That should write 0x102 instead.
> > 
> > It seems to work only once based on what I've seen :) If you try it
> > after it's powered it never works. Could be I'm doing something wrong
> > of course..
> > 
> > > You can disable the debounce clock after resetting the module if you
> > > don't need it, though I doubt there's any significant power savings
> > > there. (More likely it exists as a separate bit to allow it to stay
> > > enabled even if the module isn't, for wakeup on debounced inputs.)
> > 
> > Hmm I tried setting HWMOD_CONTROL_OPT_CLKS_IN_RESET flag like we
> > have for many SoCs to enable also sysclk18_ck but no luck. I can
> > recheck that.
> 
> You're right with 0x102 it works, need to debug further.

Looks like also am33xx has opt clocks gate bit 18. Probably the best
way to deal with this in the long run is to set up the clkctrl and
optfclken as gate clocks with the clock framework. This is also needed
as we have some devices sharing a single clkctrl register.

Regards,

Tony
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#1281357 — [PATCH 08/10] ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting

Although we have hp t410 booting, I noticed that dm814x-evm does not boot
after I got one. This is because we don't have the clocks yet configured
properly. Let's start configuring proper clocks starting with the system
timers and clocks that work with existing mux and divider clock drivers.

Note that the oscillator speed register is different from am335x, dm814x
has only one bit that shows the BTMODE[6] at CONTROL_STATUS[21].

Also note that this only gets the system timers working with the defined
clocks. The PLL clocks are still missing and and the devices may or may
not work depending on what the bootloader has enabled.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dm814x-clocks.dtsi | 109 +++++++++++++++++++++++++----------
 1 file changed, 79 insertions(+), 30 deletions(-)

diff --git a/arch/arm/boot/dts/dm814x-clocks.dtsi b/arch/arm/boot/dts/dm814x-clocks.dtsi
index ef1e8e7..2600158 100644
--- a/arch/arm/boot/dts/dm814x-clocks.dtsi
+++ b/arch/arm/boot/dts/dm814x-clocks.dtsi
@@ -4,25 +4,74 @@
  * published by the Free Software Foundation.
  */
 
+&pllss_clocks {
+	timer1_fck: timer1_fck {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
+			  &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
+		ti,bit-shift = <3>;
+		reg = <0x2e0>;
+	};
+
+	timer2_fck: timer2_fck {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
+			  &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
+		ti,bit-shift = <6>;
+		reg = <0x2e0>;
+	};
+
+	sysclk18_ck: sysclk18_ck {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clocks = <&rtcosc_ck>, <&rtcdivider_ck>;
+		ti,bit-shift = <0>;
+		reg = <0x02f0>;
+	};
+};
+
 &scm_clocks {
+	devosc_ck: devosc_ck {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clocks = <&virt_20000000_ck>, <&virt_19200000_ck>;
+		ti,bit-shift = <21>;
+		reg = <0x0040>;
+	};
 
-	tclkin_ck: tclkin_ck {
+	/* Optional auxosc, 20 - 30 MHz range, assume 27 MHz by default */
+	auxosc_ck: auxosc_ck {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <27000000>;
+	};
+
+	/* Optional 32768Hz crystal or clock on RTCOSC pins */
+	rtcosc_ck: rtcosc_ck {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 		clock-frequency = <32768>;
 	};
 
-	devosc_ck: devosc_ck {
+	/* Optional external clock on TCLKIN pin, set rate in baord dts file */
+	tclkin_ck: tclkin_ck {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <0>;
+	};
+
+	virt_20000000_ck: virt_20000000_ck {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 		clock-frequency = <20000000>;
 	};
 
-	/* Optional auxosc, 20 - 30 MHz range, assume 27 MHz by default */
-	auxosc_ck: auxosc_ck {
+	virt_19200000_ck: virt_19200000_ck {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
-		clock-frequency = <27000000>;
+		clock-frequency = <19200000>;
 	};
 
 	mpu_ck: mpu_ck {
@@ -49,12 +98,6 @@
 		clock-frequency = <48000000>;
 	};
 
-	sysclk18_ck: sysclk18_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <32768>;
-	};
-
         cpsw_125mhz_gclk: cpsw_125mhz_gclk {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
@@ -69,7 +112,31 @@
 
 };
 
-&pllss_clocks {
+&prcm_clocks {
+	osc_src_ck: osc_src_ck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clocks = <&devosc_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	mpu_clksrc_ck: mpu_clksrc_ck {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clocks = <&devosc_ck>, <&rtcdivider_ck>;
+		ti,bit-shift = <0>;
+		reg = <0x0040>;
+	};
+
+	/* Fixed divider clock 0.0016384 * devosc */
+	rtcdivider_ck: rtcdivider_ck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clocks = <&devosc_ck>;
+		clock-mult = <128>;
+		clock-div = <78125>;
+	};
 
 	aud_clkin0_ck: aud_clkin0_ck {
 		#clock-cells = <0>;
@@ -88,22 +155,4 @@
 		compatible = "fixed-clock";
 		clock-frequency = <20000000>;
 	};
-
-	timer1_mux_ck: timer1_mux_ck {
-		#clock-cells = <0>;
-		compatible = "ti,mux-clock";
-		clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
-			  &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
-		ti,bit-shift = <3>;
-		reg = <0x2e0>;
-	};
-
-	timer2_mux_ck: timer2_mux_ck {
-		#clock-cells = <0>;
-		compatible = "ti,mux-clock";
-		clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
-			  &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
-		ti,bit-shift = <6>;
-		reg = <0x2e0>;
-	};
 };
-- 
2.6.2

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#1283234

On 12/02/2015 01:38 AM, Tony Lindgren wrote:
> Hi all,
> 
> Here are some fixes for v4.5 merge window to get dm814x-evm booting.
> While hp t410 boots based on the bootloader clocks, dm814x-evm needs
> more things configured. Especially the clock dts entries were all
> wrong and just happened to be harmless on hp t410.
> 
> To boot, you probably want to use v4.4-rc3 because of commit 29f5b34ca1a1
> ("arm: omap2+: add missing HWMOD_NO_IDLEST in 81xx hwmod data") and also
> manually apply commit 0db19b850468 ("net: cpsw: Fix ethernet regression
> for dm814x") from Linux next.
> 
> I have more changes coming up after this series after I clean them
> up a bit. Here's a brief status update for people:
> 
> What's working after this series on dm814x-evm and hp t410:
> 
> - Timers
> 
> - Serial
> 
> - Ethernet
> 
> - DMA
> 
> - I2C (only tested so far with i2cdetect -r 0)
> 
> - GPIO (only tested with additional MMC patches for card detect)
> 
> I have the following additional patches coming soonish:
> 
> - Basic ADPLL clock driver
> 
> - MMC support
> 
> - USB support
> 
> - Minimal j5eco-evm support
> 
> Should work with just configuration:
> 
> - [PATCH 0/3] pwm: omap: Add PWM support using dual-mode timers
> 
> I'm not working on any of the accelerators or graphics FYI. If somebody
> has patches coming for those please notify on the linux-omap and
> linux-arm-kernel mailings lists so we can avoid duplicate work.
> 

> Tony Lindgren (10):
>    ARM: OMAP2+: Fix timer entries for dm814x
>    clk: ti: Add few dm814x clock aliases
>    ARM: OMAP2+: Add DPPLS clock manager for dm814x
>    ARM: OMAP2+: Enable GPIO for dm814x
>    ARM: OMAP2+: Disable GPIO softreset for dm81xx
>    ARM: OMAP2+: Remove useless check for legacy booting for dm814x
>    ARM: dts: Fix dm814x entries for pllss and prcm
>    ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting
>    ARM: dts: Fix dm8148 control modules ranges
>    ARM: dts: Fix dm814x pinctrl address and mask

I'm worry a bit, if you will apply this series in its current order
- it will break git bisect.
Patch one "ARM: OMAP2+: Fix timer entries for dm814x" will use timerX_fck, but those
clocks will be added by patches 2 "clk: ti: Add few dm814x clock aliases"
and 8 "ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting"




-- 
regards,
-grygorii
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#1283279

* Grygorii Strashko <grygorii.strashko@ti.com> [151203 10:18]:
> On 12/02/2015 01:38 AM, Tony Lindgren wrote:
> 
> > Tony Lindgren (10):
> >    ARM: OMAP2+: Fix timer entries for dm814x
> >    clk: ti: Add few dm814x clock aliases
> >    ARM: OMAP2+: Add DPPLS clock manager for dm814x
> >    ARM: OMAP2+: Enable GPIO for dm814x
> >    ARM: OMAP2+: Disable GPIO softreset for dm81xx
> >    ARM: OMAP2+: Remove useless check for legacy booting for dm814x
> >    ARM: dts: Fix dm814x entries for pllss and prcm
> >    ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting
> >    ARM: dts: Fix dm8148 control modules ranges
> >    ARM: dts: Fix dm814x pinctrl address and mask
> 
> I'm worry a bit, if you will apply this series in its current order
> - it will break git bisect.
> Patch one "ARM: OMAP2+: Fix timer entries for dm814x" will use timerX_fck, but those
> clocks will be added by patches 2 "clk: ti: Add few dm814x clock aliases"
> and 8 "ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting"

Yeah you have a point there. I was hoping to separate them to dts and soc
related patches but clearly that's not possible.

We can keep t410 limping along just fine with this order:

ARM: dts: Fix dm814x entries for pllss and prcm
clk: ti: Add few dm814x clock aliases
ARM: OMAP2+: Add DPPLS clock manager for dm814x
ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting
ARM: OMAP2+: Fix timer entries for dm814x
ARM: dts: Fix dm8148 control modules ranges
ARM: dts: Fix dm814x pinctrl address and mask
ARM: OMAP2+: Enable GPIO for dm814x
ARM: OMAP2+: Remove useless check for legacy booting for dm814x

Regards,

Tony
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