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| Started by | Vaibhav Hiremath <vaibhav.hiremath@linaro.org> |
|---|---|
| First post | 2015-09-07 13:40 +0200 |
| Last post | 2015-09-07 15:00 +0200 |
| Articles | 3 — 2 participants |
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[PATCH-v2 1/3] mmc: sdhci-pxav3: Fix tabbing issue Vaibhav Hiremath <vaibhav.hiremath@linaro.org> - 2015-09-07 13:40 +0200
Re: [PATCH-v2 1/3] mmc: sdhci-pxav3: Fix tabbing issue Jisheng Zhang <jszhang@marvell.com> - 2015-09-07 14:10 +0200
Re: [PATCH-v2 1/3] mmc: sdhci-pxav3: Fix tabbing issue Vaibhav Hiremath <vaibhav.hiremath@linaro.org> - 2015-09-07 15:00 +0200
| From | Vaibhav Hiremath <vaibhav.hiremath@linaro.org> |
|---|---|
| Date | 2015-09-07 13:40 +0200 |
| Subject | [PATCH-v2 1/3] mmc: sdhci-pxav3: Fix tabbing issue |
| Message-ID | <q62We-4iH-19@gated-at.bofh.it> |
There were some coding style issues where spaces have been used instead
of tabs, for example, in macro definitions, alignment of function
declarations/definitions, etc...
This patch fixes all such occurrences in the code.
Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org>
---
drivers/mmc/host/sdhci-pxav3.c | 46 +++++++++++++++++++++---------------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index 946d37f..7a07177 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -39,24 +39,24 @@
#include "sdhci.h"
#include "sdhci-pltfm.h"
-#define PXAV3_RPM_DELAY_MS 50
+#define PXAV3_RPM_DELAY_MS 50
-#define SD_CLOCK_BURST_SIZE_SETUP 0x10A
-#define SDCLK_SEL 0x100
-#define SDCLK_DELAY_SHIFT 9
-#define SDCLK_DELAY_MASK 0x1f
+#define SD_CLOCK_BURST_SIZE_SETUP 0x10A
+#define SDCLK_SEL 0x100
+#define SDCLK_DELAY_SHIFT 9
+#define SDCLK_DELAY_MASK 0x1f
-#define SD_CFG_FIFO_PARAM 0x100
-#define SDCFG_GEN_PAD_CLK_ON (1<<6)
-#define SDCFG_GEN_PAD_CLK_CNT_MASK 0xFF
-#define SDCFG_GEN_PAD_CLK_CNT_SHIFT 24
+#define SD_CFG_FIFO_PARAM 0x100
+#define SDCFG_GEN_PAD_CLK_ON (1<<6)
+#define SDCFG_GEN_PAD_CLK_CNT_MASK 0xFF
+#define SDCFG_GEN_PAD_CLK_CNT_SHIFT 24
-#define SD_SPI_MODE 0x108
-#define SD_CE_ATA_1 0x10C
+#define SD_SPI_MODE 0x108
+#define SD_CE_ATA_1 0x10C
-#define SD_CE_ATA_2 0x10E
-#define SDCE_MISC_INT (1<<2)
-#define SDCE_MISC_INT_EN (1<<1)
+#define SD_CE_ATA_2 0x10E
+#define SDCE_MISC_INT (1<<2)
+#define SDCE_MISC_INT_EN (1<<1)
struct sdhci_pxa {
struct clk *clk_core;
@@ -284,7 +284,7 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
* FE-2946959
*/
if (pxa->sdio3_conf_reg) {
- u8 reg_val = readb(pxa->sdio3_conf_reg);
+ u8 reg_val = readb(pxa->sdio3_conf_reg);
if (uhs == MMC_TIMING_UHS_SDR50 ||
uhs == MMC_TIMING_UHS_DDR50) {
@@ -304,20 +304,20 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
}
static const struct sdhci_ops pxav3_sdhci_ops = {
- .set_clock = sdhci_set_clock,
- .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
- .get_max_clock = sdhci_pltfm_clk_get_max_clock,
- .set_bus_width = sdhci_set_bus_width,
- .reset = pxav3_reset,
- .set_uhs_signaling = pxav3_set_uhs_signaling,
+ .set_clock = sdhci_set_clock,
+ .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
+ .set_bus_width = sdhci_set_bus_width,
+ .reset = pxav3_reset,
+ .set_uhs_signaling = pxav3_set_uhs_signaling,
};
static struct sdhci_pltfm_data sdhci_pxav3_pdata = {
- .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK
+ .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK
| SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
| SDHCI_QUIRK_32BIT_ADMA_SIZE
| SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
- .ops = &pxav3_sdhci_ops,
+ .ops = &pxav3_sdhci_ops,
};
#ifdef CONFIG_OF
--
1.9.1
--
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| From | Jisheng Zhang <jszhang@marvell.com> |
|---|---|
| Date | 2015-09-07 14:10 +0200 |
| Message-ID | <q63pf-55P-9@gated-at.bofh.it> |
| In reply to | #1220082 |
On Mon, 7 Sep 2015 17:01:09 +0530
Vaibhav Hiremath <vaibhav.hiremath@linaro.org> wrote:
> There were some coding style issues where spaces have been used instead
> of tabs, for example, in macro definitions, alignment of function
> declarations/definitions, etc...
>
> This patch fixes all such occurrences in the code.
>
> Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org>
> ---
> drivers/mmc/host/sdhci-pxav3.c | 46 +++++++++++++++++++++---------------------
> 1 file changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
> index 946d37f..7a07177 100644
> --- a/drivers/mmc/host/sdhci-pxav3.c
> +++ b/drivers/mmc/host/sdhci-pxav3.c
> @@ -39,24 +39,24 @@
> #include "sdhci.h"
> #include "sdhci-pltfm.h"
>
> -#define PXAV3_RPM_DELAY_MS 50
> +#define PXAV3_RPM_DELAY_MS 50
>
> -#define SD_CLOCK_BURST_SIZE_SETUP 0x10A
> -#define SDCLK_SEL 0x100
> -#define SDCLK_DELAY_SHIFT 9
> -#define SDCLK_DELAY_MASK 0x1f
> +#define SD_CLOCK_BURST_SIZE_SETUP 0x10A
> +#define SDCLK_SEL 0x100
> +#define SDCLK_DELAY_SHIFT 9
> +#define SDCLK_DELAY_MASK 0x1f
>
> -#define SD_CFG_FIFO_PARAM 0x100
> -#define SDCFG_GEN_PAD_CLK_ON (1<<6)
> -#define SDCFG_GEN_PAD_CLK_CNT_MASK 0xFF
> -#define SDCFG_GEN_PAD_CLK_CNT_SHIFT 24
> +#define SD_CFG_FIFO_PARAM 0x100
> +#define SDCFG_GEN_PAD_CLK_ON (1<<6)
> +#define SDCFG_GEN_PAD_CLK_CNT_MASK 0xFF
> +#define SDCFG_GEN_PAD_CLK_CNT_SHIFT 24
>
> -#define SD_SPI_MODE 0x108
> -#define SD_CE_ATA_1 0x10C
> +#define SD_SPI_MODE 0x108
> +#define SD_CE_ATA_1 0x10C
>
> -#define SD_CE_ATA_2 0x10E
> -#define SDCE_MISC_INT (1<<2)
> -#define SDCE_MISC_INT_EN (1<<1)
> +#define SD_CE_ATA_2 0x10E
> +#define SDCE_MISC_INT (1<<2)
> +#define SDCE_MISC_INT_EN (1<<1)
>
> struct sdhci_pxa {
> struct clk *clk_core;
> @@ -284,7 +284,7 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
> * FE-2946959
> */
> if (pxa->sdio3_conf_reg) {
> - u8 reg_val = readb(pxa->sdio3_conf_reg);
> + u8 reg_val = readb(pxa->sdio3_conf_reg);
>
> if (uhs == MMC_TIMING_UHS_SDR50 ||
> uhs == MMC_TIMING_UHS_DDR50) {
> @@ -304,20 +304,20 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
> }
>
> static const struct sdhci_ops pxav3_sdhci_ops = {
> - .set_clock = sdhci_set_clock,
> - .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
> - .get_max_clock = sdhci_pltfm_clk_get_max_clock,
> - .set_bus_width = sdhci_set_bus_width,
> - .reset = pxav3_reset,
> - .set_uhs_signaling = pxav3_set_uhs_signaling,
> + .set_clock = sdhci_set_clock,
> + .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
> + .get_max_clock = sdhci_pltfm_clk_get_max_clock,
> + .set_bus_width = sdhci_set_bus_width,
> + .reset = pxav3_reset,
> + .set_uhs_signaling = pxav3_set_uhs_signaling,
IMHO, this is not an improvement, previous style is fine and I saw
such style in kernel here and there
> };
>
> static struct sdhci_pltfm_data sdhci_pxav3_pdata = {
> - .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK
> + .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK
> | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
> | SDHCI_QUIRK_32BIT_ADMA_SIZE
> | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
> - .ops = &pxav3_sdhci_ops,
> + .ops = &pxav3_sdhci_ops,
ditto
> };
>
> #ifdef CONFIG_OF
--
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| From | Vaibhav Hiremath <vaibhav.hiremath@linaro.org> |
|---|---|
| Date | 2015-09-07 15:00 +0200 |
| Message-ID | <q64bE-60R-7@gated-at.bofh.it> |
| In reply to | #1220101 |
On Monday 07 September 2015 05:26 PM, Jisheng Zhang wrote:
> On Mon, 7 Sep 2015 17:01:09 +0530
> Vaibhav Hiremath <vaibhav.hiremath@linaro.org> wrote:
>
>> There were some coding style issues where spaces have been used instead
>> of tabs, for example, in macro definitions, alignment of function
>> declarations/definitions, etc...
>>
>> This patch fixes all such occurrences in the code.
>>
>> Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org>
>> ---
>> drivers/mmc/host/sdhci-pxav3.c | 46 +++++++++++++++++++++---------------------
>> 1 file changed, 23 insertions(+), 23 deletions(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
>> index 946d37f..7a07177 100644
>> --- a/drivers/mmc/host/sdhci-pxav3.c
>> +++ b/drivers/mmc/host/sdhci-pxav3.c
>> @@ -39,24 +39,24 @@
>> #include "sdhci.h"
>> #include "sdhci-pltfm.h"
>>
>> -#define PXAV3_RPM_DELAY_MS 50
>> +#define PXAV3_RPM_DELAY_MS 50
>>
>> -#define SD_CLOCK_BURST_SIZE_SETUP 0x10A
>> -#define SDCLK_SEL 0x100
>> -#define SDCLK_DELAY_SHIFT 9
>> -#define SDCLK_DELAY_MASK 0x1f
>> +#define SD_CLOCK_BURST_SIZE_SETUP 0x10A
>> +#define SDCLK_SEL 0x100
>> +#define SDCLK_DELAY_SHIFT 9
>> +#define SDCLK_DELAY_MASK 0x1f
>>
>> -#define SD_CFG_FIFO_PARAM 0x100
>> -#define SDCFG_GEN_PAD_CLK_ON (1<<6)
>> -#define SDCFG_GEN_PAD_CLK_CNT_MASK 0xFF
>> -#define SDCFG_GEN_PAD_CLK_CNT_SHIFT 24
>> +#define SD_CFG_FIFO_PARAM 0x100
>> +#define SDCFG_GEN_PAD_CLK_ON (1<<6)
>> +#define SDCFG_GEN_PAD_CLK_CNT_MASK 0xFF
>> +#define SDCFG_GEN_PAD_CLK_CNT_SHIFT 24
>>
>> -#define SD_SPI_MODE 0x108
>> -#define SD_CE_ATA_1 0x10C
>> +#define SD_SPI_MODE 0x108
>> +#define SD_CE_ATA_1 0x10C
>>
>> -#define SD_CE_ATA_2 0x10E
>> -#define SDCE_MISC_INT (1<<2)
>> -#define SDCE_MISC_INT_EN (1<<1)
>> +#define SD_CE_ATA_2 0x10E
>> +#define SDCE_MISC_INT (1<<2)
>> +#define SDCE_MISC_INT_EN (1<<1)
>>
>> struct sdhci_pxa {
>> struct clk *clk_core;
>> @@ -284,7 +284,7 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
>> * FE-2946959
>> */
>> if (pxa->sdio3_conf_reg) {
>> - u8 reg_val = readb(pxa->sdio3_conf_reg);
>> + u8 reg_val = readb(pxa->sdio3_conf_reg);
>>
>> if (uhs == MMC_TIMING_UHS_SDR50 ||
>> uhs == MMC_TIMING_UHS_DDR50) {
>> @@ -304,20 +304,20 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
>> }
>>
>> static const struct sdhci_ops pxav3_sdhci_ops = {
>> - .set_clock = sdhci_set_clock,
>> - .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
>> - .get_max_clock = sdhci_pltfm_clk_get_max_clock,
>> - .set_bus_width = sdhci_set_bus_width,
>> - .reset = pxav3_reset,
>> - .set_uhs_signaling = pxav3_set_uhs_signaling,
>> + .set_clock = sdhci_set_clock,
>> + .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
>> + .get_max_clock = sdhci_pltfm_clk_get_max_clock,
>> + .set_bus_width = sdhci_set_bus_width,
>> + .reset = pxav3_reset,
>> + .set_uhs_signaling = pxav3_set_uhs_signaling,
>
> IMHO, this is not an improvement, previous style is fine and I saw
> such style in kernel here and there
>
I had received feedback to use above style on different patch-series.
And I also think this looks more clean and readable.
Thanks,
Vaibhav
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