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Groups > linux.kernel > #1216602 > unrolled thread
| Started by | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| First post | 2015-09-01 07:50 +0200 |
| Last post | 2015-09-07 04:30 +0200 |
| Articles | 20 on this page of 71 — 8 participants |
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[PATCH v4 0/16] Add Analogix Core Display Port Driver Yakir Yang <ykk@rock-chips.com> - 2015-09-01 07:50 +0200
[PATCH v4 01/16] drm: exynos/dp: fix code style Yakir Yang <ykk@rock-chips.com> - 2015-09-01 07:50 +0200
Re: [PATCH v4 01/16] drm: exynos/dp: fix code style Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-09-03 02:30 +0200
Re: [PATCH v4 01/16] drm: exynos/dp: fix code style Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-09-03 07:10 +0200
Re: [PATCH v4 01/16] drm: exynos/dp: fix code style Yakir Yang <ykk@rock-chips.com> - 2015-09-03 07:40 +0200
Re: [PATCH v4 01/16] drm: exynos/dp: fix code style Joe Perches <joe@perches.com> - 2015-09-03 08:00 +0200
Re: [PATCH v4 01/16] drm: exynos/dp: fix code style Yakir Yang <ykk@rock-chips.com> - 2015-09-06 03:40 +0200
Re: [PATCH v4 01/16] drm: exynos/dp: fix code style Yakir Yang <ykk@rock-chips.com> - 2015-09-03 07:10 +0200
[PATCH v4 04/16] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:00 +0200
[PATCH v4 05/16] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & colorimetry Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:00 +0200
Re: [PATCH v4 05/16] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & colorimetry Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-09-03 10:10 +0200
Re: [PATCH v4 05/16] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & colorimetry Yakir Yang <ykk@rock-chips.com> - 2015-09-06 04:10 +0200
[PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:10 +0200
Re: [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-09-04 02:40 +0200
Re: [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support Yakir Yang <ykk@rock-chips.com> - 2015-09-06 06:10 +0200
Re: [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-09-07 02:00 +0200
Re: [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support Yakir Yang <ykk@rock-chips.com> - 2015-09-07 03:50 +0200
[PATCH v4 08/16] drm: rockchip/dp: add rockchip platform dp driver Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:10 +0200
Re: [PATCH v4 08/16] drm: rockchip/dp: add rockchip platform dp driver Heiko Stuebner <heiko@sntech.de> - 2015-09-01 16:30 +0200
Re: [PATCH v4 08/16] drm: rockchip/dp: add rockchip platform dp driver Yakir Yang <ykk@rock-chips.com> - 2015-09-01 16:50 +0200
Re: [PATCH v4 08/16] drm: rockchip/dp: add rockchip platform dp driver Heiko Stuebner <heiko@sntech.de> - 2015-09-01 23:10 +0200
Re: [PATCH v4 08/16] drm: rockchip/dp: add rockchip platform dp driver Yakir Yang <ykk@rock-chips.com> - 2015-09-02 04:00 +0200
[PATCH v4 06/16] Documentation: drm/bridge: add document for analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:10 +0200
[PATCH v4 09/16] drm: rockchip: add bpc and color mode setting Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:10 +0200
Re: [PATCH v4 09/16] drm: rockchip: add bpc and color mode setting Heiko Stuebner <heiko@sntech.de> - 2015-09-01 23:10 +0200
Re: [PATCH v4 09/16] drm: rockchip: add bpc and color mode setting Yakir Yang <ykk@rock-chips.com> - 2015-09-02 04:10 +0200
Re: [PATCH v4 09/16] drm: rockchip: add bpc and color mode setting Thierry Reding <treding@nvidia.com> - 2015-09-02 10:40 +0200
Re: [PATCH v4 09/16] drm: rockchip: add bpc and color mode setting Yakir Yang <ykk@rock-chips.com> - 2015-09-02 12:10 +0200
Re: [PATCH v4 09/16] drm: rockchip: add bpc and color mode setting Thierry Reding <treding@nvidia.com> - 2015-09-03 10:40 +0200
Re: [PATCH v4 09/16] drm: rockchip: add bpc and color mode setting Yakir Yang <ykk@rock-chips.com> - 2015-09-06 04:10 +0200
[PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:10 +0200
Re: [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY Heiko Stuebner <heiko@sntech.de> - 2015-09-01 19:00 +0200
Re: [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY Heiko Stuebner <heiko@sntech.de> - 2015-09-01 23:00 +0200
Re: [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-09-02 03:50 +0200
Re: [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-09-02 03:10 +0200
Re: [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY Rob Herring <robherring2@gmail.com> - 2015-09-02 15:30 +0200
Re: [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-09-03 05:30 +0200
Re: [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY Heiko Stuebner <heiko@sntech.de> - 2015-09-03 16:00 +0200
[PATCH v4 07/16] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:10 +0200
Re: [PATCH v4 07/16] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-09-03 02:10 +0200
[PATCH v4 15/16] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:20 +0200
[PATCH v4 12/16] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:20 +0200
[PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:20 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Rob Herring <robherring2@gmail.com> - 2015-09-02 22:20 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang <ykk@rock-chips.com> - 2015-09-03 06:30 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Thierry Reding <treding@nvidia.com> - 2015-09-03 11:10 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Russell King - ARM Linux <linux@arm.linux.org.uk> - 2015-09-04 12:30 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Thierry Reding <treding@nvidia.com> - 2015-09-07 10:30 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Rob Herring <robherring2@gmail.com> - 2015-09-04 23:50 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang <ykk@rock-chips.com> - 2015-09-06 10:30 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Thierry Reding <treding@nvidia.com> - 2015-09-07 10:40 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Thierry Reding <treding@nvidia.com> - 2015-09-03 10:50 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Rob Herring <robherring2@gmail.com> - 2015-09-04 00:00 +0200
Re: [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Thierry Reding <treding@nvidia.com> - 2015-09-04 12:10 +0200
[PATCH v4 13/16] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:20 +0200
[PATCH v4 16/16] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang <ykk@rock-chips.com> - 2015-09-01 08:30 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Heiko Stuebner <heiko@sntech.de> - 2015-09-01 22:50 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Yakir Yang <ykk@rock-chips.com> - 2015-09-02 03:50 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Rob Herring <robherring2@gmail.com> - 2015-09-04 23:10 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Heiko Stuebner <heiko@sntech.de> - 2015-09-04 23:40 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Thierry Reding <treding@nvidia.com> - 2015-09-07 10:20 +0200
Re: [PATCH v4 0/16] Add Analogix Core Display Port Driver Heiko Stuebner <heiko@sntech.de> - 2015-09-02 00:20 +0200
Re: [PATCH v4 0/16] Add Analogix Core Display Port Driver Yakir Yang <ykk@rock-chips.com> - 2015-09-02 04:20 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Emil Velikov <emil.l.velikov@gmail.com> - 2015-09-02 17:00 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Yakir Yang <ykk@rock-chips.com> - 2015-09-03 06:00 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-09-03 03:00 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Yakir Yang <ykk@rock-chips.com> - 2015-09-03 07:40 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-09-04 02:50 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Yakir Yang <ykk@rock-chips.com> - 2015-09-06 10:00 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-09-07 02:30 +0200
Re: [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Yakir Yang <ykk@rock-chips.com> - 2015-09-07 04:30 +0200
Page 1 of 4 [1] 2 3 4 Next page →
| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-01 07:50 +0200 |
| Subject | [PATCH v4 0/16] Add Analogix Core Display Port Driver |
| Message-ID | <q3MCf-5Sy-11@gated-at.bofh.it> |
Hi all,
The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge directory, then rk3288 and exynos only need to keep
some platform code. Cause I can't find the exact IP name of exynos dp
controller, so I decide to name dp core driver with "analogix" which I
find in rk3288 eDP TRM ;)
Beyond that, there are three light registers setting differents bewteen
exynos and rk3288.
1. RK3288 have five special pll resigters which not indicata in exynos
dp controller.
2. The address of DP_PHY_PD(dp phy power manager register) are different
between rk3288 and exynos.
3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug
register).
I have verified this series on two kinds of rockchip platform board, one
is rk3288 sdk board which connect with a 2K display port monitor, the other
is google jerry chromebook which connect with a eDP screen "cnm,n116bgeea2",
both of them works rightlly.
I haven't verified the dp function on samsung platform, cause I haven't got
exynos boards. I can only ensure that there are no build error on samsung
platform, wish some samsung guys help to test. ;)
Besides, The v4 version have been rebased on linux-next master branch
(git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git), tag name is
next-20150828 (latest is next-2015-0831). So I think if someone try to apply
this series, there would be no conflict ;)
Thanks,
- Yakir
Changes in v4:
- Take Romain suggest, rebase on linux-next branch.
- Take Rob suggest, update "analogix,hpd-gpios" to "hpd-gpios" DT propery.
- Take Jingoo suggest, rename "analogix_dp-exynos.c" file name to "exynos_dp.c"
- Take Archit suggest, create a separate folder for analogix code in bridge/
- Take Jingoo Han suggest, update commit message more readable.
- Adjust the order from 05 to 04
- Take Krzysztof suggest, provide backword compatibility with samsung.
- Take Thierry suggest, add "color-depth" and "color-space" dynamic parsed.
- Take Krzysztof suggest, split all DTS changes, and provide backward compatibility.
Mark old properties as deprecated but still support them.
- Take Rob suggest, update "analogix,hpd-gpio" to "hpd-gpios" prop name.
- Take Thierry suggest, deprecated some properties which could parsed from Edid/Mode/DPCD.
"analogix,color-space" & "analogix,color-depth" &
"analogix,link-rate" & "analogix,lane-count" &
"analogix,ycbcr-coeff" & "analogix,dynamic-range" &
"vsync-active-high" & "hsync-active-high" & "interlaces"
- Take Krzysztof suggest, separate all DTS changes to a separate patch.
- Remove some deprecated DT properties in rockchip dp document.
- Take Kishon suggest, add commit message, and remove the redundant
rockchip_dp_phy_init() function, move those code to probe() method.
And remove driver .owner number.
- Take Thierry suggest, seprate the link-rate and lane-count limit
out with the device_type flag.
- Take Jingoo suggest, add commit messages.
- Call drm_panel_prepare() in .get_modes function, ensure panel should
power on before driver try to read edid message.
Changes in v3:
- Take Thierry Reding suggest, move exynos's video_timing code
to analogix_dp-exynos platform driver, add get_modes method
to struct analogix_dp_plat_data.
- Take Heiko suggest, rename some "samsung*" dts propery to "analogix*".
- Take Thierry Reding suggest, link_rate and lane_count shouldn't config to
the DT property value directly, but we can take those as hardware limite.
For example, RK3288 only support 4 physical lanes of 2.7/1.62 Gbps/lane,
so DT property would like "link-rate = 0x0a" "lane-count = 4".
- Take Thierry Reding suggest, dynamic parse video timing info from
struct drm_display_mode and struct drm_display_info.
- Take Heiko suggest, add devicetree binding documents.
- Take Thierry Reding suggest, remove sync pol & colorimetry properies
from the new analogix dp driver devicetree binding.
- Update the exist exynos dtsi file with the latest DP DT properies.
- Take Thierry Reding and Heiko suggest, leave "sclk_edp_24m" to rockchip
dp phy driver which name to "24m", and leave "sclk_edp" to analogix dp
core driver which name to "dp", and leave "pclk_edp" to rockchip dp platform
driver which name to "pclk".
- Take Heiko suggest, add devicetree binding document.
- Take Heiko suggest, remove "rockchip,panel" DT property, take use of remote
point to get panel node.
- Add the new function point analogix_dp_platdata.get_modes init.
- Take Heiko suggest, add rockchip dp phy driver,
collect the phy clocks and power control.
- Add "analogix,need-force-hpd" to indicate whether driver need foce
hpd when hpd detect failed.
- move dp hpd detect to connector detect function.
- Add edid modes parse support
Changes in v2:
- Take Joe Preches advise, improved commit message more readable, and
avoid using some uncommon style like bellow:
- retval = exynos_dp_read_bytes_from_i2c(...
...)
+ retval =
+ exynos_dp_read_bytes_from_i2c(......);
- Take Jingoo Han suggest, just remove my name from author list.
- Take Jingoo Han suggest, remove new copyright
- Fix compiled failed dut to analogix_dp_device misspell
- Take Heiko suggest, get panel node with remote-endpoint method,
and create devicetree binding for driver.
- Remove the clock enable/disbale with "sclk_edp" & "sclk_edp_24m",
leave those clock to rockchip dp phy driver.
- Add GNU license v2 declared and samsung copyright
- Fix compile failed dut to phy_pd_addr variable misspell error
Mark Yao (1):
drm: rockchip: add bpc and color mode setting
Yakir Yang (15):
drm: exynos/dp: fix code style
drm: exynos/dp: convert to drm bridge mode
drm: bridge: analogix/dp: split exynos dp driver to bridge dir
drm: bridge: analogix/dp: remove duplicate configuration of link rate
and link count
drm: bridge: analogix/dp: dynamic parse sync_pol & interlace &
colorimetry
Documentation: drm/bridge: add document for analogix_dp
ARM: dts: exynos/dp: remove some properties that deprecated by
analogix_dp driver
drm: rockchip/dp: add rockchip platform dp driver
phy: Add driver for rockchip Display Port PHY
drm: bridge: analogix/dp: add platform device type support
drm: bridge: analogix/dp: add some rk3288 special registers setting
drm: bridge: analogix/dp: add max link rate and lane count limit for
RK3288
drm: bridge: analogix/dp: try force hpd after plug in lookup failed
drm: bridge: analogix/dp: move hpd detect to connector detect function
drm: bridge: analogix/dp: add edid modes parse in get_modes method
.../devicetree/bindings/drm/bridge/analogix_dp.txt | 52 +
.../devicetree/bindings/phy/rockchip-dp-phy.txt | 26 +
.../bindings/video/analogix_dp-rockchip.txt | 75 +
.../devicetree/bindings/video/exynos_dp.txt | 64 +-
arch/arm/boot/dts/exynos5250-arndale.dts | 2 -
arch/arm/boot/dts/exynos5250-smdk5250.dts | 2 -
arch/arm/boot/dts/exynos5250-snow.dts | 4 +-
arch/arm/boot/dts/exynos5250-spring.dts | 4 +-
arch/arm/boot/dts/exynos5420-peach-pit.dts | 4 +-
arch/arm/boot/dts/exynos5420-smdk5420.dts | 2 -
arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 +-
drivers/gpu/drm/bridge/Kconfig | 2 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/analogix/Kconfig | 4 +
drivers/gpu/drm/bridge/analogix/Makefile | 1 +
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 1409 +++++++++++++++++++
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 286 ++++
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 1294 ++++++++++++++++++
.../analogix/analogix_dp_reg.h} | 270 ++--
drivers/gpu/drm/exynos/Kconfig | 3 +-
drivers/gpu/drm/exynos/Makefile | 2 +-
drivers/gpu/drm/exynos/exynos_dp.c | 355 +++++
drivers/gpu/drm/exynos/exynos_dp_core.c | 1427 --------------------
drivers/gpu/drm/exynos/exynos_dp_core.h | 281 ----
drivers/gpu/drm/exynos/exynos_dp_reg.c | 1263 -----------------
drivers/gpu/drm/rockchip/Kconfig | 9 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 416 ++++++
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +-
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 2 +-
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 33 +-
drivers/phy/Kconfig | 7 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-rockchip-dp.c | 166 +++
include/drm/bridge/analogix_dp.h | 40 +
35 files changed, 4347 insertions(+), 3167 deletions(-)
create mode 100644 Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
create mode 100644 Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
create mode 100644 drivers/gpu/drm/bridge/analogix/Kconfig
create mode 100644 drivers/gpu/drm/bridge/analogix/Makefile
create mode 100644 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
create mode 100644 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
create mode 100644 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
rename drivers/gpu/drm/{exynos/exynos_dp_reg.h => bridge/analogix/analogix_dp_reg.h} (62%)
create mode 100644 drivers/gpu/drm/exynos/exynos_dp.c
delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_core.c
delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_core.h
delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_reg.c
create mode 100644 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
create mode 100644 drivers/phy/phy-rockchip-dp.c
create mode 100644 include/drm/bridge/analogix_dp.h
--
2.1.2
--
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-01 07:50 +0200 |
| Subject | [PATCH v4 01/16] drm: exynos/dp: fix code style |
| Message-ID | <q3MCf-5Sy-21@gated-at.bofh.it> |
| In reply to | #1216602 |
After run "checkpatch.pl -f --subjective" command, I see there
are lots of alignment problem in exynos_dp driver, so let just
fix them.
- Take Romain suggest, rebase on linux-next branch
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Take Joe Preches advise, improved commit message more readable, and
avoid using some uncommon style like bellow:
- retval = exynos_dp_read_bytes_from_i2c(...
...)
+ retval =
+ exynos_dp_read_bytes_from_i2c(......);
drivers/gpu/drm/exynos/exynos_dp_core.c | 226 ++++++++++++++++----------------
drivers/gpu/drm/exynos/exynos_dp_core.h | 54 ++++----
drivers/gpu/drm/exynos/exynos_dp_reg.c | 106 +++++++--------
3 files changed, 188 insertions(+), 198 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
index d66ade0..266f7f7 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -115,8 +115,8 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
/* Read Extension Flag, Number of 128-byte EDID extension blocks */
retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
- EDID_EXTENSION_FLAG,
- &extend_block);
+ EDID_EXTENSION_FLAG,
+ &extend_block);
if (retval)
return retval;
@@ -124,10 +124,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
dev_dbg(dp->dev, "EDID data includes a single extension!\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
- EDID_HEADER_PATTERN,
- EDID_BLOCK_LENGTH,
- &edid[EDID_HEADER_PATTERN]);
+ retval = exynos_dp_read_bytes_from_i2c(
+ dp, I2C_EDID_DEVICE_ADDR,
+ EDID_HEADER_PATTERN,
+ EDID_BLOCK_LENGTH,
+ &edid[EDID_HEADER_PATTERN]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -139,11 +140,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
}
/* Read additional EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp,
- I2C_EDID_DEVICE_ADDR,
- EDID_BLOCK_LENGTH,
- EDID_BLOCK_LENGTH,
- &edid[EDID_BLOCK_LENGTH]);
+ retval = exynos_dp_read_bytes_from_i2c(
+ dp, I2C_EDID_DEVICE_ADDR,
+ EDID_BLOCK_LENGTH,
+ EDID_BLOCK_LENGTH,
+ &edid[EDID_BLOCK_LENGTH]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -155,24 +156,22 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
}
exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
- &test_vector);
+ &test_vector);
if (test_vector & DP_TEST_LINK_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_EDID_CHECKSUM,
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_EDID_CHECKSUM,
edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_RESPONSE,
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_RESPONSE,
DP_TEST_EDID_CHECKSUM_WRITE);
}
} else {
dev_info(dp->dev, "EDID data does not include any extensions.\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp,
- I2C_EDID_DEVICE_ADDR,
- EDID_HEADER_PATTERN,
- EDID_BLOCK_LENGTH,
- &edid[EDID_HEADER_PATTERN]);
+ retval = exynos_dp_read_bytes_from_i2c(
+ dp, I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
+ EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -183,16 +182,15 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
return -EIO;
}
- exynos_dp_read_byte_from_dpcd(dp,
- DP_TEST_REQUEST,
- &test_vector);
+ exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
+ &test_vector);
if (test_vector & DP_TEST_LINK_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_EDID_CHECKSUM,
- edid[EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_RESPONSE,
- DP_TEST_EDID_CHECKSUM_WRITE);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_EDID_CHECKSUM,
+ edid[EDID_CHECKSUM]);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_RESPONSE,
+ DP_TEST_EDID_CHECKSUM_WRITE);
}
}
@@ -207,8 +205,7 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp)
int retval;
/* Read DPCD DP_DPCD_REV~RECEIVE_PORT1_CAP_1 */
- retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV,
- 12, buf);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV, 12, buf);
if (retval)
return retval;
@@ -223,7 +220,7 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp)
}
static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp,
- bool enable)
+ bool enable)
{
u8 data;
@@ -231,11 +228,11 @@ static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp,
if (enable)
exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
- DP_LANE_COUNT_ENHANCED_FRAME_EN |
- DPCD_LANE_COUNT_SET(data));
+ DP_LANE_COUNT_ENHANCED_FRAME_EN |
+ DPCD_LANE_COUNT_SET(data));
else
exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
- DPCD_LANE_COUNT_SET(data));
+ DPCD_LANE_COUNT_SET(data));
}
static int exynos_dp_is_enhanced_mode_available(struct exynos_dp_device *dp)
@@ -262,13 +259,12 @@ static void exynos_dp_training_pattern_dis(struct exynos_dp_device *dp)
{
exynos_dp_set_training_pattern(dp, DP_NONE);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- DP_TRAINING_PATTERN_DISABLE);
+ exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ DP_TRAINING_PATTERN_DISABLE);
}
static void exynos_dp_set_lane_lane_pre_emphasis(struct exynos_dp_device *dp,
- int pre_emphasis, int lane)
+ int pre_emphasis, int lane)
{
switch (lane) {
case 0:
@@ -308,15 +304,14 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
/* Setup RX configuration */
buf[0] = dp->link_train.link_rate;
buf[1] = dp->link_train.lane_count;
- retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET,
- 2, buf);
+ retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET, 2, buf);
if (retval)
return retval;
/* Set TX pre-emphasis to minimum */
for (lane = 0; lane < lane_count; lane++)
- exynos_dp_set_lane_lane_pre_emphasis(dp,
- PRE_EMPHASIS_LEVEL_0, lane);
+ exynos_dp_set_lane_lane_pre_emphasis(dp, PRE_EMPHASIS_LEVEL_0,
+ lane);
/* Wait for PLL lock */
pll_tries = 0;
@@ -334,9 +329,9 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
exynos_dp_set_training_pattern(dp, TRAINING_PTN1);
/* Set RX training pattern */
- retval = exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1);
+ retval = exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ DP_LINK_SCRAMBLING_DISABLE |
+ DP_TRAINING_PATTERN_1);
if (retval)
return retval;
@@ -345,7 +340,7 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
- lane_count, buf);
+ lane_count, buf);
return retval;
}
@@ -353,7 +348,7 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
static unsigned char exynos_dp_get_lane_status(u8 link_status[2], int lane)
{
int shift = (lane & 1) * 4;
- u8 link_value = link_status[lane>>1];
+ u8 link_value = link_status[lane >> 1];
return (link_value >> shift) & 0xf;
}
@@ -372,7 +367,7 @@ static int exynos_dp_clock_recovery_ok(u8 link_status[2], int lane_count)
}
static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
- int lane_count)
+ int lane_count)
{
int lane;
u8 lane_status;
@@ -391,10 +386,10 @@ static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
}
static unsigned char exynos_dp_get_adjust_request_voltage(u8 adjust_request[2],
- int lane)
+ int lane)
{
int shift = (lane & 1) * 4;
- u8 link_value = adjust_request[lane>>1];
+ u8 link_value = adjust_request[lane >> 1];
return (link_value >> shift) & 0x3;
}
@@ -404,13 +399,13 @@ static unsigned char exynos_dp_get_adjust_request_pre_emphasis(
int lane)
{
int shift = (lane & 1) * 4;
- u8 link_value = adjust_request[lane>>1];
+ u8 link_value = adjust_request[lane >> 1];
return ((link_value >> shift) & 0xc) >> 2;
}
static void exynos_dp_set_lane_link_training(struct exynos_dp_device *dp,
- u8 training_lane_set, int lane)
+ u8 training_lane_set, int lane)
{
switch (lane) {
case 0:
@@ -430,9 +425,8 @@ static void exynos_dp_set_lane_link_training(struct exynos_dp_device *dp,
}
}
-static unsigned int exynos_dp_get_lane_link_training(
- struct exynos_dp_device *dp,
- int lane)
+static unsigned int
+exynos_dp_get_lane_link_training(struct exynos_dp_device *dp, int lane)
{
u32 reg;
@@ -466,7 +460,7 @@ static void exynos_dp_reduce_link_rate(struct exynos_dp_device *dp)
}
static void exynos_dp_get_adjust_training_lane(struct exynos_dp_device *dp,
- u8 adjust_request[2])
+ u8 adjust_request[2])
{
int lane, lane_count;
u8 voltage_swing, pre_emphasis, training_lane;
@@ -499,13 +493,13 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
lane_count = dp->link_train.lane_count;
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_LANE0_1_STATUS, 2, link_status);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
+ 2, link_status);
if (retval)
return retval;
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
+ 2, adjust_request);
if (retval)
return retval;
@@ -513,8 +507,8 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
/* set training pattern 2 for EQ */
exynos_dp_set_training_pattern(dp, TRAINING_PTN2);
- retval = exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
+ retval = exynos_dp_write_byte_to_dpcd(
+ dp, DP_TRAINING_PATTERN_SET,
DP_LINK_SCRAMBLING_DISABLE |
DP_TRAINING_PATTERN_2);
if (retval)
@@ -552,11 +546,11 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
exynos_dp_get_adjust_training_lane(dp, adjust_request);
for (lane = 0; lane < lane_count; lane++)
- exynos_dp_set_lane_link_training(dp,
- dp->link_train.training_lane[lane], lane);
+ exynos_dp_set_lane_link_training(
+ dp, dp->link_train.training_lane[lane], lane);
- retval = exynos_dp_write_bytes_to_dpcd(dp,
- DP_TRAINING_LANE0_SET, lane_count,
+ retval = exynos_dp_write_bytes_to_dpcd(
+ dp, DP_TRAINING_LANE0_SET, lane_count,
dp->link_train.training_lane);
if (retval)
return retval;
@@ -574,8 +568,8 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
lane_count = dp->link_train.lane_count;
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_LANE0_1_STATUS, 2, link_status);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
+ 2, link_status);
if (retval)
return retval;
@@ -584,13 +578,13 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
return -EIO;
}
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
+ 2, adjust_request);
if (retval)
return retval;
- retval = exynos_dp_read_byte_from_dpcd(dp,
- DP_LANE_ALIGN_STATUS_UPDATED, &link_align);
+ retval = exynos_dp_read_byte_from_dpcd(dp, DP_LANE_ALIGN_STATUS_UPDATED,
+ &link_align);
if (retval)
return retval;
@@ -629,17 +623,18 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
}
for (lane = 0; lane < lane_count; lane++)
- exynos_dp_set_lane_link_training(dp,
- dp->link_train.training_lane[lane], lane);
+ exynos_dp_set_lane_link_training(
+ dp, dp->link_train.training_lane[lane], lane);
retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
- lane_count, dp->link_train.training_lane);
+ lane_count,
+ dp->link_train.training_lane);
return retval;
}
static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
- u8 *bandwidth)
+ u8 *bandwidth)
{
u8 data;
@@ -652,7 +647,7 @@ static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
}
static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp,
- u8 *lane_count)
+ u8 *lane_count)
{
u8 data;
@@ -665,8 +660,8 @@ static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp,
}
static void exynos_dp_init_training(struct exynos_dp_device *dp,
- enum link_lane_count_type max_lane,
- enum link_rate_type max_rate)
+ enum link_lane_count_type max_lane,
+ enum link_rate_type max_rate)
{
/*
* MACRO_RST must be applied after the PLL_LOCK to avoid
@@ -679,7 +674,7 @@ static void exynos_dp_init_training(struct exynos_dp_device *dp,
exynos_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
if ((dp->link_train.link_rate != LINK_RATE_1_62GBPS) &&
- (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
+ (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n",
dp->link_train.link_rate);
dp->link_train.link_rate = LINK_RATE_1_62GBPS;
@@ -739,8 +734,7 @@ static int exynos_dp_sw_link_training(struct exynos_dp_device *dp)
}
static int exynos_dp_set_link_train(struct exynos_dp_device *dp,
- u32 count,
- u32 bwtype)
+ u32 count, u32 bwtype)
{
int i;
int retval;
@@ -828,21 +822,19 @@ static void exynos_dp_enable_scramble(struct exynos_dp_device *dp, bool enable)
if (enable) {
exynos_dp_enable_scrambling(dp);
- exynos_dp_read_byte_from_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- &data);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
+ exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ &data);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TRAINING_PATTERN_SET,
+ (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
} else {
exynos_dp_disable_scrambling(dp);
- exynos_dp_read_byte_from_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- &data);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
+ exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ &data);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TRAINING_PATTERN_SET,
+ (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
}
}
@@ -913,7 +905,7 @@ static void exynos_dp_commit(struct drm_encoder *encoder)
}
ret = exynos_dp_set_link_train(dp, dp->video_info->lane_count,
- dp->video_info->link_rate);
+ dp->video_info->link_rate);
if (ret) {
dev_err(dp->dev, "unable to do link train\n");
return;
@@ -941,8 +933,8 @@ static void exynos_dp_commit(struct drm_encoder *encoder)
exynos_dp_start_video(dp);
}
-static enum drm_connector_status exynos_dp_detect(
- struct drm_connector *connector, bool force)
+static enum drm_connector_status
+exynos_dp_detect(struct drm_connector *connector, bool force)
{
return connector_status_connected;
}
@@ -990,8 +982,8 @@ static int exynos_dp_get_modes(struct drm_connector *connector)
return 1;
}
-static struct drm_encoder *exynos_dp_best_encoder(
- struct drm_connector *connector)
+static struct drm_encoder *
+exynos_dp_best_encoder(struct drm_connector *connector)
{
struct exynos_dp_device *dp = ctx_from_connector(connector);
@@ -1005,7 +997,7 @@ static struct drm_connector_helper_funcs exynos_dp_connector_helper_funcs = {
/* returns the number of bridges attached */
static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
- struct drm_encoder *encoder)
+ struct drm_encoder *encoder)
{
int ret;
@@ -1036,7 +1028,8 @@ static int exynos_dp_create_connector(struct drm_encoder *encoder)
connector->polled = DRM_CONNECTOR_POLL_HPD;
ret = drm_connector_init(dp->drm_dev, connector,
- &exynos_dp_connector_funcs, DRM_MODE_CONNECTOR_eDP);
+ &exynos_dp_connector_funcs,
+ DRM_MODE_CONNECTOR_eDP);
if (ret) {
DRM_ERROR("Failed to initialize connector with drm\n");
return ret;
@@ -1139,8 +1132,8 @@ static struct video_info *exynos_dp_dt_parse_pdata(struct device *dev)
struct device_node *dp_node = dev->of_node;
struct video_info *dp_video_config;
- dp_video_config = devm_kzalloc(dev,
- sizeof(*dp_video_config), GFP_KERNEL);
+ dp_video_config = devm_kzalloc(dev, sizeof(*dp_video_config),
+ GFP_KERNEL);
if (!dp_video_config)
return ERR_PTR(-ENOMEM);
@@ -1154,37 +1147,37 @@ static struct video_info *exynos_dp_dt_parse_pdata(struct device *dev)
of_property_read_bool(dp_node, "interlaced");
if (of_property_read_u32(dp_node, "samsung,color-space",
- &dp_video_config->color_space)) {
+ &dp_video_config->color_space)) {
dev_err(dev, "failed to get color-space\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,dynamic-range",
- &dp_video_config->dynamic_range)) {
+ &dp_video_config->dynamic_range)) {
dev_err(dev, "failed to get dynamic-range\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
- &dp_video_config->ycbcr_coeff)) {
+ &dp_video_config->ycbcr_coeff)) {
dev_err(dev, "failed to get ycbcr-coeff\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,color-depth",
- &dp_video_config->color_depth)) {
+ &dp_video_config->color_depth)) {
dev_err(dev, "failed to get color-depth\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,link-rate",
- &dp_video_config->link_rate)) {
+ &dp_video_config->link_rate)) {
dev_err(dev, "failed to get link-rate\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,lane-count",
- &dp_video_config->lane_count)) {
+ &dp_video_config->lane_count)) {
dev_err(dev, "failed to get lane-count\n");
return ERR_PTR(-EINVAL);
}
@@ -1197,7 +1190,7 @@ static int exynos_dp_dt_parse_panel(struct exynos_dp_device *dp)
int ret;
ret = of_get_videomode(dp->dev->of_node, &dp->priv.vm,
- OF_USE_NATIVE_MODE);
+ OF_USE_NATIVE_MODE);
if (ret) {
DRM_ERROR("failed: of_get_videomode() : %d\n", ret);
return ret;
@@ -1294,7 +1287,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
exynos_dp_init_dp(dp);
ret = devm_request_irq(&pdev->dev, dp->irq, exynos_dp_irq_handler,
- irq_flags, "exynos-dp", dp);
+ irq_flags, "exynos-dp", dp);
if (ret) {
dev_err(&pdev->dev, "failed to request irq\n");
return ret;
@@ -1328,7 +1321,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
}
static void exynos_dp_unbind(struct device *dev, struct device *master,
- void *data)
+ void *data)
{
struct exynos_dp_device *dp = dev_get_drvdata(dev);
@@ -1347,7 +1340,7 @@ static int exynos_dp_probe(struct platform_device *pdev)
struct exynos_dp_device *dp;
dp = devm_kzalloc(&pdev->dev, sizeof(struct exynos_dp_device),
- GFP_KERNEL);
+ GFP_KERNEL);
if (!dp)
return -ENOMEM;
@@ -1369,8 +1362,9 @@ static int exynos_dp_probe(struct platform_device *pdev)
of_node_put(bridge_node);
if (!dp->bridge)
return -EPROBE_DEFER;
- } else
+ } else {
return -EPROBE_DEFER;
+ }
}
return component_add(&pdev->dev, &exynos_dp_ops);
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.h b/drivers/gpu/drm/exynos/exynos_dp_core.h
index e413b6f..71f2b86 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.h
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.h
@@ -179,8 +179,8 @@ void exynos_dp_config_interrupt(struct exynos_dp_device *dp);
enum pll_status exynos_dp_get_pll_lock_status(struct exynos_dp_device *dp);
void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable);
void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
- enum analog_power_block block,
- bool enable);
+ enum analog_power_block block,
+ bool enable);
void exynos_dp_init_analog_func(struct exynos_dp_device *dp);
void exynos_dp_init_hpd(struct exynos_dp_device *dp);
enum dp_irq_type exynos_dp_get_irq_type(struct exynos_dp_device *dp);
@@ -191,50 +191,50 @@ int exynos_dp_get_plug_in_status(struct exynos_dp_device *dp);
void exynos_dp_enable_sw_function(struct exynos_dp_device *dp);
int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp);
int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char data);
+ unsigned int reg_addr,
+ unsigned char data);
int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char *data);
+ unsigned int reg_addr,
+ unsigned char *data);
int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[]);
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[]);
int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[]);
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[]);
int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
unsigned int device_addr,
unsigned int reg_addr);
int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int *data);
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int *data);
int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char edid[]);
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char edid[]);
void exynos_dp_set_link_bandwidth(struct exynos_dp_device *dp, u32 bwtype);
void exynos_dp_get_link_bandwidth(struct exynos_dp_device *dp, u32 *bwtype);
void exynos_dp_set_lane_count(struct exynos_dp_device *dp, u32 count);
void exynos_dp_get_lane_count(struct exynos_dp_device *dp, u32 *count);
void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool enable);
void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
- enum pattern_set pattern);
+ enum pattern_set pattern);
void exynos_dp_set_lane0_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane1_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane2_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
u32 exynos_dp_get_lane0_link_training(struct exynos_dp_device *dp);
u32 exynos_dp_get_lane1_link_training(struct exynos_dp_device *dp);
u32 exynos_dp_get_lane2_link_training(struct exynos_dp_device *dp);
@@ -245,9 +245,9 @@ void exynos_dp_init_video(struct exynos_dp_device *dp);
void exynos_dp_set_video_color_format(struct exynos_dp_device *dp);
int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp);
void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
- enum clock_recovery_m_value_type type,
- u32 m_value,
- u32 n_value);
+ enum clock_recovery_m_value_type type,
+ u32 m_value,
+ u32 n_value);
void exynos_dp_set_video_timing_mode(struct exynos_dp_device *dp, u32 type);
void exynos_dp_enable_video_master(struct exynos_dp_device *dp, bool enable);
void exynos_dp_start_video(struct exynos_dp_device *dp);
diff --git a/drivers/gpu/drm/exynos/exynos_dp_reg.c b/drivers/gpu/drm/exynos/exynos_dp_reg.c
index c1f87a2..5aff19a 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_reg.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_reg.c
@@ -202,8 +202,8 @@ void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable)
}
void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
- enum analog_power_block block,
- bool enable)
+ enum analog_power_block block,
+ bool enable)
{
u32 reg;
@@ -399,8 +399,8 @@ void exynos_dp_init_aux(struct exynos_dp_device *dp)
exynos_dp_reset_aux(dp);
/* Disable AUX transaction H/W retry */
- reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0)|
- AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+ reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0) |
+ AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
writel(reg, dp->reg_base + EXYNOS_DP_AUX_HW_RETRY_CTL);
/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
@@ -483,8 +483,8 @@ int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp)
}
int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char data)
+ unsigned int reg_addr,
+ unsigned char data)
{
u32 reg;
int i;
@@ -519,17 +519,16 @@ int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
}
return retval;
}
int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char *data)
+ unsigned int reg_addr,
+ unsigned char *data)
{
u32 reg;
int i;
@@ -560,9 +559,8 @@ int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
}
/* Read data buffer */
@@ -573,9 +571,9 @@ int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
}
int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[])
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[])
{
u32 reg;
unsigned int start_offset;
@@ -625,9 +623,9 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
+ __func__);
}
start_offset += cur_data_count;
@@ -637,9 +635,9 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
}
int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[])
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[])
{
u32 reg;
unsigned int start_offset;
@@ -683,9 +681,9 @@ int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
+ __func__);
}
for (cur_data_idx = 0; cur_data_idx < cur_data_count;
@@ -736,9 +734,9 @@ int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
}
int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int *data)
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int *data)
{
u32 reg;
int i;
@@ -767,9 +765,8 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
}
/* Read data */
@@ -780,10 +777,10 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
}
int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char edid[])
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char edid[])
{
u32 reg;
unsigned int i, j;
@@ -807,8 +804,8 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
* request without sending address
*/
if (!defer)
- retval = exynos_dp_select_i2c_device(dp,
- device_addr, reg_addr + i);
+ retval = exynos_dp_select_i2c_device(
+ dp, device_addr, reg_addr + i);
else
defer = 0;
@@ -819,24 +816,23 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
* If Bit 3 is 0, I2C transaction.
*/
reg = AUX_LENGTH(16) |
- AUX_TX_COMM_I2C_TRANSACTION |
- AUX_TX_COMM_READ;
+ AUX_TX_COMM_I2C_TRANSACTION |
+ AUX_TX_COMM_READ;
writel(reg, dp->reg_base +
- EXYNOS_DP_AUX_CH_CTL_1);
+ EXYNOS_DP_AUX_CH_CTL_1);
/* Start AUX transaction */
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev,
- "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
+ __func__);
}
/* Check if Rx sends defer */
reg = readl(dp->reg_base + EXYNOS_DP_AUX_RX_COMM);
if (reg == AUX_RX_COMM_AUX_DEFER ||
- reg == AUX_RX_COMM_I2C_DEFER) {
+ reg == AUX_RX_COMM_I2C_DEFER) {
dev_err(dp->dev, "Defer: %d\n\n", reg);
defer = 1;
}
@@ -901,7 +897,7 @@ void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool enable)
}
void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
- enum pattern_set pattern)
+ enum pattern_set pattern)
{
u32 reg;
@@ -974,7 +970,7 @@ void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32 level)
}
void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -983,7 +979,7 @@ void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
}
void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -992,7 +988,7 @@ void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
}
void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -1001,7 +997,7 @@ void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
}
void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -1125,9 +1121,9 @@ int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp)
}
void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
- enum clock_recovery_m_value_type type,
- u32 m_value,
- u32 n_value)
+ enum clock_recovery_m_value_type type,
+ u32 m_value,
+ u32 n_value)
{
u32 reg;
@@ -1221,7 +1217,7 @@ void exynos_dp_config_video_slave_mode(struct exynos_dp_device *dp)
u32 reg;
reg = readl(dp->reg_base + EXYNOS_DP_FUNC_EN_1);
- reg &= ~(MASTER_VID_FUNC_EN_N|SLAVE_VID_FUNC_EN_N);
+ reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
reg |= MASTER_VID_FUNC_EN_N;
writel(reg, dp->reg_base + EXYNOS_DP_FUNC_EN_1);
--
2.1.2
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[toc] | [prev] | [next] | [standalone]
| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Date | 2015-09-03 02:30 +0200 |
| Subject | Re: [PATCH v4 01/16] drm: exynos/dp: fix code style |
| Message-ID | <q4qzE-4aY-7@gated-at.bofh.it> |
| In reply to | #1216604 |
On 01.09.2015 14:46, Yakir Yang wrote:
> After run "checkpatch.pl -f --subjective" command, I see there
> are lots of alignment problem in exynos_dp driver, so let just
> fix them.
Hi,
Warnings from checkpatch are not a reason for a commit. Reason for a
commit could be for example an unreadable code, violation of
coding-style leading to decrease in code maintainability or just
improving the code readability so it will be easier to review and
maintain it.
You do not make commits because some tool tells you that. We do not
listen to machines :) ... If that would be the case, the commit could be
made automatically, without human interaction. Such automated commit
could be even easily tested by the machine by comparing object files.
Especially that you enabled "subjective" rule. This is not a valid
motivation for a commit.
Please rephrase this to sensible reason and convince that change is
worth the effort.
>
> - Take Romain suggest, rebase on linux-next branch
That comment seems unrelated to the commit. Please remove it.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> ---
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> - Take Joe Preches advise, improved commit message more readable, and
> avoid using some uncommon style like bellow:
> - retval = exynos_dp_read_bytes_from_i2c(...
> ...)
> + retval =
> + exynos_dp_read_bytes_from_i2c(......);
>
> drivers/gpu/drm/exynos/exynos_dp_core.c | 226 ++++++++++++++++----------------
> drivers/gpu/drm/exynos/exynos_dp_core.h | 54 ++++----
> drivers/gpu/drm/exynos/exynos_dp_reg.c | 106 +++++++--------
> 3 files changed, 188 insertions(+), 198 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
> index d66ade0..266f7f7 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp_core.c
> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
> @@ -115,8 +115,8 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
>
> /* Read Extension Flag, Number of 128-byte EDID extension blocks */
> retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
> - EDID_EXTENSION_FLAG,
> - &extend_block);
> + EDID_EXTENSION_FLAG,
> + &extend_block);
> if (retval)
> return retval;
>
> @@ -124,10 +124,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
> dev_dbg(dp->dev, "EDID data includes a single extension!\n");
>
> /* Read EDID data */
> - retval = exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
> - EDID_HEADER_PATTERN,
> - EDID_BLOCK_LENGTH,
> - &edid[EDID_HEADER_PATTERN]);
> + retval = exynos_dp_read_bytes_from_i2c(
> + dp, I2C_EDID_DEVICE_ADDR,
> + EDID_HEADER_PATTERN,
> + EDID_BLOCK_LENGTH,
> + &edid[EDID_HEADER_PATTERN]);
> if (retval != 0) {
> dev_err(dp->dev, "EDID Read failed!\n");
> return -EIO;
> @@ -139,11 +140,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
> }
>
> /* Read additional EDID data */
> - retval = exynos_dp_read_bytes_from_i2c(dp,
> - I2C_EDID_DEVICE_ADDR,
> - EDID_BLOCK_LENGTH,
> - EDID_BLOCK_LENGTH,
> - &edid[EDID_BLOCK_LENGTH]);
> + retval = exynos_dp_read_bytes_from_i2c(
> + dp, I2C_EDID_DEVICE_ADDR,
> + EDID_BLOCK_LENGTH,
> + EDID_BLOCK_LENGTH,
> + &edid[EDID_BLOCK_LENGTH]);
> if (retval != 0) {
> dev_err(dp->dev, "EDID Read failed!\n");
> return -EIO;
> @@ -155,24 +156,22 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
> }
>
> exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
> - &test_vector);
> + &test_vector);
> if (test_vector & DP_TEST_LINK_EDID_READ) {
> - exynos_dp_write_byte_to_dpcd(dp,
> - DP_TEST_EDID_CHECKSUM,
> + exynos_dp_write_byte_to_dpcd(
> + dp, DP_TEST_EDID_CHECKSUM,
> edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
> - exynos_dp_write_byte_to_dpcd(dp,
> - DP_TEST_RESPONSE,
> + exynos_dp_write_byte_to_dpcd(
> + dp, DP_TEST_RESPONSE,
> DP_TEST_EDID_CHECKSUM_WRITE);
To me, missing argument after opening parenthesis, looks worse. I would
prefer:
exynos_dp_write_byte_to_dpcd(dp,
Why you moved the 'dp' argument to new line?
> }
> } else {
> dev_info(dp->dev, "EDID data does not include any extensions.\n");
>
> /* Read EDID data */
> - retval = exynos_dp_read_bytes_from_i2c(dp,
> - I2C_EDID_DEVICE_ADDR,
> - EDID_HEADER_PATTERN,
> - EDID_BLOCK_LENGTH,
> - &edid[EDID_HEADER_PATTERN]);
> + retval = exynos_dp_read_bytes_from_i2c(
> + dp, I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
> + EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]);
ditto
> if (retval != 0) {
> dev_err(dp->dev, "EDID Read failed!\n");
> return -EIO;
> @@ -183,16 +182,15 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
> return -EIO;
> }
>
> - exynos_dp_read_byte_from_dpcd(dp,
> - DP_TEST_REQUEST,
> - &test_vector);
> + exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
> + &test_vector);
> if (test_vector & DP_TEST_LINK_EDID_READ) {
> - exynos_dp_write_byte_to_dpcd(dp,
> - DP_TEST_EDID_CHECKSUM,
> - edid[EDID_CHECKSUM]);
> - exynos_dp_write_byte_to_dpcd(dp,
> - DP_TEST_RESPONSE,
> - DP_TEST_EDID_CHECKSUM_WRITE);
> + exynos_dp_write_byte_to_dpcd(
> + dp, DP_TEST_EDID_CHECKSUM,
> + edid[EDID_CHECKSUM]);
> + exynos_dp_write_byte_to_dpcd(
> + dp, DP_TEST_RESPONSE,
> + DP_TEST_EDID_CHECKSUM_WRITE);
ditto
> }
> }
>
> @@ -207,8 +205,7 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp)
> int retval;
>
> /* Read DPCD DP_DPCD_REV~RECEIVE_PORT1_CAP_1 */
> - retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV,
> - 12, buf);
> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV, 12, buf);
> if (retval)
> return retval;
>
> @@ -223,7 +220,7 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp)
> }
>
> static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp,
> - bool enable)
> + bool enable)
> {
> u8 data;
>
> @@ -231,11 +228,11 @@ static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp,
>
> if (enable)
> exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
> - DP_LANE_COUNT_ENHANCED_FRAME_EN |
> - DPCD_LANE_COUNT_SET(data));
> + DP_LANE_COUNT_ENHANCED_FRAME_EN |
> + DPCD_LANE_COUNT_SET(data));
> else
> exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
> - DPCD_LANE_COUNT_SET(data));
> + DPCD_LANE_COUNT_SET(data));
> }
>
> static int exynos_dp_is_enhanced_mode_available(struct exynos_dp_device *dp)
> @@ -262,13 +259,12 @@ static void exynos_dp_training_pattern_dis(struct exynos_dp_device *dp)
> {
> exynos_dp_set_training_pattern(dp, DP_NONE);
>
> - exynos_dp_write_byte_to_dpcd(dp,
> - DP_TRAINING_PATTERN_SET,
> - DP_TRAINING_PATTERN_DISABLE);
> + exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
> + DP_TRAINING_PATTERN_DISABLE);
> }
>
> static void exynos_dp_set_lane_lane_pre_emphasis(struct exynos_dp_device *dp,
> - int pre_emphasis, int lane)
> + int pre_emphasis, int lane)
> {
> switch (lane) {
> case 0:
> @@ -308,15 +304,14 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
> /* Setup RX configuration */
> buf[0] = dp->link_train.link_rate;
> buf[1] = dp->link_train.lane_count;
> - retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET,
> - 2, buf);
> + retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET, 2, buf);
> if (retval)
> return retval;
>
> /* Set TX pre-emphasis to minimum */
> for (lane = 0; lane < lane_count; lane++)
> - exynos_dp_set_lane_lane_pre_emphasis(dp,
> - PRE_EMPHASIS_LEVEL_0, lane);
> + exynos_dp_set_lane_lane_pre_emphasis(dp, PRE_EMPHASIS_LEVEL_0,
> + lane);
>
> /* Wait for PLL lock */
> pll_tries = 0;
> @@ -334,9 +329,9 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
> exynos_dp_set_training_pattern(dp, TRAINING_PTN1);
>
> /* Set RX training pattern */
> - retval = exynos_dp_write_byte_to_dpcd(dp,
> - DP_TRAINING_PATTERN_SET,
> - DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1);
> + retval = exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
> + DP_LINK_SCRAMBLING_DISABLE |
> + DP_TRAINING_PATTERN_1);
> if (retval)
> return retval;
>
> @@ -345,7 +340,7 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
> DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
>
> retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
> - lane_count, buf);
> + lane_count, buf);
>
> return retval;
> }
> @@ -353,7 +348,7 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
> static unsigned char exynos_dp_get_lane_status(u8 link_status[2], int lane)
> {
> int shift = (lane & 1) * 4;
> - u8 link_value = link_status[lane>>1];
> + u8 link_value = link_status[lane >> 1];
>
> return (link_value >> shift) & 0xf;
> }
> @@ -372,7 +367,7 @@ static int exynos_dp_clock_recovery_ok(u8 link_status[2], int lane_count)
> }
>
> static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
> - int lane_count)
> + int lane_count)
> {
> int lane;
> u8 lane_status;
> @@ -391,10 +386,10 @@ static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
> }
>
> static unsigned char exynos_dp_get_adjust_request_voltage(u8 adjust_request[2],
> - int lane)
> + int lane)
> {
> int shift = (lane & 1) * 4;
> - u8 link_value = adjust_request[lane>>1];
> + u8 link_value = adjust_request[lane >> 1];
>
> return (link_value >> shift) & 0x3;
> }
> @@ -404,13 +399,13 @@ static unsigned char exynos_dp_get_adjust_request_pre_emphasis(
> int lane)
> {
> int shift = (lane & 1) * 4;
> - u8 link_value = adjust_request[lane>>1];
> + u8 link_value = adjust_request[lane >> 1];
>
> return ((link_value >> shift) & 0xc) >> 2;
> }
>
> static void exynos_dp_set_lane_link_training(struct exynos_dp_device *dp,
> - u8 training_lane_set, int lane)
> + u8 training_lane_set, int lane)
> {
> switch (lane) {
> case 0:
> @@ -430,9 +425,8 @@ static void exynos_dp_set_lane_link_training(struct exynos_dp_device *dp,
> }
> }
>
> -static unsigned int exynos_dp_get_lane_link_training(
> - struct exynos_dp_device *dp,
> - int lane)
> +static unsigned int
> +exynos_dp_get_lane_link_training(struct exynos_dp_device *dp, int lane)
> {
> u32 reg;
>
> @@ -466,7 +460,7 @@ static void exynos_dp_reduce_link_rate(struct exynos_dp_device *dp)
> }
>
> static void exynos_dp_get_adjust_training_lane(struct exynos_dp_device *dp,
> - u8 adjust_request[2])
> + u8 adjust_request[2])
> {
> int lane, lane_count;
> u8 voltage_swing, pre_emphasis, training_lane;
> @@ -499,13 +493,13 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
>
> lane_count = dp->link_train.lane_count;
>
> - retval = exynos_dp_read_bytes_from_dpcd(dp,
> - DP_LANE0_1_STATUS, 2, link_status);
> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
> + 2, link_status);
> if (retval)
> return retval;
>
> - retval = exynos_dp_read_bytes_from_dpcd(dp,
> - DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
> + 2, adjust_request);
> if (retval)
> return retval;
>
> @@ -513,8 +507,8 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
> /* set training pattern 2 for EQ */
> exynos_dp_set_training_pattern(dp, TRAINING_PTN2);
>
> - retval = exynos_dp_write_byte_to_dpcd(dp,
> - DP_TRAINING_PATTERN_SET,
> + retval = exynos_dp_write_byte_to_dpcd(
> + dp, DP_TRAINING_PATTERN_SET,
> DP_LINK_SCRAMBLING_DISABLE |
> DP_TRAINING_PATTERN_2);
ditto
> if (retval)
> @@ -552,11 +546,11 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
> exynos_dp_get_adjust_training_lane(dp, adjust_request);
>
> for (lane = 0; lane < lane_count; lane++)
> - exynos_dp_set_lane_link_training(dp,
> - dp->link_train.training_lane[lane], lane);
> + exynos_dp_set_lane_link_training(
> + dp, dp->link_train.training_lane[lane], lane);
>
> - retval = exynos_dp_write_bytes_to_dpcd(dp,
> - DP_TRAINING_LANE0_SET, lane_count,
> + retval = exynos_dp_write_bytes_to_dpcd(
> + dp, DP_TRAINING_LANE0_SET, lane_count,
> dp->link_train.training_lane);
ditto
> if (retval)
> return retval;
> @@ -574,8 +568,8 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
>
> lane_count = dp->link_train.lane_count;
>
> - retval = exynos_dp_read_bytes_from_dpcd(dp,
> - DP_LANE0_1_STATUS, 2, link_status);
> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
> + 2, link_status);
> if (retval)
> return retval;
>
> @@ -584,13 +578,13 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
> return -EIO;
> }
>
> - retval = exynos_dp_read_bytes_from_dpcd(dp,
> - DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
> + 2, adjust_request);
> if (retval)
> return retval;
>
> - retval = exynos_dp_read_byte_from_dpcd(dp,
> - DP_LANE_ALIGN_STATUS_UPDATED, &link_align);
> + retval = exynos_dp_read_byte_from_dpcd(dp, DP_LANE_ALIGN_STATUS_UPDATED,
> + &link_align);
> if (retval)
> return retval;
>
> @@ -629,17 +623,18 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
> }
>
> for (lane = 0; lane < lane_count; lane++)
> - exynos_dp_set_lane_link_training(dp,
> - dp->link_train.training_lane[lane], lane);
> + exynos_dp_set_lane_link_training(
> + dp, dp->link_train.training_lane[lane], lane);
ditto
>
> retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
> - lane_count, dp->link_train.training_lane);
> + lane_count,
> + dp->link_train.training_lane);
>
> return retval;
> }
>
> static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
> - u8 *bandwidth)
> + u8 *bandwidth)
> {
> u8 data;
>
> @@ -652,7 +647,7 @@ static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
> }
>
> static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp,
> - u8 *lane_count)
> + u8 *lane_count)
> {
> u8 data;
>
> @@ -665,8 +660,8 @@ static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp,
> }
>
> static void exynos_dp_init_training(struct exynos_dp_device *dp,
> - enum link_lane_count_type max_lane,
> - enum link_rate_type max_rate)
> + enum link_lane_count_type max_lane,
> + enum link_rate_type max_rate)
> {
> /*
> * MACRO_RST must be applied after the PLL_LOCK to avoid
> @@ -679,7 +674,7 @@ static void exynos_dp_init_training(struct exynos_dp_device *dp,
> exynos_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
>
> if ((dp->link_train.link_rate != LINK_RATE_1_62GBPS) &&
> - (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
> + (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
> dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n",
> dp->link_train.link_rate);
> dp->link_train.link_rate = LINK_RATE_1_62GBPS;
> @@ -739,8 +734,7 @@ static int exynos_dp_sw_link_training(struct exynos_dp_device *dp)
> }
>
> static int exynos_dp_set_link_train(struct exynos_dp_device *dp,
> - u32 count,
> - u32 bwtype)
> + u32 count, u32 bwtype)
> {
> int i;
> int retval;
> @@ -828,21 +822,19 @@ static void exynos_dp_enable_scramble(struct exynos_dp_device *dp, bool enable)
> if (enable) {
> exynos_dp_enable_scrambling(dp);
>
> - exynos_dp_read_byte_from_dpcd(dp,
> - DP_TRAINING_PATTERN_SET,
> - &data);
> - exynos_dp_write_byte_to_dpcd(dp,
> - DP_TRAINING_PATTERN_SET,
> - (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
> + exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
> + &data);
> + exynos_dp_write_byte_to_dpcd(
> + dp, DP_TRAINING_PATTERN_SET,
> + (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
ditto
> } else {
> exynos_dp_disable_scrambling(dp);
>
> - exynos_dp_read_byte_from_dpcd(dp,
> - DP_TRAINING_PATTERN_SET,
> - &data);
> - exynos_dp_write_byte_to_dpcd(dp,
> - DP_TRAINING_PATTERN_SET,
> - (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
> + exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
> + &data);
> + exynos_dp_write_byte_to_dpcd(
> + dp, DP_TRAINING_PATTERN_SET,
> + (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
ditto
> }
> }
>
> @@ -913,7 +905,7 @@ static void exynos_dp_commit(struct drm_encoder *encoder)
> }
>
> ret = exynos_dp_set_link_train(dp, dp->video_info->lane_count,
> - dp->video_info->link_rate);
> + dp->video_info->link_rate);
> if (ret) {
> dev_err(dp->dev, "unable to do link train\n");
> return;
> @@ -941,8 +933,8 @@ static void exynos_dp_commit(struct drm_encoder *encoder)
> exynos_dp_start_video(dp);
> }
>
> -static enum drm_connector_status exynos_dp_detect(
> - struct drm_connector *connector, bool force)
> +static enum drm_connector_status
> +exynos_dp_detect(struct drm_connector *connector, bool force)
> {
> return connector_status_connected;
> }
> @@ -990,8 +982,8 @@ static int exynos_dp_get_modes(struct drm_connector *connector)
> return 1;
> }
>
> -static struct drm_encoder *exynos_dp_best_encoder(
> - struct drm_connector *connector)
> +static struct drm_encoder *
> +exynos_dp_best_encoder(struct drm_connector *connector)
> {
> struct exynos_dp_device *dp = ctx_from_connector(connector);
>
> @@ -1005,7 +997,7 @@ static struct drm_connector_helper_funcs exynos_dp_connector_helper_funcs = {
>
> /* returns the number of bridges attached */
> static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
> - struct drm_encoder *encoder)
> + struct drm_encoder *encoder)
> {
> int ret;
>
> @@ -1036,7 +1028,8 @@ static int exynos_dp_create_connector(struct drm_encoder *encoder)
> connector->polled = DRM_CONNECTOR_POLL_HPD;
>
> ret = drm_connector_init(dp->drm_dev, connector,
> - &exynos_dp_connector_funcs, DRM_MODE_CONNECTOR_eDP);
> + &exynos_dp_connector_funcs,
> + DRM_MODE_CONNECTOR_eDP);
> if (ret) {
> DRM_ERROR("Failed to initialize connector with drm\n");
> return ret;
> @@ -1139,8 +1132,8 @@ static struct video_info *exynos_dp_dt_parse_pdata(struct device *dev)
> struct device_node *dp_node = dev->of_node;
> struct video_info *dp_video_config;
>
> - dp_video_config = devm_kzalloc(dev,
> - sizeof(*dp_video_config), GFP_KERNEL);
> + dp_video_config = devm_kzalloc(dev, sizeof(*dp_video_config),
> + GFP_KERNEL);
> if (!dp_video_config)
> return ERR_PTR(-ENOMEM);
>
> @@ -1154,37 +1147,37 @@ static struct video_info *exynos_dp_dt_parse_pdata(struct device *dev)
> of_property_read_bool(dp_node, "interlaced");
>
> if (of_property_read_u32(dp_node, "samsung,color-space",
> - &dp_video_config->color_space)) {
> + &dp_video_config->color_space)) {
> dev_err(dev, "failed to get color-space\n");
> return ERR_PTR(-EINVAL);
> }
>
> if (of_property_read_u32(dp_node, "samsung,dynamic-range",
> - &dp_video_config->dynamic_range)) {
> + &dp_video_config->dynamic_range)) {
> dev_err(dev, "failed to get dynamic-range\n");
> return ERR_PTR(-EINVAL);
> }
>
> if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
> - &dp_video_config->ycbcr_coeff)) {
> + &dp_video_config->ycbcr_coeff)) {
> dev_err(dev, "failed to get ycbcr-coeff\n");
> return ERR_PTR(-EINVAL);
> }
>
> if (of_property_read_u32(dp_node, "samsung,color-depth",
> - &dp_video_config->color_depth)) {
> + &dp_video_config->color_depth)) {
> dev_err(dev, "failed to get color-depth\n");
> return ERR_PTR(-EINVAL);
> }
>
> if (of_property_read_u32(dp_node, "samsung,link-rate",
> - &dp_video_config->link_rate)) {
> + &dp_video_config->link_rate)) {
> dev_err(dev, "failed to get link-rate\n");
> return ERR_PTR(-EINVAL);
> }
>
> if (of_property_read_u32(dp_node, "samsung,lane-count",
> - &dp_video_config->lane_count)) {
> + &dp_video_config->lane_count)) {
> dev_err(dev, "failed to get lane-count\n");
> return ERR_PTR(-EINVAL);
> }
> @@ -1197,7 +1190,7 @@ static int exynos_dp_dt_parse_panel(struct exynos_dp_device *dp)
> int ret;
>
> ret = of_get_videomode(dp->dev->of_node, &dp->priv.vm,
> - OF_USE_NATIVE_MODE);
> + OF_USE_NATIVE_MODE);
> if (ret) {
> DRM_ERROR("failed: of_get_videomode() : %d\n", ret);
> return ret;
> @@ -1294,7 +1287,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
> exynos_dp_init_dp(dp);
>
> ret = devm_request_irq(&pdev->dev, dp->irq, exynos_dp_irq_handler,
> - irq_flags, "exynos-dp", dp);
> + irq_flags, "exynos-dp", dp);
> if (ret) {
> dev_err(&pdev->dev, "failed to request irq\n");
> return ret;
> @@ -1328,7 +1321,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
> }
>
> static void exynos_dp_unbind(struct device *dev, struct device *master,
> - void *data)
> + void *data)
> {
> struct exynos_dp_device *dp = dev_get_drvdata(dev);
>
> @@ -1347,7 +1340,7 @@ static int exynos_dp_probe(struct platform_device *pdev)
> struct exynos_dp_device *dp;
>
> dp = devm_kzalloc(&pdev->dev, sizeof(struct exynos_dp_device),
> - GFP_KERNEL);
> + GFP_KERNEL);
> if (!dp)
> return -ENOMEM;
>
> @@ -1369,8 +1362,9 @@ static int exynos_dp_probe(struct platform_device *pdev)
> of_node_put(bridge_node);
> if (!dp->bridge)
> return -EPROBE_DEFER;
> - } else
> + } else {
> return -EPROBE_DEFER;
> + }
> }
>
> return component_add(&pdev->dev, &exynos_dp_ops);
> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.h b/drivers/gpu/drm/exynos/exynos_dp_core.h
> index e413b6f..71f2b86 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp_core.h
> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.h
> @@ -179,8 +179,8 @@ void exynos_dp_config_interrupt(struct exynos_dp_device *dp);
> enum pll_status exynos_dp_get_pll_lock_status(struct exynos_dp_device *dp);
> void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable);
> void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
> - enum analog_power_block block,
> - bool enable);
> + enum analog_power_block block,
> + bool enable);
> void exynos_dp_init_analog_func(struct exynos_dp_device *dp);
> void exynos_dp_init_hpd(struct exynos_dp_device *dp);
> enum dp_irq_type exynos_dp_get_irq_type(struct exynos_dp_device *dp);
> @@ -191,50 +191,50 @@ int exynos_dp_get_plug_in_status(struct exynos_dp_device *dp);
> void exynos_dp_enable_sw_function(struct exynos_dp_device *dp);
> int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp);
> int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
> - unsigned int reg_addr,
> - unsigned char data);
> + unsigned int reg_addr,
> + unsigned char data);
> int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
> - unsigned int reg_addr,
> - unsigned char *data);
> + unsigned int reg_addr,
> + unsigned char *data);
> int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
> - unsigned int reg_addr,
> - unsigned int count,
> - unsigned char data[]);
> + unsigned int reg_addr,
> + unsigned int count,
> + unsigned char data[]);
> int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
> - unsigned int reg_addr,
> - unsigned int count,
> - unsigned char data[]);
> + unsigned int reg_addr,
> + unsigned int count,
> + unsigned char data[]);
> int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
> unsigned int device_addr,
> unsigned int reg_addr);
> int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
> - unsigned int device_addr,
> - unsigned int reg_addr,
> - unsigned int *data);
> + unsigned int device_addr,
> + unsigned int reg_addr,
> + unsigned int *data);
> int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
> - unsigned int device_addr,
> - unsigned int reg_addr,
> - unsigned int count,
> - unsigned char edid[]);
> + unsigned int device_addr,
> + unsigned int reg_addr,
> + unsigned int count,
> + unsigned char edid[]);
> void exynos_dp_set_link_bandwidth(struct exynos_dp_device *dp, u32 bwtype);
> void exynos_dp_get_link_bandwidth(struct exynos_dp_device *dp, u32 *bwtype);
> void exynos_dp_set_lane_count(struct exynos_dp_device *dp, u32 count);
> void exynos_dp_get_lane_count(struct exynos_dp_device *dp, u32 *count);
> void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool enable);
> void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
> - enum pattern_set pattern);
> + enum pattern_set pattern);
> void exynos_dp_set_lane0_pre_emphasis(struct exynos_dp_device *dp, u32 level);
> void exynos_dp_set_lane1_pre_emphasis(struct exynos_dp_device *dp, u32 level);
> void exynos_dp_set_lane2_pre_emphasis(struct exynos_dp_device *dp, u32 level);
> void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32 level);
> void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
> - u32 training_lane);
> + u32 training_lane);
> void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
> - u32 training_lane);
> + u32 training_lane);
> void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
> - u32 training_lane);
> + u32 training_lane);
> void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
> - u32 training_lane);
> + u32 training_lane);
> u32 exynos_dp_get_lane0_link_training(struct exynos_dp_device *dp);
> u32 exynos_dp_get_lane1_link_training(struct exynos_dp_device *dp);
> u32 exynos_dp_get_lane2_link_training(struct exynos_dp_device *dp);
> @@ -245,9 +245,9 @@ void exynos_dp_init_video(struct exynos_dp_device *dp);
> void exynos_dp_set_video_color_format(struct exynos_dp_device *dp);
> int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp);
> void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
> - enum clock_recovery_m_value_type type,
> - u32 m_value,
> - u32 n_value);
> + enum clock_recovery_m_value_type type,
> + u32 m_value,
> + u32 n_value);
> void exynos_dp_set_video_timing_mode(struct exynos_dp_device *dp, u32 type);
> void exynos_dp_enable_video_master(struct exynos_dp_device *dp, bool enable);
> void exynos_dp_start_video(struct exynos_dp_device *dp);
> diff --git a/drivers/gpu/drm/exynos/exynos_dp_reg.c b/drivers/gpu/drm/exynos/exynos_dp_reg.c
> index c1f87a2..5aff19a 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp_reg.c
> +++ b/drivers/gpu/drm/exynos/exynos_dp_reg.c
> @@ -202,8 +202,8 @@ void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable)
> }
>
> void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
> - enum analog_power_block block,
> - bool enable)
> + enum analog_power_block block,
> + bool enable)
> {
> u32 reg;
>
> @@ -399,8 +399,8 @@ void exynos_dp_init_aux(struct exynos_dp_device *dp)
> exynos_dp_reset_aux(dp);
>
> /* Disable AUX transaction H/W retry */
> - reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0)|
> - AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
> + reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0) |
> + AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
> writel(reg, dp->reg_base + EXYNOS_DP_AUX_HW_RETRY_CTL);
>
> /* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
> @@ -483,8 +483,8 @@ int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp)
> }
>
> int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
> - unsigned int reg_addr,
> - unsigned char data)
> + unsigned int reg_addr,
> + unsigned char data)
> {
> u32 reg;
> int i;
> @@ -519,17 +519,16 @@ int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
> retval = exynos_dp_start_aux_transaction(dp);
> if (retval == 0)
> break;
> - else
> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
> - __func__);
> +
> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
> }
>
> return retval;
> }
>
> int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
> - unsigned int reg_addr,
> - unsigned char *data)
> + unsigned int reg_addr,
> + unsigned char *data)
> {
> u32 reg;
> int i;
> @@ -560,9 +559,8 @@ int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
> retval = exynos_dp_start_aux_transaction(dp);
> if (retval == 0)
> break;
> - else
> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
> - __func__);
> +
> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
> }
>
> /* Read data buffer */
> @@ -573,9 +571,9 @@ int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
> }
>
> int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
> - unsigned int reg_addr,
> - unsigned int count,
> - unsigned char data[])
> + unsigned int reg_addr,
> + unsigned int count,
> + unsigned char data[])
> {
> u32 reg;
> unsigned int start_offset;
> @@ -625,9 +623,9 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
> retval = exynos_dp_start_aux_transaction(dp);
> if (retval == 0)
> break;
> - else
> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
> - __func__);
> +
> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
> + __func__);
> }
>
> start_offset += cur_data_count;
> @@ -637,9 +635,9 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
> }
>
> int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
> - unsigned int reg_addr,
> - unsigned int count,
> - unsigned char data[])
> + unsigned int reg_addr,
> + unsigned int count,
> + unsigned char data[])
> {
> u32 reg;
> unsigned int start_offset;
> @@ -683,9 +681,9 @@ int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
> retval = exynos_dp_start_aux_transaction(dp);
> if (retval == 0)
> break;
> - else
> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
> - __func__);
> +
> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
> + __func__);
> }
>
> for (cur_data_idx = 0; cur_data_idx < cur_data_count;
> @@ -736,9 +734,9 @@ int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
> }
>
> int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
> - unsigned int device_addr,
> - unsigned int reg_addr,
> - unsigned int *data)
> + unsigned int device_addr,
> + unsigned int reg_addr,
> + unsigned int *data)
> {
> u32 reg;
> int i;
> @@ -767,9 +765,8 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
> retval = exynos_dp_start_aux_transaction(dp);
> if (retval == 0)
> break;
> - else
> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
> - __func__);
> +
> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
> }
>
> /* Read data */
> @@ -780,10 +777,10 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
> }
>
> int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
> - unsigned int device_addr,
> - unsigned int reg_addr,
> - unsigned int count,
> - unsigned char edid[])
> + unsigned int device_addr,
> + unsigned int reg_addr,
> + unsigned int count,
> + unsigned char edid[])
> {
> u32 reg;
> unsigned int i, j;
> @@ -807,8 +804,8 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
> * request without sending address
> */
> if (!defer)
> - retval = exynos_dp_select_i2c_device(dp,
> - device_addr, reg_addr + i);
> + retval = exynos_dp_select_i2c_device(
> + dp, device_addr, reg_addr + i);
ditto
Best regards,
Krzysztof
> else
> defer = 0;
>
> @@ -819,24 +816,23 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
> * If Bit 3 is 0, I2C transaction.
> */
> reg = AUX_LENGTH(16) |
> - AUX_TX_COMM_I2C_TRANSACTION |
> - AUX_TX_COMM_READ;
> + AUX_TX_COMM_I2C_TRANSACTION |
> + AUX_TX_COMM_READ;
> writel(reg, dp->reg_base +
> - EXYNOS_DP_AUX_CH_CTL_1);
> + EXYNOS_DP_AUX_CH_CTL_1);
>
> /* Start AUX transaction */
> retval = exynos_dp_start_aux_transaction(dp);
> if (retval == 0)
> break;
> - else
> - dev_dbg(dp->dev,
> - "%s: Aux Transaction fail!\n",
> - __func__);
> +
> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
> + __func__);
> }
> /* Check if Rx sends defer */
> reg = readl(dp->reg_base + EXYNOS_DP_AUX_RX_COMM);
> if (reg == AUX_RX_COMM_AUX_DEFER ||
> - reg == AUX_RX_COMM_I2C_DEFER) {
> + reg == AUX_RX_COMM_I2C_DEFER) {
> dev_err(dp->dev, "Defer: %d\n\n", reg);
> defer = 1;
> }
> @@ -901,7 +897,7 @@ void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool enable)
> }
>
> void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
> - enum pattern_set pattern)
> + enum pattern_set pattern)
> {
> u32 reg;
>
> @@ -974,7 +970,7 @@ void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32 level)
> }
>
> void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
> - u32 training_lane)
> + u32 training_lane)
> {
> u32 reg;
>
> @@ -983,7 +979,7 @@ void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
> }
>
> void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
> - u32 training_lane)
> + u32 training_lane)
> {
> u32 reg;
>
> @@ -992,7 +988,7 @@ void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
> }
>
> void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
> - u32 training_lane)
> + u32 training_lane)
> {
> u32 reg;
>
> @@ -1001,7 +997,7 @@ void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
> }
>
> void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
> - u32 training_lane)
> + u32 training_lane)
> {
> u32 reg;
>
> @@ -1125,9 +1121,9 @@ int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp)
> }
>
> void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
> - enum clock_recovery_m_value_type type,
> - u32 m_value,
> - u32 n_value)
> + enum clock_recovery_m_value_type type,
> + u32 m_value,
> + u32 n_value)
> {
> u32 reg;
>
> @@ -1221,7 +1217,7 @@ void exynos_dp_config_video_slave_mode(struct exynos_dp_device *dp)
> u32 reg;
>
> reg = readl(dp->reg_base + EXYNOS_DP_FUNC_EN_1);
> - reg &= ~(MASTER_VID_FUNC_EN_N|SLAVE_VID_FUNC_EN_N);
> + reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
> reg |= MASTER_VID_FUNC_EN_N;
> writel(reg, dp->reg_base + EXYNOS_DP_FUNC_EN_1);
>
>
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| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Date | 2015-09-03 07:10 +0200 |
| Subject | Re: [PATCH v4 01/16] drm: exynos/dp: fix code style |
| Message-ID | <q4uWB-28R-1@gated-at.bofh.it> |
| In reply to | #1217964 |
On 03.09.2015 14:04, Yakir Yang wrote:
> Hi Krzysztof,
>
> 在 09/03/2015 08:21 AM, Krzysztof Kozlowski 写道:
>> On 01.09.2015 14:46, Yakir Yang wrote:
>>> After run "checkpatch.pl -f --subjective" command, I see there
>>> are lots of alignment problem in exynos_dp driver, so let just
>>> fix them.
>> Hi,
>>
>> Warnings from checkpatch are not a reason for a commit. Reason for a
>> commit could be for example an unreadable code, violation of
>> coding-style leading to decrease in code maintainability or just
>> improving the code readability so it will be easier to review and
>> maintain it.
>>
>> You do not make commits because some tool tells you that. We do not
>> listen to machines :) ... If that would be the case, the commit could be
>> made automatically, without human interaction. Such automated commit
>> could be even easily tested by the machine by comparing object files.
>>
>> Especially that you enabled "subjective" rule. This is not a valid
>> motivation for a commit.
>>
>> Please rephrase this to sensible reason and convince that change is
>> worth the effort.
>
> Oh, nice, thanks for your remind. I would rephrase the commit.
>
>>> - Take Romain suggest, rebase on linux-next branch
>> That comment seems unrelated to the commit. Please remove it.
>
> Done,
>
>>
>>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>>> ---
>>> Changes in v4: None
>>> Changes in v3: None
>>> Changes in v2:
>>> - Take Joe Preches advise, improved commit message more readable, and
>>> avoid using some uncommon style like bellow:
>>> - retval = exynos_dp_read_bytes_from_i2c(...
>>> ...)
>>> + retval =
>>> + exynos_dp_read_bytes_from_i2c(......);
>>>
>>> drivers/gpu/drm/exynos/exynos_dp_core.c | 226
>>> ++++++++++++++++----------------
>>> drivers/gpu/drm/exynos/exynos_dp_core.h | 54 ++++----
>>> drivers/gpu/drm/exynos/exynos_dp_reg.c | 106 +++++++--------
>>> 3 files changed, 188 insertions(+), 198 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
>>> b/drivers/gpu/drm/exynos/exynos_dp_core.c
>>> index d66ade0..266f7f7 100644
>>> --- a/drivers/gpu/drm/exynos/exynos_dp_core.c
>>> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
>>> @@ -115,8 +115,8 @@ static int exynos_dp_read_edid(struct
>>> exynos_dp_device *dp)
>>> /* Read Extension Flag, Number of 128-byte EDID extension
>>> blocks */
>>> retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
>>> - EDID_EXTENSION_FLAG,
>>> - &extend_block);
>>> + EDID_EXTENSION_FLAG,
>>> + &extend_block);
>>> if (retval)
>>> return retval;
>>> @@ -124,10 +124,11 @@ static int exynos_dp_read_edid(struct
>>> exynos_dp_device *dp)
>>> dev_dbg(dp->dev, "EDID data includes a single extension!\n");
>>> /* Read EDID data */
>>> - retval = exynos_dp_read_bytes_from_i2c(dp,
>>> I2C_EDID_DEVICE_ADDR,
>>> - EDID_HEADER_PATTERN,
>>> - EDID_BLOCK_LENGTH,
>>> - &edid[EDID_HEADER_PATTERN]);
>>> + retval = exynos_dp_read_bytes_from_i2c(
>>> + dp, I2C_EDID_DEVICE_ADDR,
>>> + EDID_HEADER_PATTERN,
>>> + EDID_BLOCK_LENGTH,
>>> + &edid[EDID_HEADER_PATTERN]);
>>> if (retval != 0) {
>>> dev_err(dp->dev, "EDID Read failed!\n");
>>> return -EIO;
>>> @@ -139,11 +140,11 @@ static int exynos_dp_read_edid(struct
>>> exynos_dp_device *dp)
>>> }
>>> /* Read additional EDID data */
>>> - retval = exynos_dp_read_bytes_from_i2c(dp,
>>> - I2C_EDID_DEVICE_ADDR,
>>> - EDID_BLOCK_LENGTH,
>>> - EDID_BLOCK_LENGTH,
>>> - &edid[EDID_BLOCK_LENGTH]);
>>> + retval = exynos_dp_read_bytes_from_i2c(
>>> + dp, I2C_EDID_DEVICE_ADDR,
>>> + EDID_BLOCK_LENGTH,
>>> + EDID_BLOCK_LENGTH,
>>> + &edid[EDID_BLOCK_LENGTH]);
>>> if (retval != 0) {
>>> dev_err(dp->dev, "EDID Read failed!\n");
>>> return -EIO;
>>> @@ -155,24 +156,22 @@ static int exynos_dp_read_edid(struct
>>> exynos_dp_device *dp)
>>> }
>>> exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
>>> - &test_vector);
>>> + &test_vector);
>>> if (test_vector & DP_TEST_LINK_EDID_READ) {
>>> - exynos_dp_write_byte_to_dpcd(dp,
>>> - DP_TEST_EDID_CHECKSUM,
>>> + exynos_dp_write_byte_to_dpcd(
>>> + dp, DP_TEST_EDID_CHECKSUM,
>>> edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
>>> - exynos_dp_write_byte_to_dpcd(dp,
>>> - DP_TEST_RESPONSE,
>>> + exynos_dp_write_byte_to_dpcd(
>>> + dp, DP_TEST_RESPONSE,
>>> DP_TEST_EDID_CHECKSUM_WRITE);
>> To me, missing argument after opening parenthesis, looks worse. I would
>> prefer:
>>
>> exynos_dp_write_byte_to_dpcd(dp,
>>
>> Why you moved the 'dp' argument to new line?
>
> Hmm... Just like style tool indicate, no more warning after
> that change.
>
> For now, I would like to follow the original style, just improved
> some obvious style problem. :-)
What was the checkpatch warning that said 'dp' has to move to new line?
I tried this and I don't see it.
Best regards,
Krzysztof
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-03 07:40 +0200 |
| Subject | Re: [PATCH v4 01/16] drm: exynos/dp: fix code style |
| Message-ID | <q4vpF-2GW-9@gated-at.bofh.it> |
| In reply to | #1218031 |
Hi Krzysztof,
在 09/03/2015 01:08 PM, Krzysztof Kozlowski 写道:
> On 03.09.2015 14:04, Yakir Yang wrote:
>> Hi Krzysztof,
>>
>> 在 09/03/2015 08:21 AM, Krzysztof Kozlowski 写道:
>>> On 01.09.2015 14:46, Yakir Yang wrote:
>>>> After run "checkpatch.pl -f --subjective" command, I see there
>>>> are lots of alignment problem in exynos_dp driver, so let just
>>>> fix them.
>>> Hi,
>>>
>>> Warnings from checkpatch are not a reason for a commit. Reason for a
>>> commit could be for example an unreadable code, violation of
>>> coding-style leading to decrease in code maintainability or just
>>> improving the code readability so it will be easier to review and
>>> maintain it.
>>>
>>> You do not make commits because some tool tells you that. We do not
>>> listen to machines :) ... If that would be the case, the commit could be
>>> made automatically, without human interaction. Such automated commit
>>> could be even easily tested by the machine by comparing object files.
>>>
>>> Especially that you enabled "subjective" rule. This is not a valid
>>> motivation for a commit.
>>>
>>> Please rephrase this to sensible reason and convince that change is
>>> worth the effort.
>> Oh, nice, thanks for your remind. I would rephrase the commit.
>>
>>>> - Take Romain suggest, rebase on linux-next branch
>>> That comment seems unrelated to the commit. Please remove it.
>> Done,
>>
>>>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>>>> ---
>>>> Changes in v4: None
>>>> Changes in v3: None
>>>> Changes in v2:
>>>> - Take Joe Preches advise, improved commit message more readable, and
>>>> avoid using some uncommon style like bellow:
>>>> - retval = exynos_dp_read_bytes_from_i2c(...
>>>> ...)
>>>> + retval =
>>>> + exynos_dp_read_bytes_from_i2c(......);
>>>>
>>>> drivers/gpu/drm/exynos/exynos_dp_core.c | 226
>>>> ++++++++++++++++----------------
>>>> drivers/gpu/drm/exynos/exynos_dp_core.h | 54 ++++----
>>>> drivers/gpu/drm/exynos/exynos_dp_reg.c | 106 +++++++--------
>>>> 3 files changed, 188 insertions(+), 198 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
>>>> b/drivers/gpu/drm/exynos/exynos_dp_core.c
>>>> index d66ade0..266f7f7 100644
>>>> --- a/drivers/gpu/drm/exynos/exynos_dp_core.c
>>>> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
>>>> @@ -115,8 +115,8 @@ static int exynos_dp_read_edid(struct
>>>> exynos_dp_device *dp)
>>>> /* Read Extension Flag, Number of 128-byte EDID extension
>>>> blocks */
>>>> retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
>>>> - EDID_EXTENSION_FLAG,
>>>> - &extend_block);
>>>> + EDID_EXTENSION_FLAG,
>>>> + &extend_block);
>>>> if (retval)
>>>> return retval;
>>>> @@ -124,10 +124,11 @@ static int exynos_dp_read_edid(struct
>>>> exynos_dp_device *dp)
>>>> dev_dbg(dp->dev, "EDID data includes a single extension!\n");
>>>> /* Read EDID data */
>>>> - retval = exynos_dp_read_bytes_from_i2c(dp,
>>>> I2C_EDID_DEVICE_ADDR,
>>>> - EDID_HEADER_PATTERN,
>>>> - EDID_BLOCK_LENGTH,
>>>> - &edid[EDID_HEADER_PATTERN]);
>>>> + retval = exynos_dp_read_bytes_from_i2c(
>>>> + dp, I2C_EDID_DEVICE_ADDR,
>>>> + EDID_HEADER_PATTERN,
>>>> + EDID_BLOCK_LENGTH,
>>>> + &edid[EDID_HEADER_PATTERN]);
>>>> if (retval != 0) {
>>>> dev_err(dp->dev, "EDID Read failed!\n");
>>>> return -EIO;
>>>> @@ -139,11 +140,11 @@ static int exynos_dp_read_edid(struct
>>>> exynos_dp_device *dp)
>>>> }
>>>> /* Read additional EDID data */
>>>> - retval = exynos_dp_read_bytes_from_i2c(dp,
>>>> - I2C_EDID_DEVICE_ADDR,
>>>> - EDID_BLOCK_LENGTH,
>>>> - EDID_BLOCK_LENGTH,
>>>> - &edid[EDID_BLOCK_LENGTH]);
>>>> + retval = exynos_dp_read_bytes_from_i2c(
>>>> + dp, I2C_EDID_DEVICE_ADDR,
>>>> + EDID_BLOCK_LENGTH,
>>>> + EDID_BLOCK_LENGTH,
>>>> + &edid[EDID_BLOCK_LENGTH]);
>>>> if (retval != 0) {
>>>> dev_err(dp->dev, "EDID Read failed!\n");
>>>> return -EIO;
>>>> @@ -155,24 +156,22 @@ static int exynos_dp_read_edid(struct
>>>> exynos_dp_device *dp)
>>>> }
>>>> exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
>>>> - &test_vector);
>>>> + &test_vector);
>>>> if (test_vector & DP_TEST_LINK_EDID_READ) {
>>>> - exynos_dp_write_byte_to_dpcd(dp,
>>>> - DP_TEST_EDID_CHECKSUM,
>>>> + exynos_dp_write_byte_to_dpcd(
>>>> + dp, DP_TEST_EDID_CHECKSUM,
>>>> edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
>>>> - exynos_dp_write_byte_to_dpcd(dp,
>>>> - DP_TEST_RESPONSE,
>>>> + exynos_dp_write_byte_to_dpcd(
>>>> + dp, DP_TEST_RESPONSE,
>>>> DP_TEST_EDID_CHECKSUM_WRITE);
>>> To me, missing argument after opening parenthesis, looks worse. I would
>>> prefer:
>>>
>>> exynos_dp_write_byte_to_dpcd(dp,
>>>
>>> Why you moved the 'dp' argument to new line?
>> Hmm... Just like style tool indicate, no more warning after
>> that change.
>>
>> For now, I would like to follow the original style, just improved
>> some obvious style problem. :-)
> What was the checkpatch warning that said 'dp' has to move to new line?
> I tried this and I don't see it.
checkpatch haven't remind me that put dp to new line would fix
this warning, this just come from my experiments. And I works,
no more warnings from checkpatch, so I toke this style.
- Yakir
> Best regards,
> Krzysztof
>
>
>
>
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| From | Joe Perches <joe@perches.com> |
|---|---|
| Date | 2015-09-03 08:00 +0200 |
| Subject | Re: [PATCH v4 01/16] drm: exynos/dp: fix code style |
| Message-ID | <q4vJ0-33s-5@gated-at.bofh.it> |
| In reply to | #1218047 |
On Thu, 2015-09-03 at 13:33 +0800, Yakir Yang wrote:
[]
> >>>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
[]
> >>>> @@ -155,24 +156,22 @@ static int exynos_dp_read_edid(struct
> >>>> exynos_dp_device *dp)
> >>>> }
> >>>> exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
> >>>> - &test_vector);
> >>>> + &test_vector);
> >>>> if (test_vector & DP_TEST_LINK_EDID_READ) {
> >>>> - exynos_dp_write_byte_to_dpcd(dp,
> >>>> - DP_TEST_EDID_CHECKSUM,
> >>>> + exynos_dp_write_byte_to_dpcd(
> >>>> + dp, DP_TEST_EDID_CHECKSUM,
> >>>> edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
> >>>> - exynos_dp_write_byte_to_dpcd(dp,
> >>>> - DP_TEST_RESPONSE,
> >>>> + exynos_dp_write_byte_to_dpcd(
> >>>> + dp, DP_TEST_RESPONSE,
> >>>> DP_TEST_EDID_CHECKSUM_WRITE);
> >>> To me, missing argument after opening parenthesis, looks worse. I would
> >>> prefer:
> >>>
> >>> exynos_dp_write_byte_to_dpcd(dp,
> >>>
> >>> Why you moved the 'dp' argument to new line?
> >> Hmm... Just like style tool indicate, no more warning after
> >> that change.
> >>
> >> For now, I would like to follow the original style, just improved
> >> some obvious style problem. :-)
> > What was the checkpatch warning that said 'dp' has to move to new line?
> > I tried this and I don't see it.
>
> checkpatch haven't remind me that put dp to new line would fix
> this warning, this just come from my experiments. And I works,
> no more warnings from checkpatch, so I toke this style.
Checkpatch isn't a great arbiter of style.
It's just a brainless tool.
Always use your instead of anything brainless.
If it were code I was writing, I'd ignore 80 columns warnings
where appropriate.
These are long function names and long macro defines, so it's
inappropriate to use 80 columns as a guiding style.
I'd write:
exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST, &test_vector);
if (test_vector & DP_TEST_LINK_EDID_READ) {
exynos_dp_write_byte_to_dpcd(dp, DP_TEST_EDID_CHECKSUM,
edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
exynos_dp_write_byte_to_dpcd(dp, DP_TEST_RESPONSE,
DP_TEST_EDID_CHECKSUM_WRITE);
}
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-06 03:40 +0200 |
| Subject | Re: [PATCH v4 01/16] drm: exynos/dp: fix code style |
| Message-ID | <q5x61-Ya-9@gated-at.bofh.it> |
| In reply to | #1218053 |
Hi Joe,
在 09/03/2015 01:57 PM, Joe Perches 写道:
> On Thu, 2015-09-03 at 13:33 +0800, Yakir Yang wrote:
> []
>>>>>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
> []
>>>>>> @@ -155,24 +156,22 @@ static int exynos_dp_read_edid(struct
>>>>>> exynos_dp_device *dp)
>>>>>> }
>>>>>> exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
>>>>>> - &test_vector);
>>>>>> + &test_vector);
>>>>>> if (test_vector & DP_TEST_LINK_EDID_READ) {
>>>>>> - exynos_dp_write_byte_to_dpcd(dp,
>>>>>> - DP_TEST_EDID_CHECKSUM,
>>>>>> + exynos_dp_write_byte_to_dpcd(
>>>>>> + dp, DP_TEST_EDID_CHECKSUM,
>>>>>> edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
>>>>>> - exynos_dp_write_byte_to_dpcd(dp,
>>>>>> - DP_TEST_RESPONSE,
>>>>>> + exynos_dp_write_byte_to_dpcd(
>>>>>> + dp, DP_TEST_RESPONSE,
>>>>>> DP_TEST_EDID_CHECKSUM_WRITE);
>>>>> To me, missing argument after opening parenthesis, looks worse. I would
>>>>> prefer:
>>>>>
>>>>> exynos_dp_write_byte_to_dpcd(dp,
>>>>>
>>>>> Why you moved the 'dp' argument to new line?
>>>> Hmm... Just like style tool indicate, no more warning after
>>>> that change.
>>>>
>>>> For now, I would like to follow the original style, just improved
>>>> some obvious style problem. :-)
>>> What was the checkpatch warning that said 'dp' has to move to new line?
>>> I tried this and I don't see it.
>> checkpatch haven't remind me that put dp to new line would fix
>> this warning, this just come from my experiments. And I works,
>> no more warnings from checkpatch, so I toke this style.
> Checkpatch isn't a great arbiter of style.
> It's just a brainless tool.
>
> Always use your instead of anything brainless.
>
> If it were code I was writing, I'd ignore 80 columns warnings
> where appropriate.
>
> These are long function names and long macro defines, so it's
> inappropriate to use 80 columns as a guiding style.
>
> I'd write:
>
> exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST, &test_vector);
> if (test_vector & DP_TEST_LINK_EDID_READ) {
> exynos_dp_write_byte_to_dpcd(dp, DP_TEST_EDID_CHECKSUM,
> edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
> exynos_dp_write_byte_to_dpcd(dp, DP_TEST_RESPONSE,
> DP_TEST_EDID_CHECKSUM_WRITE);
> }
>
So... just ignore the 80 columns warnings. Actually I prefer to
keep the original style in this case.
Thanks,
- Yakir
]
>
>
>
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-03 07:10 +0200 |
| Subject | Re: [PATCH v4 01/16] drm: exynos/dp: fix code style |
| Message-ID | <q4uWB-28R-3@gated-at.bofh.it> |
| In reply to | #1217964 |
Hi Krzysztof,
在 09/03/2015 08:21 AM, Krzysztof Kozlowski 写道:
> On 01.09.2015 14:46, Yakir Yang wrote:
>> After run "checkpatch.pl -f --subjective" command, I see there
>> are lots of alignment problem in exynos_dp driver, so let just
>> fix them.
> Hi,
>
> Warnings from checkpatch are not a reason for a commit. Reason for a
> commit could be for example an unreadable code, violation of
> coding-style leading to decrease in code maintainability or just
> improving the code readability so it will be easier to review and
> maintain it.
>
> You do not make commits because some tool tells you that. We do not
> listen to machines :) ... If that would be the case, the commit could be
> made automatically, without human interaction. Such automated commit
> could be even easily tested by the machine by comparing object files.
>
> Especially that you enabled "subjective" rule. This is not a valid
> motivation for a commit.
>
> Please rephrase this to sensible reason and convince that change is
> worth the effort.
Oh, nice, thanks for your remind. I would rephrase the commit.
>> - Take Romain suggest, rebase on linux-next branch
> That comment seems unrelated to the commit. Please remove it.
Done,
>
>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>> ---
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2:
>> - Take Joe Preches advise, improved commit message more readable, and
>> avoid using some uncommon style like bellow:
>> - retval = exynos_dp_read_bytes_from_i2c(...
>> ...)
>> + retval =
>> + exynos_dp_read_bytes_from_i2c(......);
>>
>> drivers/gpu/drm/exynos/exynos_dp_core.c | 226 ++++++++++++++++----------------
>> drivers/gpu/drm/exynos/exynos_dp_core.h | 54 ++++----
>> drivers/gpu/drm/exynos/exynos_dp_reg.c | 106 +++++++--------
>> 3 files changed, 188 insertions(+), 198 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
>> index d66ade0..266f7f7 100644
>> --- a/drivers/gpu/drm/exynos/exynos_dp_core.c
>> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
>> @@ -115,8 +115,8 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
>>
>> /* Read Extension Flag, Number of 128-byte EDID extension blocks */
>> retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
>> - EDID_EXTENSION_FLAG,
>> - &extend_block);
>> + EDID_EXTENSION_FLAG,
>> + &extend_block);
>> if (retval)
>> return retval;
>>
>> @@ -124,10 +124,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
>> dev_dbg(dp->dev, "EDID data includes a single extension!\n");
>>
>> /* Read EDID data */
>> - retval = exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
>> - EDID_HEADER_PATTERN,
>> - EDID_BLOCK_LENGTH,
>> - &edid[EDID_HEADER_PATTERN]);
>> + retval = exynos_dp_read_bytes_from_i2c(
>> + dp, I2C_EDID_DEVICE_ADDR,
>> + EDID_HEADER_PATTERN,
>> + EDID_BLOCK_LENGTH,
>> + &edid[EDID_HEADER_PATTERN]);
>> if (retval != 0) {
>> dev_err(dp->dev, "EDID Read failed!\n");
>> return -EIO;
>> @@ -139,11 +140,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
>> }
>>
>> /* Read additional EDID data */
>> - retval = exynos_dp_read_bytes_from_i2c(dp,
>> - I2C_EDID_DEVICE_ADDR,
>> - EDID_BLOCK_LENGTH,
>> - EDID_BLOCK_LENGTH,
>> - &edid[EDID_BLOCK_LENGTH]);
>> + retval = exynos_dp_read_bytes_from_i2c(
>> + dp, I2C_EDID_DEVICE_ADDR,
>> + EDID_BLOCK_LENGTH,
>> + EDID_BLOCK_LENGTH,
>> + &edid[EDID_BLOCK_LENGTH]);
>> if (retval != 0) {
>> dev_err(dp->dev, "EDID Read failed!\n");
>> return -EIO;
>> @@ -155,24 +156,22 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
>> }
>>
>> exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
>> - &test_vector);
>> + &test_vector);
>> if (test_vector & DP_TEST_LINK_EDID_READ) {
>> - exynos_dp_write_byte_to_dpcd(dp,
>> - DP_TEST_EDID_CHECKSUM,
>> + exynos_dp_write_byte_to_dpcd(
>> + dp, DP_TEST_EDID_CHECKSUM,
>> edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
>> - exynos_dp_write_byte_to_dpcd(dp,
>> - DP_TEST_RESPONSE,
>> + exynos_dp_write_byte_to_dpcd(
>> + dp, DP_TEST_RESPONSE,
>> DP_TEST_EDID_CHECKSUM_WRITE);
> To me, missing argument after opening parenthesis, looks worse. I would
> prefer:
>
> exynos_dp_write_byte_to_dpcd(dp,
>
> Why you moved the 'dp' argument to new line?
Hmm... Just like style tool indicate, no more warning after
that change.
For now, I would like to follow the original style, just improved
some obvious style problem. :-)
>
>> }
>> } else {
>> dev_info(dp->dev, "EDID data does not include any extensions.\n");
>>
>> /* Read EDID data */
>> - retval = exynos_dp_read_bytes_from_i2c(dp,
>> - I2C_EDID_DEVICE_ADDR,
>> - EDID_HEADER_PATTERN,
>> - EDID_BLOCK_LENGTH,
>> - &edid[EDID_HEADER_PATTERN]);
>> + retval = exynos_dp_read_bytes_from_i2c(
>> + dp, I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
>> + EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]);
> ditto
Done
>
>> if (retval != 0) {
>> dev_err(dp->dev, "EDID Read failed!\n");
>> return -EIO;
>> @@ -183,16 +182,15 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
>> return -EIO;
>> }
>>
>> - exynos_dp_read_byte_from_dpcd(dp,
>> - DP_TEST_REQUEST,
>> - &test_vector);
>> + exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
>> + &test_vector);
>> if (test_vector & DP_TEST_LINK_EDID_READ) {
>> - exynos_dp_write_byte_to_dpcd(dp,
>> - DP_TEST_EDID_CHECKSUM,
>> - edid[EDID_CHECKSUM]);
>> - exynos_dp_write_byte_to_dpcd(dp,
>> - DP_TEST_RESPONSE,
>> - DP_TEST_EDID_CHECKSUM_WRITE);
>> + exynos_dp_write_byte_to_dpcd(
>> + dp, DP_TEST_EDID_CHECKSUM,
>> + edid[EDID_CHECKSUM]);
>> + exynos_dp_write_byte_to_dpcd(
>> + dp, DP_TEST_RESPONSE,
>> + DP_TEST_EDID_CHECKSUM_WRITE);
> ditto
Done
>
>> }
>> }
>>
>> @@ -207,8 +205,7 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp)
>> int retval;
>>
>> /* Read DPCD DP_DPCD_REV~RECEIVE_PORT1_CAP_1 */
>> - retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV,
>> - 12, buf);
>> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV, 12, buf);
>> if (retval)
>> return retval;
>>
>> @@ -223,7 +220,7 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp)
>> }
>>
>> static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp,
>> - bool enable)
>> + bool enable)
>> {
>> u8 data;
>>
>> @@ -231,11 +228,11 @@ static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp,
>>
>> if (enable)
>> exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
>> - DP_LANE_COUNT_ENHANCED_FRAME_EN |
>> - DPCD_LANE_COUNT_SET(data));
>> + DP_LANE_COUNT_ENHANCED_FRAME_EN |
>> + DPCD_LANE_COUNT_SET(data));
>> else
>> exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
>> - DPCD_LANE_COUNT_SET(data));
>> + DPCD_LANE_COUNT_SET(data));
>> }
>>
>> static int exynos_dp_is_enhanced_mode_available(struct exynos_dp_device *dp)
>> @@ -262,13 +259,12 @@ static void exynos_dp_training_pattern_dis(struct exynos_dp_device *dp)
>> {
>> exynos_dp_set_training_pattern(dp, DP_NONE);
>>
>> - exynos_dp_write_byte_to_dpcd(dp,
>> - DP_TRAINING_PATTERN_SET,
>> - DP_TRAINING_PATTERN_DISABLE);
>> + exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
>> + DP_TRAINING_PATTERN_DISABLE);
>> }
>>
>> static void exynos_dp_set_lane_lane_pre_emphasis(struct exynos_dp_device *dp,
>> - int pre_emphasis, int lane)
>> + int pre_emphasis, int lane)
>> {
>> switch (lane) {
>> case 0:
>> @@ -308,15 +304,14 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
>> /* Setup RX configuration */
>> buf[0] = dp->link_train.link_rate;
>> buf[1] = dp->link_train.lane_count;
>> - retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET,
>> - 2, buf);
>> + retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET, 2, buf);
>> if (retval)
>> return retval;
>>
>> /* Set TX pre-emphasis to minimum */
>> for (lane = 0; lane < lane_count; lane++)
>> - exynos_dp_set_lane_lane_pre_emphasis(dp,
>> - PRE_EMPHASIS_LEVEL_0, lane);
>> + exynos_dp_set_lane_lane_pre_emphasis(dp, PRE_EMPHASIS_LEVEL_0,
>> + lane);
>>
>> /* Wait for PLL lock */
>> pll_tries = 0;
>> @@ -334,9 +329,9 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
>> exynos_dp_set_training_pattern(dp, TRAINING_PTN1);
>>
>> /* Set RX training pattern */
>> - retval = exynos_dp_write_byte_to_dpcd(dp,
>> - DP_TRAINING_PATTERN_SET,
>> - DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1);
>> + retval = exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
>> + DP_LINK_SCRAMBLING_DISABLE |
>> + DP_TRAINING_PATTERN_1);
>> if (retval)
>> return retval;
>>
>> @@ -345,7 +340,7 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
>> DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
>>
>> retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
>> - lane_count, buf);
>> + lane_count, buf);
>>
>> return retval;
>> }
>> @@ -353,7 +348,7 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
>> static unsigned char exynos_dp_get_lane_status(u8 link_status[2], int lane)
>> {
>> int shift = (lane & 1) * 4;
>> - u8 link_value = link_status[lane>>1];
>> + u8 link_value = link_status[lane >> 1];
>>
>> return (link_value >> shift) & 0xf;
>> }
>> @@ -372,7 +367,7 @@ static int exynos_dp_clock_recovery_ok(u8 link_status[2], int lane_count)
>> }
>>
>> static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
>> - int lane_count)
>> + int lane_count)
>> {
>> int lane;
>> u8 lane_status;
>> @@ -391,10 +386,10 @@ static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
>> }
>>
>> static unsigned char exynos_dp_get_adjust_request_voltage(u8 adjust_request[2],
>> - int lane)
>> + int lane)
>> {
>> int shift = (lane & 1) * 4;
>> - u8 link_value = adjust_request[lane>>1];
>> + u8 link_value = adjust_request[lane >> 1];
>>
>> return (link_value >> shift) & 0x3;
>> }
>> @@ -404,13 +399,13 @@ static unsigned char exynos_dp_get_adjust_request_pre_emphasis(
>> int lane)
>> {
>> int shift = (lane & 1) * 4;
>> - u8 link_value = adjust_request[lane>>1];
>> + u8 link_value = adjust_request[lane >> 1];
>>
>> return ((link_value >> shift) & 0xc) >> 2;
>> }
>>
>> static void exynos_dp_set_lane_link_training(struct exynos_dp_device *dp,
>> - u8 training_lane_set, int lane)
>> + u8 training_lane_set, int lane)
>> {
>> switch (lane) {
>> case 0:
>> @@ -430,9 +425,8 @@ static void exynos_dp_set_lane_link_training(struct exynos_dp_device *dp,
>> }
>> }
>>
>> -static unsigned int exynos_dp_get_lane_link_training(
>> - struct exynos_dp_device *dp,
>> - int lane)
>> +static unsigned int
>> +exynos_dp_get_lane_link_training(struct exynos_dp_device *dp, int lane)
>> {
>> u32 reg;
>>
>> @@ -466,7 +460,7 @@ static void exynos_dp_reduce_link_rate(struct exynos_dp_device *dp)
>> }
>>
>> static void exynos_dp_get_adjust_training_lane(struct exynos_dp_device *dp,
>> - u8 adjust_request[2])
>> + u8 adjust_request[2])
>> {
>> int lane, lane_count;
>> u8 voltage_swing, pre_emphasis, training_lane;
>> @@ -499,13 +493,13 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
>>
>> lane_count = dp->link_train.lane_count;
>>
>> - retval = exynos_dp_read_bytes_from_dpcd(dp,
>> - DP_LANE0_1_STATUS, 2, link_status);
>> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
>> + 2, link_status);
>> if (retval)
>> return retval;
>>
>> - retval = exynos_dp_read_bytes_from_dpcd(dp,
>> - DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
>> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
>> + 2, adjust_request);
>> if (retval)
>> return retval;
>>
>> @@ -513,8 +507,8 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
>> /* set training pattern 2 for EQ */
>> exynos_dp_set_training_pattern(dp, TRAINING_PTN2);
>>
>> - retval = exynos_dp_write_byte_to_dpcd(dp,
>> - DP_TRAINING_PATTERN_SET,
>> + retval = exynos_dp_write_byte_to_dpcd(
>> + dp, DP_TRAINING_PATTERN_SET,
>> DP_LINK_SCRAMBLING_DISABLE |
>> DP_TRAINING_PATTERN_2);
> ditto
Done
>
>> if (retval)
>> @@ -552,11 +546,11 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
>> exynos_dp_get_adjust_training_lane(dp, adjust_request);
>>
>> for (lane = 0; lane < lane_count; lane++)
>> - exynos_dp_set_lane_link_training(dp,
>> - dp->link_train.training_lane[lane], lane);
>> + exynos_dp_set_lane_link_training(
>> + dp, dp->link_train.training_lane[lane], lane);
>>
>> - retval = exynos_dp_write_bytes_to_dpcd(dp,
>> - DP_TRAINING_LANE0_SET, lane_count,
>> + retval = exynos_dp_write_bytes_to_dpcd(
>> + dp, DP_TRAINING_LANE0_SET, lane_count,
>> dp->link_train.training_lane);
> ditto
Done
>
>> if (retval)
>> return retval;
>> @@ -574,8 +568,8 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
>>
>> lane_count = dp->link_train.lane_count;
>>
>> - retval = exynos_dp_read_bytes_from_dpcd(dp,
>> - DP_LANE0_1_STATUS, 2, link_status);
>> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
>> + 2, link_status);
>> if (retval)
>> return retval;
>>
>> @@ -584,13 +578,13 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
>> return -EIO;
>> }
>>
>> - retval = exynos_dp_read_bytes_from_dpcd(dp,
>> - DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
>> + retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
>> + 2, adjust_request);
>> if (retval)
>> return retval;
>>
>> - retval = exynos_dp_read_byte_from_dpcd(dp,
>> - DP_LANE_ALIGN_STATUS_UPDATED, &link_align);
>> + retval = exynos_dp_read_byte_from_dpcd(dp, DP_LANE_ALIGN_STATUS_UPDATED,
>> + &link_align);
>> if (retval)
>> return retval;
>>
>> @@ -629,17 +623,18 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
>> }
>>
>> for (lane = 0; lane < lane_count; lane++)
>> - exynos_dp_set_lane_link_training(dp,
>> - dp->link_train.training_lane[lane], lane);
>> + exynos_dp_set_lane_link_training(
>> + dp, dp->link_train.training_lane[lane], lane);
> ditto
Done
>
>>
>> retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
>> - lane_count, dp->link_train.training_lane);
>> + lane_count,
>> + dp->link_train.training_lane);
>>
>> return retval;
>> }
>>
>> static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
>> - u8 *bandwidth)
>> + u8 *bandwidth)
>> {
>> u8 data;
>>
>> @@ -652,7 +647,7 @@ static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
>> }
>>
>> static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp,
>> - u8 *lane_count)
>> + u8 *lane_count)
>> {
>> u8 data;
>>
>> @@ -665,8 +660,8 @@ static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp,
>> }
>>
>> static void exynos_dp_init_training(struct exynos_dp_device *dp,
>> - enum link_lane_count_type max_lane,
>> - enum link_rate_type max_rate)
>> + enum link_lane_count_type max_lane,
>> + enum link_rate_type max_rate)
>> {
>> /*
>> * MACRO_RST must be applied after the PLL_LOCK to avoid
>> @@ -679,7 +674,7 @@ static void exynos_dp_init_training(struct exynos_dp_device *dp,
>> exynos_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
>>
>> if ((dp->link_train.link_rate != LINK_RATE_1_62GBPS) &&
>> - (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
>> + (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
>> dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n",
>> dp->link_train.link_rate);
>> dp->link_train.link_rate = LINK_RATE_1_62GBPS;
>> @@ -739,8 +734,7 @@ static int exynos_dp_sw_link_training(struct exynos_dp_device *dp)
>> }
>>
>> static int exynos_dp_set_link_train(struct exynos_dp_device *dp,
>> - u32 count,
>> - u32 bwtype)
>> + u32 count, u32 bwtype)
>> {
>> int i;
>> int retval;
>> @@ -828,21 +822,19 @@ static void exynos_dp_enable_scramble(struct exynos_dp_device *dp, bool enable)
>> if (enable) {
>> exynos_dp_enable_scrambling(dp);
>>
>> - exynos_dp_read_byte_from_dpcd(dp,
>> - DP_TRAINING_PATTERN_SET,
>> - &data);
>> - exynos_dp_write_byte_to_dpcd(dp,
>> - DP_TRAINING_PATTERN_SET,
>> - (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
>> + exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
>> + &data);
>> + exynos_dp_write_byte_to_dpcd(
>> + dp, DP_TRAINING_PATTERN_SET,
>> + (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
> ditto
Done
>
>> } else {
>> exynos_dp_disable_scrambling(dp);
>>
>> - exynos_dp_read_byte_from_dpcd(dp,
>> - DP_TRAINING_PATTERN_SET,
>> - &data);
>> - exynos_dp_write_byte_to_dpcd(dp,
>> - DP_TRAINING_PATTERN_SET,
>> - (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
>> + exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
>> + &data);
>> + exynos_dp_write_byte_to_dpcd(
>> + dp, DP_TRAINING_PATTERN_SET,
>> + (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
> ditto
Done
>
>> }
>> }
>>
>> @@ -913,7 +905,7 @@ static void exynos_dp_commit(struct drm_encoder *encoder)
>> }
>>
>> ret = exynos_dp_set_link_train(dp, dp->video_info->lane_count,
>> - dp->video_info->link_rate);
>> + dp->video_info->link_rate);
>> if (ret) {
>> dev_err(dp->dev, "unable to do link train\n");
>> return;
>> @@ -941,8 +933,8 @@ static void exynos_dp_commit(struct drm_encoder *encoder)
>> exynos_dp_start_video(dp);
>> }
>>
>> -static enum drm_connector_status exynos_dp_detect(
>> - struct drm_connector *connector, bool force)
>> +static enum drm_connector_status
>> +exynos_dp_detect(struct drm_connector *connector, bool force)
>> {
>> return connector_status_connected;
>> }
>> @@ -990,8 +982,8 @@ static int exynos_dp_get_modes(struct drm_connector *connector)
>> return 1;
>> }
>>
>> -static struct drm_encoder *exynos_dp_best_encoder(
>> - struct drm_connector *connector)
>> +static struct drm_encoder *
>> +exynos_dp_best_encoder(struct drm_connector *connector)
>> {
>> struct exynos_dp_device *dp = ctx_from_connector(connector);
>>
>> @@ -1005,7 +997,7 @@ static struct drm_connector_helper_funcs exynos_dp_connector_helper_funcs = {
>>
>> /* returns the number of bridges attached */
>> static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
>> - struct drm_encoder *encoder)
>> + struct drm_encoder *encoder)
>> {
>> int ret;
>>
>> @@ -1036,7 +1028,8 @@ static int exynos_dp_create_connector(struct drm_encoder *encoder)
>> connector->polled = DRM_CONNECTOR_POLL_HPD;
>>
>> ret = drm_connector_init(dp->drm_dev, connector,
>> - &exynos_dp_connector_funcs, DRM_MODE_CONNECTOR_eDP);
>> + &exynos_dp_connector_funcs,
>> + DRM_MODE_CONNECTOR_eDP);
>> if (ret) {
>> DRM_ERROR("Failed to initialize connector with drm\n");
>> return ret;
>> @@ -1139,8 +1132,8 @@ static struct video_info *exynos_dp_dt_parse_pdata(struct device *dev)
>> struct device_node *dp_node = dev->of_node;
>> struct video_info *dp_video_config;
>>
>> - dp_video_config = devm_kzalloc(dev,
>> - sizeof(*dp_video_config), GFP_KERNEL);
>> + dp_video_config = devm_kzalloc(dev, sizeof(*dp_video_config),
>> + GFP_KERNEL);
>> if (!dp_video_config)
>> return ERR_PTR(-ENOMEM);
>>
>> @@ -1154,37 +1147,37 @@ static struct video_info *exynos_dp_dt_parse_pdata(struct device *dev)
>> of_property_read_bool(dp_node, "interlaced");
>>
>> if (of_property_read_u32(dp_node, "samsung,color-space",
>> - &dp_video_config->color_space)) {
>> + &dp_video_config->color_space)) {
>> dev_err(dev, "failed to get color-space\n");
>> return ERR_PTR(-EINVAL);
>> }
>>
>> if (of_property_read_u32(dp_node, "samsung,dynamic-range",
>> - &dp_video_config->dynamic_range)) {
>> + &dp_video_config->dynamic_range)) {
>> dev_err(dev, "failed to get dynamic-range\n");
>> return ERR_PTR(-EINVAL);
>> }
>>
>> if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
>> - &dp_video_config->ycbcr_coeff)) {
>> + &dp_video_config->ycbcr_coeff)) {
>> dev_err(dev, "failed to get ycbcr-coeff\n");
>> return ERR_PTR(-EINVAL);
>> }
>>
>> if (of_property_read_u32(dp_node, "samsung,color-depth",
>> - &dp_video_config->color_depth)) {
>> + &dp_video_config->color_depth)) {
>> dev_err(dev, "failed to get color-depth\n");
>> return ERR_PTR(-EINVAL);
>> }
>>
>> if (of_property_read_u32(dp_node, "samsung,link-rate",
>> - &dp_video_config->link_rate)) {
>> + &dp_video_config->link_rate)) {
>> dev_err(dev, "failed to get link-rate\n");
>> return ERR_PTR(-EINVAL);
>> }
>>
>> if (of_property_read_u32(dp_node, "samsung,lane-count",
>> - &dp_video_config->lane_count)) {
>> + &dp_video_config->lane_count)) {
>> dev_err(dev, "failed to get lane-count\n");
>> return ERR_PTR(-EINVAL);
>> }
>> @@ -1197,7 +1190,7 @@ static int exynos_dp_dt_parse_panel(struct exynos_dp_device *dp)
>> int ret;
>>
>> ret = of_get_videomode(dp->dev->of_node, &dp->priv.vm,
>> - OF_USE_NATIVE_MODE);
>> + OF_USE_NATIVE_MODE);
>> if (ret) {
>> DRM_ERROR("failed: of_get_videomode() : %d\n", ret);
>> return ret;
>> @@ -1294,7 +1287,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
>> exynos_dp_init_dp(dp);
>>
>> ret = devm_request_irq(&pdev->dev, dp->irq, exynos_dp_irq_handler,
>> - irq_flags, "exynos-dp", dp);
>> + irq_flags, "exynos-dp", dp);
>> if (ret) {
>> dev_err(&pdev->dev, "failed to request irq\n");
>> return ret;
>> @@ -1328,7 +1321,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
>> }
>>
>> static void exynos_dp_unbind(struct device *dev, struct device *master,
>> - void *data)
>> + void *data)
>> {
>> struct exynos_dp_device *dp = dev_get_drvdata(dev);
>>
>> @@ -1347,7 +1340,7 @@ static int exynos_dp_probe(struct platform_device *pdev)
>> struct exynos_dp_device *dp;
>>
>> dp = devm_kzalloc(&pdev->dev, sizeof(struct exynos_dp_device),
>> - GFP_KERNEL);
>> + GFP_KERNEL);
>> if (!dp)
>> return -ENOMEM;
>>
>> @@ -1369,8 +1362,9 @@ static int exynos_dp_probe(struct platform_device *pdev)
>> of_node_put(bridge_node);
>> if (!dp->bridge)
>> return -EPROBE_DEFER;
>> - } else
>> + } else {
>> return -EPROBE_DEFER;
>> + }
>> }
>>
>> return component_add(&pdev->dev, &exynos_dp_ops);
>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.h b/drivers/gpu/drm/exynos/exynos_dp_core.h
>> index e413b6f..71f2b86 100644
>> --- a/drivers/gpu/drm/exynos/exynos_dp_core.h
>> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.h
>> @@ -179,8 +179,8 @@ void exynos_dp_config_interrupt(struct exynos_dp_device *dp);
>> enum pll_status exynos_dp_get_pll_lock_status(struct exynos_dp_device *dp);
>> void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable);
>> void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
>> - enum analog_power_block block,
>> - bool enable);
>> + enum analog_power_block block,
>> + bool enable);
>> void exynos_dp_init_analog_func(struct exynos_dp_device *dp);
>> void exynos_dp_init_hpd(struct exynos_dp_device *dp);
>> enum dp_irq_type exynos_dp_get_irq_type(struct exynos_dp_device *dp);
>> @@ -191,50 +191,50 @@ int exynos_dp_get_plug_in_status(struct exynos_dp_device *dp);
>> void exynos_dp_enable_sw_function(struct exynos_dp_device *dp);
>> int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp);
>> int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
>> - unsigned int reg_addr,
>> - unsigned char data);
>> + unsigned int reg_addr,
>> + unsigned char data);
>> int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
>> - unsigned int reg_addr,
>> - unsigned char *data);
>> + unsigned int reg_addr,
>> + unsigned char *data);
>> int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
>> - unsigned int reg_addr,
>> - unsigned int count,
>> - unsigned char data[]);
>> + unsigned int reg_addr,
>> + unsigned int count,
>> + unsigned char data[]);
>> int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
>> - unsigned int reg_addr,
>> - unsigned int count,
>> - unsigned char data[]);
>> + unsigned int reg_addr,
>> + unsigned int count,
>> + unsigned char data[]);
>> int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
>> unsigned int device_addr,
>> unsigned int reg_addr);
>> int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
>> - unsigned int device_addr,
>> - unsigned int reg_addr,
>> - unsigned int *data);
>> + unsigned int device_addr,
>> + unsigned int reg_addr,
>> + unsigned int *data);
>> int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
>> - unsigned int device_addr,
>> - unsigned int reg_addr,
>> - unsigned int count,
>> - unsigned char edid[]);
>> + unsigned int device_addr,
>> + unsigned int reg_addr,
>> + unsigned int count,
>> + unsigned char edid[]);
>> void exynos_dp_set_link_bandwidth(struct exynos_dp_device *dp, u32 bwtype);
>> void exynos_dp_get_link_bandwidth(struct exynos_dp_device *dp, u32 *bwtype);
>> void exynos_dp_set_lane_count(struct exynos_dp_device *dp, u32 count);
>> void exynos_dp_get_lane_count(struct exynos_dp_device *dp, u32 *count);
>> void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool enable);
>> void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
>> - enum pattern_set pattern);
>> + enum pattern_set pattern);
>> void exynos_dp_set_lane0_pre_emphasis(struct exynos_dp_device *dp, u32 level);
>> void exynos_dp_set_lane1_pre_emphasis(struct exynos_dp_device *dp, u32 level);
>> void exynos_dp_set_lane2_pre_emphasis(struct exynos_dp_device *dp, u32 level);
>> void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32 level);
>> void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
>> - u32 training_lane);
>> + u32 training_lane);
>> void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
>> - u32 training_lane);
>> + u32 training_lane);
>> void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
>> - u32 training_lane);
>> + u32 training_lane);
>> void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
>> - u32 training_lane);
>> + u32 training_lane);
>> u32 exynos_dp_get_lane0_link_training(struct exynos_dp_device *dp);
>> u32 exynos_dp_get_lane1_link_training(struct exynos_dp_device *dp);
>> u32 exynos_dp_get_lane2_link_training(struct exynos_dp_device *dp);
>> @@ -245,9 +245,9 @@ void exynos_dp_init_video(struct exynos_dp_device *dp);
>> void exynos_dp_set_video_color_format(struct exynos_dp_device *dp);
>> int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp);
>> void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
>> - enum clock_recovery_m_value_type type,
>> - u32 m_value,
>> - u32 n_value);
>> + enum clock_recovery_m_value_type type,
>> + u32 m_value,
>> + u32 n_value);
>> void exynos_dp_set_video_timing_mode(struct exynos_dp_device *dp, u32 type);
>> void exynos_dp_enable_video_master(struct exynos_dp_device *dp, bool enable);
>> void exynos_dp_start_video(struct exynos_dp_device *dp);
>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_reg.c b/drivers/gpu/drm/exynos/exynos_dp_reg.c
>> index c1f87a2..5aff19a 100644
>> --- a/drivers/gpu/drm/exynos/exynos_dp_reg.c
>> +++ b/drivers/gpu/drm/exynos/exynos_dp_reg.c
>> @@ -202,8 +202,8 @@ void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable)
>> }
>>
>> void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
>> - enum analog_power_block block,
>> - bool enable)
>> + enum analog_power_block block,
>> + bool enable)
>> {
>> u32 reg;
>>
>> @@ -399,8 +399,8 @@ void exynos_dp_init_aux(struct exynos_dp_device *dp)
>> exynos_dp_reset_aux(dp);
>>
>> /* Disable AUX transaction H/W retry */
>> - reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0)|
>> - AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
>> + reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0) |
>> + AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
>> writel(reg, dp->reg_base + EXYNOS_DP_AUX_HW_RETRY_CTL);
>>
>> /* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
>> @@ -483,8 +483,8 @@ int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp)
>> }
>>
>> int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
>> - unsigned int reg_addr,
>> - unsigned char data)
>> + unsigned int reg_addr,
>> + unsigned char data)
>> {
>> u32 reg;
>> int i;
>> @@ -519,17 +519,16 @@ int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
>> retval = exynos_dp_start_aux_transaction(dp);
>> if (retval == 0)
>> break;
>> - else
>> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
>> - __func__);
>> +
>> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
>> }
>>
>> return retval;
>> }
>>
>> int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
>> - unsigned int reg_addr,
>> - unsigned char *data)
>> + unsigned int reg_addr,
>> + unsigned char *data)
>> {
>> u32 reg;
>> int i;
>> @@ -560,9 +559,8 @@ int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
>> retval = exynos_dp_start_aux_transaction(dp);
>> if (retval == 0)
>> break;
>> - else
>> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
>> - __func__);
>> +
>> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
>> }
>>
>> /* Read data buffer */
>> @@ -573,9 +571,9 @@ int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
>> }
>>
>> int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
>> - unsigned int reg_addr,
>> - unsigned int count,
>> - unsigned char data[])
>> + unsigned int reg_addr,
>> + unsigned int count,
>> + unsigned char data[])
>> {
>> u32 reg;
>> unsigned int start_offset;
>> @@ -625,9 +623,9 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
>> retval = exynos_dp_start_aux_transaction(dp);
>> if (retval == 0)
>> break;
>> - else
>> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
>> - __func__);
>> +
>> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
>> + __func__);
>> }
>>
>> start_offset += cur_data_count;
>> @@ -637,9 +635,9 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
>> }
>>
>> int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
>> - unsigned int reg_addr,
>> - unsigned int count,
>> - unsigned char data[])
>> + unsigned int reg_addr,
>> + unsigned int count,
>> + unsigned char data[])
>> {
>> u32 reg;
>> unsigned int start_offset;
>> @@ -683,9 +681,9 @@ int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
>> retval = exynos_dp_start_aux_transaction(dp);
>> if (retval == 0)
>> break;
>> - else
>> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
>> - __func__);
>> +
>> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
>> + __func__);
>> }
>>
>> for (cur_data_idx = 0; cur_data_idx < cur_data_count;
>> @@ -736,9 +734,9 @@ int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
>> }
>>
>> int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
>> - unsigned int device_addr,
>> - unsigned int reg_addr,
>> - unsigned int *data)
>> + unsigned int device_addr,
>> + unsigned int reg_addr,
>> + unsigned int *data)
>> {
>> u32 reg;
>> int i;
>> @@ -767,9 +765,8 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
>> retval = exynos_dp_start_aux_transaction(dp);
>> if (retval == 0)
>> break;
>> - else
>> - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
>> - __func__);
>> +
>> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
>> }
>>
>> /* Read data */
>> @@ -780,10 +777,10 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
>> }
>>
>> int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
>> - unsigned int device_addr,
>> - unsigned int reg_addr,
>> - unsigned int count,
>> - unsigned char edid[])
>> + unsigned int device_addr,
>> + unsigned int reg_addr,
>> + unsigned int count,
>> + unsigned char edid[])
>> {
>> u32 reg;
>> unsigned int i, j;
>> @@ -807,8 +804,8 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
>> * request without sending address
>> */
>> if (!defer)
>> - retval = exynos_dp_select_i2c_device(dp,
>> - device_addr, reg_addr + i);
>> + retval = exynos_dp_select_i2c_device(
>> + dp, device_addr, reg_addr + i);
> ditto
Done
Thanks,
- Yakir
>
> Best regards,
> Krzysztof
>
>> else
>> defer = 0;
>>
>> @@ -819,24 +816,23 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
>> * If Bit 3 is 0, I2C transaction.
>> */
>> reg = AUX_LENGTH(16) |
>> - AUX_TX_COMM_I2C_TRANSACTION |
>> - AUX_TX_COMM_READ;
>> + AUX_TX_COMM_I2C_TRANSACTION |
>> + AUX_TX_COMM_READ;
>> writel(reg, dp->reg_base +
>> - EXYNOS_DP_AUX_CH_CTL_1);
>> + EXYNOS_DP_AUX_CH_CTL_1);
>>
>> /* Start AUX transaction */
>> retval = exynos_dp_start_aux_transaction(dp);
>> if (retval == 0)
>> break;
>> - else
>> - dev_dbg(dp->dev,
>> - "%s: Aux Transaction fail!\n",
>> - __func__);
>> +
>> + dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
>> + __func__);
>> }
>> /* Check if Rx sends defer */
>> reg = readl(dp->reg_base + EXYNOS_DP_AUX_RX_COMM);
>> if (reg == AUX_RX_COMM_AUX_DEFER ||
>> - reg == AUX_RX_COMM_I2C_DEFER) {
>> + reg == AUX_RX_COMM_I2C_DEFER) {
>> dev_err(dp->dev, "Defer: %d\n\n", reg);
>> defer = 1;
>> }
>> @@ -901,7 +897,7 @@ void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool enable)
>> }
>>
>> void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
>> - enum pattern_set pattern)
>> + enum pattern_set pattern)
>> {
>> u32 reg;
>>
>> @@ -974,7 +970,7 @@ void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32 level)
>> }
>>
>> void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
>> - u32 training_lane)
>> + u32 training_lane)
>> {
>> u32 reg;
>>
>> @@ -983,7 +979,7 @@ void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
>> }
>>
>> void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
>> - u32 training_lane)
>> + u32 training_lane)
>> {
>> u32 reg;
>>
>> @@ -992,7 +988,7 @@ void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
>> }
>>
>> void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
>> - u32 training_lane)
>> + u32 training_lane)
>> {
>> u32 reg;
>>
>> @@ -1001,7 +997,7 @@ void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
>> }
>>
>> void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
>> - u32 training_lane)
>> + u32 training_lane)
>> {
>> u32 reg;
>>
>> @@ -1125,9 +1121,9 @@ int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp)
>> }
>>
>> void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
>> - enum clock_recovery_m_value_type type,
>> - u32 m_value,
>> - u32 n_value)
>> + enum clock_recovery_m_value_type type,
>> + u32 m_value,
>> + u32 n_value)
>> {
>> u32 reg;
>>
>> @@ -1221,7 +1217,7 @@ void exynos_dp_config_video_slave_mode(struct exynos_dp_device *dp)
>> u32 reg;
>>
>> reg = readl(dp->reg_base + EXYNOS_DP_FUNC_EN_1);
>> - reg &= ~(MASTER_VID_FUNC_EN_N|SLAVE_VID_FUNC_EN_N);
>> + reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
>> reg |= MASTER_VID_FUNC_EN_N;
>> writel(reg, dp->reg_base + EXYNOS_DP_FUNC_EN_1);
>>
>>
>
>
>
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-01 08:00 +0200 |
| Subject | [PATCH v4 04/16] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count |
| Message-ID | <q3MLT-63J-5@gated-at.bofh.it> |
| In reply to | #1216602 |
link_rate and lane_count already configured in analogix_dp_set_link_train(),
so we don't need to config those repeatly after training finished, just
remove them out.
Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets
would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps, 2.7Gbps, 5.4Gbps}.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v4:
- Take Jingoo Han suggest, update commit message more readable.
- Adjust the order from 05 to 04
Changes in v3:
- Take Thierry Reding suggest, link_rate and lane_count shouldn't config to
the DT property value directly, but we can take those as hardware limite.
For example, RK3288 only support 4 physical lanes of 2.7/1.62 Gbps/lane,
so DT property would like "link-rate = 0x0a" "lane-count = 4".
Changes in v2: None
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 8 ++++----
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 5 +++--
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 7d62f22..7196097 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -631,6 +631,8 @@ static void analogix_dp_get_max_rx_bandwidth(struct analogix_dp_device *dp,
/*
* For DP rev.1.1, Maximum link rate of Main Link lanes
* 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps
+ * For DP rev.1.2, Maximum link rate of Main Link lanes
+ * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps, 0x14 = 5.4Gbps
*/
analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LINK_RATE, &data);
*bandwidth = data;
@@ -664,7 +666,8 @@ static void analogix_dp_init_training(struct analogix_dp_device *dp,
analogix_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
if ((dp->link_train.link_rate != LINK_RATE_1_62GBPS) &&
- (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
+ (dp->link_train.link_rate != LINK_RATE_2_70GBPS) &&
+ (dp->link_train.link_rate != LINK_RATE_5_40GBPS)) {
dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n",
dp->link_train.link_rate);
dp->link_train.link_rate = LINK_RATE_1_62GBPS;
@@ -905,9 +908,6 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
analogix_dp_enable_enhanced_mode(dp, 1);
- analogix_dp_set_lane_count(dp, dp->video_info->lane_count);
- analogix_dp_set_link_bandwidth(dp, dp->video_info->link_rate);
-
analogix_dp_init_video(dp);
ret = analogix_dp_config_video(dp);
if (ret)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index d7e47e0..ffabbd0 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -21,8 +21,9 @@
#define MAX_EQ_LOOP 5
enum link_rate_type {
- LINK_RATE_1_62GBPS = 0x06,
- LINK_RATE_2_70GBPS = 0x0a
+ LINK_RATE_1_62GBPS = DP_LINK_BW_1_62,
+ LINK_RATE_2_70GBPS = DP_LINK_BW_2_7,
+ LINK_RATE_5_40GBPS = DP_LINK_BW_5_4,
};
enum link_lane_count_type {
--
2.1.2
--
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-01 08:00 +0200 |
| Subject | [PATCH v4 05/16] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & colorimetry |
| Message-ID | <q3MLU-63J-11@gated-at.bofh.it> |
| In reply to | #1216602 |
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code, same to color space and color depth can be
parsed from EDID.
But presumably Exynos still relaies on the DT properties, so take
good use of mode_fixup() in to achieve the compatibility hacks.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v4:
- Take Krzysztof suggest, provide backword compatibility with samsung.
- Take Thierry suggest, add "color-depth" and "color-space" dynamic parsed.
Changes in v3:
- Take Thierry Reding suggest, dynamic parse video timing info from
struct drm_display_mode and struct drm_display_info.
Changes in v2: None
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 141 +++++++++++++--------
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +-
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 14 +-
drivers/gpu/drm/exynos/exynos_dp.c | 58 ++++++++-
4 files changed, 151 insertions(+), 64 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 7196097..f0db92e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -897,8 +897,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
return;
}
- ret = analogix_dp_set_link_train(dp, dp->video_info->lane_count,
- dp->video_info->link_rate);
+ ret = analogix_dp_set_link_train(dp, dp->video_info.lane_count,
+ dp->video_info.link_rate);
if (ret) {
dev_err(dp->dev, "unable to do link train\n");
return;
@@ -1081,6 +1081,82 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
dp->dpms_mode = DRM_MODE_DPMS_OFF;
}
+static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge,
+ struct drm_display_mode *orig_mode,
+ struct drm_display_mode *mode)
+{
+ struct analogix_dp_device *dp = bridge->driver_private;
+ struct drm_display_info *display_info = &dp->connector.display_info;
+ struct video_info *video_info = &dp->video_info;
+ struct device_node *dp_node = dp->dev->of_node;
+ int vic;
+
+ /* interlaces & hsync pol & vsync pol */
+ video_info->interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
+ video_info->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
+ video_info->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);
+
+ /* dynamic_range & colorimetry */
+ vic = drm_match_cea_mode(mode);
+ if ((vic == 6) || (vic == 7) || (vic == 21) || (vic == 22) ||
+ (vic == 2) || (vic == 3) || (vic == 17) || (vic == 18)) {
+ video_info->dynamic_range = CEA;
+ video_info->ycbcr_coeff = COLOR_YCBCR601;
+ } else if (vic) {
+ video_info->dynamic_range = CEA;
+ video_info->ycbcr_coeff = COLOR_YCBCR709;
+ } else {
+ video_info->dynamic_range = VESA;
+ video_info->ycbcr_coeff = COLOR_YCBCR709;
+ }
+
+ switch (display_info->bpc) {
+ case 12:
+ video_info->color_depth = COLOR_12;
+ break;
+ case 10:
+ video_info->color_depth = COLOR_10;
+ break;
+ case 8:
+ video_info->color_depth = COLOR_8;
+ break;
+ case 6:
+ video_info->color_depth = COLOR_6;
+ break;
+ default:
+ video_info->color_depth = COLOR_8;
+ break;
+ }
+
+ if (display_info->color_formats | DRM_COLOR_FORMAT_YCRCB444)
+ video_info->color_space = COLOR_YCBCR444;
+ else if (display_info->color_formats | DRM_COLOR_FORMAT_YCRCB422)
+ video_info->color_space = COLOR_YCBCR422;
+ else if (display_info->color_formats | DRM_COLOR_FORMAT_RGB444)
+ video_info->color_space = COLOR_RGB;
+ else
+ video_info->color_space = COLOR_RGB;
+
+ /*
+ * NOTE: those property parseing code is used for
+ * providing backward compatibility for samsung platform.
+ */
+ of_property_read_u32(dp_node, "samsung,color-space",
+ &video_info->color_space);
+ of_property_read_u32(dp_node, "samsung,dynamic-range",
+ &video_info->dynamic_range);
+ of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
+ &video_info->ycbcr_coeff);
+ of_property_read_u32(dp_node, "samsung,color-depth",
+ &video_info->color_depth);
+ of_property_read_u32(dp_node, "hsync-active-high",
+ (unsigned int *)&video_info->h_sync_polarity);
+ of_property_read_u32(dp_node, "vsync-active-high",
+ (unsigned int *)&video_info->v_sync_polarity);
+ of_property_read_u32(dp_node, "interlaced",
+ (unsigned int *)&video_info->interlaced);
+}
+
static void analogix_dp_bridge_nop(struct drm_bridge *bridge)
{
/* do nothing */
@@ -1091,6 +1167,7 @@ static const struct drm_bridge_funcs analogix_dp_bridge_funcs = {
.disable = analogix_dp_bridge_disable,
.pre_enable = analogix_dp_bridge_nop,
.post_disable = analogix_dp_bridge_nop,
+ .mode_set = analogix_dp_bridge_mode_set,
.attach = analogix_dp_bridge_attach,
};
@@ -1121,62 +1198,24 @@ static int analogix_dp_create_bridge(struct drm_device *drm_dev,
return 0;
}
-static struct video_info *analogix_dp_dt_parse_pdata(struct device *dev)
+static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
{
- struct device_node *dp_node = dev->of_node;
- struct video_info *dp_video_config;
-
- dp_video_config = devm_kzalloc(dev, sizeof(*dp_video_config),
- GFP_KERNEL);
- if (!dp_video_config)
- return ERR_PTR(-ENOMEM);
-
- dp_video_config->h_sync_polarity =
- of_property_read_bool(dp_node, "hsync-active-high");
-
- dp_video_config->v_sync_polarity =
- of_property_read_bool(dp_node, "vsync-active-high");
-
- dp_video_config->interlaced =
- of_property_read_bool(dp_node, "interlaced");
-
- if (of_property_read_u32(dp_node, "samsung,color-space",
- &dp_video_config->color_space)) {
- dev_err(dev, "failed to get color-space\n");
- return ERR_PTR(-EINVAL);
- }
-
- if (of_property_read_u32(dp_node, "samsung,dynamic-range",
- &dp_video_config->dynamic_range)) {
- dev_err(dev, "failed to get dynamic-range\n");
- return ERR_PTR(-EINVAL);
- }
-
- if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
- &dp_video_config->ycbcr_coeff)) {
- dev_err(dev, "failed to get ycbcr-coeff\n");
- return ERR_PTR(-EINVAL);
- }
-
- if (of_property_read_u32(dp_node, "samsung,color-depth",
- &dp_video_config->color_depth)) {
- dev_err(dev, "failed to get color-depth\n");
- return ERR_PTR(-EINVAL);
- }
+ struct device_node *dp_node = dp->dev->of_node;
+ struct video_info *video_config = &dp->video_info;
if (of_property_read_u32(dp_node, "samsung,link-rate",
- &dp_video_config->link_rate)) {
+ &video_info->link_rate)) {
dev_err(dev, "failed to get link-rate\n");
- return ERR_PTR(-EINVAL);
+ return -EINVAL;
}
if (of_property_read_u32(dp_node, "samsung,lane-count",
- &dp_video_config->lane_count)) {
+ &video_info->lane_count)) {
dev_err(dev, "failed to get lane-count\n");
- return ERR_PTR(-EINVAL);
+ return -EINVAL;
}
- return dp_video_config;
+ return 0;
}
int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
@@ -1205,9 +1244,9 @@ int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
*/
dp->plat_data = plat_data;
- dp->video_info = analogix_dp_dt_parse_pdata(&pdev->dev);
- if (IS_ERR(dp->video_info))
- return PTR_ERR(dp->video_info);
+ ret = analogix_dp_dt_parse_pdata(dp);
+ if (ret)
+ return ret;
dp->phy = devm_phy_get(dp->dev, "dp");
if (IS_ERR(dp->phy)) {
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index ffabbd0..6e3d5bc 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -154,7 +154,7 @@ struct analogix_dp_device {
unsigned int irq;
void __iomem *reg_base;
- struct video_info *video_info;
+ struct video_info video_info;
struct link_train link_train;
struct work_struct hotplug_work;
struct phy *phy;
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index b879d8c..6a643be 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -1084,15 +1084,15 @@ void analogix_dp_set_video_color_format(struct analogix_dp_device *dp)
u32 reg;
/* Configure the input color depth, color space, dynamic range */
- reg = (dp->video_info->dynamic_range << IN_D_RANGE_SHIFT) |
- (dp->video_info->color_depth << IN_BPC_SHIFT) |
- (dp->video_info->color_space << IN_COLOR_F_SHIFT);
+ reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) |
+ (dp->video_info.color_depth << IN_BPC_SHIFT) |
+ (dp->video_info.color_space << IN_COLOR_F_SHIFT);
writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2);
/* Set Input Color YCbCr Coefficients to ITU601 or ITU709 */
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
reg &= ~IN_YC_COEFFI_MASK;
- if (dp->video_info->ycbcr_coeff)
+ if (dp->video_info.ycbcr_coeff)
reg |= IN_YC_COEFFI_ITU709;
else
reg |= IN_YC_COEFFI_ITU601;
@@ -1229,17 +1229,17 @@ void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp)
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
reg &= ~INTERACE_SCAN_CFG;
- reg |= (dp->video_info->interlaced << 2);
+ reg |= (dp->video_info.interlaced << 2);
writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
reg &= ~VSYNC_POLARITY_CFG;
- reg |= (dp->video_info->v_sync_polarity << 1);
+ reg |= (dp->video_info.v_sync_polarity << 1);
writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
reg &= ~HSYNC_POLARITY_CFG;
- reg |= (dp->video_info->h_sync_polarity << 0);
+ reg |= (dp->video_info.h_sync_polarity << 0);
writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE;
diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
index 7e1be72..6060d2c 100644
--- a/drivers/gpu/drm/exynos/exynos_dp.c
+++ b/drivers/gpu/drm/exynos/exynos_dp.c
@@ -28,8 +28,13 @@
#include "exynos_drm_crtc.h"
-#define plat_data_to_dp(pd) \
- container_of(pd, struct exynos_dp_device, plat_data)
+#define to_dp(nm) container_of(nm, struct exynos_dp_device, nm)
+
+struct video_info {
+ bool h_sync_polarity;
+ bool v_sync_polarity;
+ bool interlaced;
+};
struct exynos_dp_device {
struct drm_encoder encoder;
@@ -39,12 +44,13 @@ struct exynos_dp_device {
struct exynos_drm_panel_info priv;
struct analogix_dp_plat_data plat_data;
+ struct video_info video_info;
};
int exynos_dp_crtc_clock_enable(struct analogix_dp_plat_data *plat_data,
bool enable)
{
- struct exynos_dp_device *dp = plat_data_to_dp(plat_data);
+ struct exynos_dp_device *dp = to_dp(plat_data);
struct drm_encoder *encoder = &dp->encoder;
struct exynos_drm_crtc *crtc;
@@ -71,7 +77,7 @@ static int exynos_dp_poweroff(struct analogix_dp_plat_data *plat_data)
static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data,
struct drm_connector *connector)
{
- struct exynos_dp_device *dp = plat_data_to_dp(plat_data);
+ struct exynos_dp_device *dp = to_dp(plat_data);
struct drm_display_mode *mode;
if (dp->plat_data.panel)
@@ -99,7 +105,7 @@ static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data,
static int exynos_dp_bridge_attach(struct analogix_dp_plat_data *plat_data,
struct drm_bridge *bridge)
{
- struct exynos_dp_device *dp = plat_data_to_dp(plat_data);
+ struct exynos_dp_device *dp = to_dp(plat_data);
struct drm_encoder *encoder = &dp->encoder;
int ret;
@@ -122,6 +128,28 @@ static bool exynos_dp_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
+ struct exynos_dp_device *dp = to_dp(encoder);
+ int flags = adjusted_mode->flags;
+
+ flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC |
+ DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC |
+ DRM_MODE_FLAG_INTERLACE);
+
+ if (dp->video_info.h_sync_polarity)
+ flags |= DRM_MODE_FLAG_PHSYNC;
+ else
+ flags |= DRM_MODE_FLAG_NHSYNC;
+
+ if (dp->video_info.v_sync_polarity)
+ flags |= DRM_MODE_FLAG_PVSYNC;
+ else
+ flags |= DRM_MODE_FLAG_NVSYNC;
+
+ if (dp->video_info.interlaced)
+ flags |= DRM_MODE_FLAG_INTERLACE;
+
+ adjusted_mode->flags = flags;
+
return true;
}
@@ -163,6 +191,22 @@ static int exynos_dp_dt_parse_panel(struct exynos_dp_device *dp)
return 0;
}
+static int exynos_dp_dt_parse_video_info(struct exynos_dp_device *dp)
+{
+ struct device_node *dp_node = dp->dev->of_node;
+
+ dp->video_info.h_sync_polarity =
+ of_property_read_bool(dp_node, "hsync-active-high");
+
+ dp->video_info.v_sync_polarity =
+ of_property_read_bool(dp_node, "vsync-active-high");
+
+ dp->video_info.interlaced =
+ of_property_read_bool(dp_node, "interlaced");
+
+ return 0;
+}
+
static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
{
struct exynos_dp_device *dp = dev_get_drvdata(dev);
@@ -191,6 +235,10 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
return ret;
}
+ ret = exynos_dp_dt_parse_video_info(dp);
+ if (ret)
+ return ret;
+
pipe = exynos_drm_crtc_get_pipe_from_type(drm_dev,
EXYNOS_DISPLAY_TYPE_LCD);
if (pipe < 0)
--
2.1.2
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| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Date | 2015-09-03 10:10 +0200 |
| Subject | Re: [PATCH v4 05/16] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & colorimetry |
| Message-ID | <q4xKO-69T-9@gated-at.bofh.it> |
| In reply to | #1216608 |
On 01.09.2015 14:55, Yakir Yang wrote:
> Both hsync/vsync polarity and interlace mode can be parsed from
> drm display mode, and dynamic_range and ycbcr_coeff can be judge
> by the video code, same to color space and color depth can be
> parsed from EDID.
>
> But presumably Exynos still relaies on the DT properties, so take
s/relaies/relies/
> good use of mode_fixup() in to achieve the compatibility hacks.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> ---
> Changes in v4:
> - Take Krzysztof suggest, provide backword compatibility with samsung.
> - Take Thierry suggest, add "color-depth" and "color-space" dynamic parsed.
>
> Changes in v3:
> - Take Thierry Reding suggest, dynamic parse video timing info from
> struct drm_display_mode and struct drm_display_info.
>
> Changes in v2: None
>
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 141 +++++++++++++--------
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 14 +-
> drivers/gpu/drm/exynos/exynos_dp.c | 58 ++++++++-
> 4 files changed, 151 insertions(+), 64 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 7196097..f0db92e 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -897,8 +897,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
> return;
> }
>
> - ret = analogix_dp_set_link_train(dp, dp->video_info->lane_count,
> - dp->video_info->link_rate);
> + ret = analogix_dp_set_link_train(dp, dp->video_info.lane_count,
> + dp->video_info.link_rate);
> if (ret) {
> dev_err(dp->dev, "unable to do link train\n");
> return;
> @@ -1081,6 +1081,82 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
> dp->dpms_mode = DRM_MODE_DPMS_OFF;
> }
>
> +static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge,
> + struct drm_display_mode *orig_mode,
> + struct drm_display_mode *mode)
> +{
> + struct analogix_dp_device *dp = bridge->driver_private;
> + struct drm_display_info *display_info = &dp->connector.display_info;
> + struct video_info *video_info = &dp->video_info;
> + struct device_node *dp_node = dp->dev->of_node;
> + int vic;
> +
> + /* interlaces & hsync pol & vsync pol */
> + video_info->interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
> + video_info->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
> + video_info->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);
> +
> + /* dynamic_range & colorimetry */
> + vic = drm_match_cea_mode(mode);
> + if ((vic == 6) || (vic == 7) || (vic == 21) || (vic == 22) ||
> + (vic == 2) || (vic == 3) || (vic == 17) || (vic == 18)) {
> + video_info->dynamic_range = CEA;
> + video_info->ycbcr_coeff = COLOR_YCBCR601;
> + } else if (vic) {
> + video_info->dynamic_range = CEA;
> + video_info->ycbcr_coeff = COLOR_YCBCR709;
> + } else {
> + video_info->dynamic_range = VESA;
> + video_info->ycbcr_coeff = COLOR_YCBCR709;
> + }
> +
> + switch (display_info->bpc) {
> + case 12:
> + video_info->color_depth = COLOR_12;
> + break;
> + case 10:
> + video_info->color_depth = COLOR_10;
> + break;
> + case 8:
> + video_info->color_depth = COLOR_8;
> + break;
> + case 6:
> + video_info->color_depth = COLOR_6;
> + break;
> + default:
> + video_info->color_depth = COLOR_8;
> + break;
> + }
> +
> + if (display_info->color_formats | DRM_COLOR_FORMAT_YCRCB444)
> + video_info->color_space = COLOR_YCBCR444;
> + else if (display_info->color_formats | DRM_COLOR_FORMAT_YCRCB422)
> + video_info->color_space = COLOR_YCBCR422;
> + else if (display_info->color_formats | DRM_COLOR_FORMAT_RGB444)
> + video_info->color_space = COLOR_RGB;
> + else
> + video_info->color_space = COLOR_RGB;
> +
> + /*
> + * NOTE: those property parseing code is used for
s/parseing/parsing/
BTW, you can easily integrate spell-check to vim... It is not that I
search for such misspellings - they are highlighted...
> + * providing backward compatibility for samsung platform.
> + */
> + of_property_read_u32(dp_node, "samsung,color-space",
> + &video_info->color_space);
> + of_property_read_u32(dp_node, "samsung,dynamic-range",
> + &video_info->dynamic_range);
> + of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
> + &video_info->ycbcr_coeff);
> + of_property_read_u32(dp_node, "samsung,color-depth",
> + &video_info->color_depth);
> + of_property_read_u32(dp_node, "hsync-active-high",
> + (unsigned int *)&video_info->h_sync_polarity);
> + of_property_read_u32(dp_node, "vsync-active-high",
> + (unsigned int *)&video_info->v_sync_polarity);
> + of_property_read_u32(dp_node, "interlaced",
> + (unsigned int *)&video_info->interlaced);
You made assumption that the sizeof(bool) is always equal to
sizeof(u32)... Then you cast it to pointer to unsigned int but function
wants pointer to u32. Just for reading boolean property. There's easier
way - of_property_read_bool. It returns bool.
> +}
> +
> static void analogix_dp_bridge_nop(struct drm_bridge *bridge)
> {
> /* do nothing */
> @@ -1091,6 +1167,7 @@ static const struct drm_bridge_funcs analogix_dp_bridge_funcs = {
> .disable = analogix_dp_bridge_disable,
> .pre_enable = analogix_dp_bridge_nop,
> .post_disable = analogix_dp_bridge_nop,
> + .mode_set = analogix_dp_bridge_mode_set,
> .attach = analogix_dp_bridge_attach,
> };
>
> @@ -1121,62 +1198,24 @@ static int analogix_dp_create_bridge(struct drm_device *drm_dev,
> return 0;
> }
>
> -static struct video_info *analogix_dp_dt_parse_pdata(struct device *dev)
> +static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
> {
> - struct device_node *dp_node = dev->of_node;
> - struct video_info *dp_video_config;
> -
> - dp_video_config = devm_kzalloc(dev, sizeof(*dp_video_config),
> - GFP_KERNEL);
> - if (!dp_video_config)
> - return ERR_PTR(-ENOMEM);
> -
> - dp_video_config->h_sync_polarity =
> - of_property_read_bool(dp_node, "hsync-active-high");
> -
> - dp_video_config->v_sync_polarity =
> - of_property_read_bool(dp_node, "vsync-active-high");
> -
> - dp_video_config->interlaced =
> - of_property_read_bool(dp_node, "interlaced");
> -
> - if (of_property_read_u32(dp_node, "samsung,color-space",
> - &dp_video_config->color_space)) {
> - dev_err(dev, "failed to get color-space\n");
> - return ERR_PTR(-EINVAL);
> - }
> -
> - if (of_property_read_u32(dp_node, "samsung,dynamic-range",
> - &dp_video_config->dynamic_range)) {
> - dev_err(dev, "failed to get dynamic-range\n");
> - return ERR_PTR(-EINVAL);
> - }
> -
> - if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
> - &dp_video_config->ycbcr_coeff)) {
> - dev_err(dev, "failed to get ycbcr-coeff\n");
> - return ERR_PTR(-EINVAL);
> - }
> -
> - if (of_property_read_u32(dp_node, "samsung,color-depth",
> - &dp_video_config->color_depth)) {
> - dev_err(dev, "failed to get color-depth\n");
> - return ERR_PTR(-EINVAL);
> - }
> + struct device_node *dp_node = dp->dev->of_node;
> + struct video_info *video_config = &dp->video_info;
>
> if (of_property_read_u32(dp_node, "samsung,link-rate",
> - &dp_video_config->link_rate)) {
> + &video_info->link_rate)) {
> dev_err(dev, "failed to get link-rate\n");
> - return ERR_PTR(-EINVAL);
> + return -EINVAL;
> }
>
> if (of_property_read_u32(dp_node, "samsung,lane-count",
> - &dp_video_config->lane_count)) {
> + &video_info->lane_count)) {
> dev_err(dev, "failed to get lane-count\n");
> - return ERR_PTR(-EINVAL);
> + return -EINVAL;
> }
>
> - return dp_video_config;
> + return 0;
> }
>
> int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
> @@ -1205,9 +1244,9 @@ int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
> */
> dp->plat_data = plat_data;
>
> - dp->video_info = analogix_dp_dt_parse_pdata(&pdev->dev);
> - if (IS_ERR(dp->video_info))
> - return PTR_ERR(dp->video_info);
> + ret = analogix_dp_dt_parse_pdata(dp);
> + if (ret)
> + return ret;
>
> dp->phy = devm_phy_get(dp->dev, "dp");
> if (IS_ERR(dp->phy)) {
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> index ffabbd0..6e3d5bc 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> @@ -154,7 +154,7 @@ struct analogix_dp_device {
> unsigned int irq;
> void __iomem *reg_base;
>
> - struct video_info *video_info;
> + struct video_info video_info;
> struct link_train link_train;
> struct work_struct hotplug_work;
> struct phy *phy;
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index b879d8c..6a643be 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -1084,15 +1084,15 @@ void analogix_dp_set_video_color_format(struct analogix_dp_device *dp)
> u32 reg;
>
> /* Configure the input color depth, color space, dynamic range */
> - reg = (dp->video_info->dynamic_range << IN_D_RANGE_SHIFT) |
> - (dp->video_info->color_depth << IN_BPC_SHIFT) |
> - (dp->video_info->color_space << IN_COLOR_F_SHIFT);
> + reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) |
> + (dp->video_info.color_depth << IN_BPC_SHIFT) |
> + (dp->video_info.color_space << IN_COLOR_F_SHIFT);
> writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2);
>
> /* Set Input Color YCbCr Coefficients to ITU601 or ITU709 */
> reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
> reg &= ~IN_YC_COEFFI_MASK;
> - if (dp->video_info->ycbcr_coeff)
> + if (dp->video_info.ycbcr_coeff)
> reg |= IN_YC_COEFFI_ITU709;
> else
> reg |= IN_YC_COEFFI_ITU601;
> @@ -1229,17 +1229,17 @@ void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp)
>
> reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
> reg &= ~INTERACE_SCAN_CFG;
> - reg |= (dp->video_info->interlaced << 2);
> + reg |= (dp->video_info.interlaced << 2);
> writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
>
> reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
> reg &= ~VSYNC_POLARITY_CFG;
> - reg |= (dp->video_info->v_sync_polarity << 1);
> + reg |= (dp->video_info.v_sync_polarity << 1);
> writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
>
> reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
> reg &= ~HSYNC_POLARITY_CFG;
> - reg |= (dp->video_info->h_sync_polarity << 0);
> + reg |= (dp->video_info.h_sync_polarity << 0);
> writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
>
> reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE;
> diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
> index 7e1be72..6060d2c 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp.c
> +++ b/drivers/gpu/drm/exynos/exynos_dp.c
> @@ -28,8 +28,13 @@
>
> #include "exynos_drm_crtc.h"
>
> -#define plat_data_to_dp(pd) \
> - container_of(pd, struct exynos_dp_device, plat_data)
> +#define to_dp(nm) container_of(nm, struct exynos_dp_device, nm)
> +
> +struct video_info {
> + bool h_sync_polarity;
> + bool v_sync_polarity;
> + bool interlaced;
> +};
>
> struct exynos_dp_device {
> struct drm_encoder encoder;
> @@ -39,12 +44,13 @@ struct exynos_dp_device {
>
> struct exynos_drm_panel_info priv;
> struct analogix_dp_plat_data plat_data;
> + struct video_info video_info;
> };
>
> int exynos_dp_crtc_clock_enable(struct analogix_dp_plat_data *plat_data,
> bool enable)
> {
> - struct exynos_dp_device *dp = plat_data_to_dp(plat_data);
> + struct exynos_dp_device *dp = to_dp(plat_data);
> struct drm_encoder *encoder = &dp->encoder;
> struct exynos_drm_crtc *crtc;
>
> @@ -71,7 +77,7 @@ static int exynos_dp_poweroff(struct analogix_dp_plat_data *plat_data)
> static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data,
> struct drm_connector *connector)
> {
> - struct exynos_dp_device *dp = plat_data_to_dp(plat_data);
> + struct exynos_dp_device *dp = to_dp(plat_data);
> struct drm_display_mode *mode;
>
> if (dp->plat_data.panel)
> @@ -99,7 +105,7 @@ static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data,
> static int exynos_dp_bridge_attach(struct analogix_dp_plat_data *plat_data,
> struct drm_bridge *bridge)
> {
> - struct exynos_dp_device *dp = plat_data_to_dp(plat_data);
> + struct exynos_dp_device *dp = to_dp(plat_data);
> struct drm_encoder *encoder = &dp->encoder;
> int ret;
>
> @@ -122,6 +128,28 @@ static bool exynos_dp_mode_fixup(struct drm_encoder *encoder,
> const struct drm_display_mode *mode,
> struct drm_display_mode *adjusted_mode)
> {
> + struct exynos_dp_device *dp = to_dp(encoder);
> + int flags = adjusted_mode->flags;
> +
> + flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC |
> + DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC |
> + DRM_MODE_FLAG_INTERLACE);
> +
> + if (dp->video_info.h_sync_polarity)
> + flags |= DRM_MODE_FLAG_PHSYNC;
> + else
> + flags |= DRM_MODE_FLAG_NHSYNC;
> +
> + if (dp->video_info.v_sync_polarity)
> + flags |= DRM_MODE_FLAG_PVSYNC;
> + else
> + flags |= DRM_MODE_FLAG_NVSYNC;
> +
> + if (dp->video_info.interlaced)
> + flags |= DRM_MODE_FLAG_INTERLACE;
> +
> + adjusted_mode->flags = flags;
> +
> return true;
> }
>
> @@ -163,6 +191,22 @@ static int exynos_dp_dt_parse_panel(struct exynos_dp_device *dp)
> return 0;
> }
>
> +static int exynos_dp_dt_parse_video_info(struct exynos_dp_device *dp)
> +{
> + struct device_node *dp_node = dp->dev->of_node;
> +
> + dp->video_info.h_sync_polarity =
> + of_property_read_bool(dp_node, "hsync-active-high");
> +
> + dp->video_info.v_sync_polarity =
> + of_property_read_bool(dp_node, "vsync-active-high");
> +
> + dp->video_info.interlaced =
> + of_property_read_bool(dp_node, "interlaced");
> +
> + return 0;
Probably you wanted to follow the convention of other DT-parse functions
but there is no need. This function cannot fail so maybe make it void?
It would simplify a bit the code in exynos_dp_bind().
Best regards,
Krzysztof
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-06 04:10 +0200 |
| Subject | Re: [PATCH v4 05/16] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & colorimetry |
| Message-ID | <q5xz3-1KD-1@gated-at.bofh.it> |
| In reply to | #1218092 |
Hi Krzysztof,
在 09/03/2015 04:04 PM, Krzysztof Kozlowski 写道:
> On 01.09.2015 14:55, Yakir Yang wrote:
>> Both hsync/vsync polarity and interlace mode can be parsed from
>> drm display mode, and dynamic_range and ycbcr_coeff can be judge
>> by the video code, same to color space and color depth can be
>> parsed from EDID.
>>
>> But presumably Exynos still relaies on the DT properties, so take
> s/relaies/relies/
>
>> good use of mode_fixup() in to achieve the compatibility hacks.
>>
>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>> ---
>> Changes in v4:
>> - Take Krzysztof suggest, provide backword compatibility with samsung.
>> - Take Thierry suggest, add "color-depth" and "color-space" dynamic parsed.
>>
>> Changes in v3:
>> - Take Thierry Reding suggest, dynamic parse video timing info from
>> struct drm_display_mode and struct drm_display_info.
>>
>> Changes in v2: None
>>
>> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 141 +++++++++++++--------
>> drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +-
>> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 14 +-
>> drivers/gpu/drm/exynos/exynos_dp.c | 58 ++++++++-
>> 4 files changed, 151 insertions(+), 64 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> index 7196097..f0db92e 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> @@ -897,8 +897,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>> return;
>> }
>>
>> - ret = analogix_dp_set_link_train(dp, dp->video_info->lane_count,
>> - dp->video_info->link_rate);
>> + ret = analogix_dp_set_link_train(dp, dp->video_info.lane_count,
>> + dp->video_info.link_rate);
>> if (ret) {
>> dev_err(dp->dev, "unable to do link train\n");
>> return;
>> @@ -1081,6 +1081,82 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>> dp->dpms_mode = DRM_MODE_DPMS_OFF;
>> }
>>
>> +static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge,
>> + struct drm_display_mode *orig_mode,
>> + struct drm_display_mode *mode)
>> +{
>> + struct analogix_dp_device *dp = bridge->driver_private;
>> + struct drm_display_info *display_info = &dp->connector.display_info;
>> + struct video_info *video_info = &dp->video_info;
>> + struct device_node *dp_node = dp->dev->of_node;
>> + int vic;
>> +
>> + /* interlaces & hsync pol & vsync pol */
>> + video_info->interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
>> + video_info->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
>> + video_info->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);
>> +
>> + /* dynamic_range & colorimetry */
>> + vic = drm_match_cea_mode(mode);
>> + if ((vic == 6) || (vic == 7) || (vic == 21) || (vic == 22) ||
>> + (vic == 2) || (vic == 3) || (vic == 17) || (vic == 18)) {
>> + video_info->dynamic_range = CEA;
>> + video_info->ycbcr_coeff = COLOR_YCBCR601;
>> + } else if (vic) {
>> + video_info->dynamic_range = CEA;
>> + video_info->ycbcr_coeff = COLOR_YCBCR709;
>> + } else {
>> + video_info->dynamic_range = VESA;
>> + video_info->ycbcr_coeff = COLOR_YCBCR709;
>> + }
>> +
>> + switch (display_info->bpc) {
>> + case 12:
>> + video_info->color_depth = COLOR_12;
>> + break;
>> + case 10:
>> + video_info->color_depth = COLOR_10;
>> + break;
>> + case 8:
>> + video_info->color_depth = COLOR_8;
>> + break;
>> + case 6:
>> + video_info->color_depth = COLOR_6;
>> + break;
>> + default:
>> + video_info->color_depth = COLOR_8;
>> + break;
>> + }
>> +
>> + if (display_info->color_formats | DRM_COLOR_FORMAT_YCRCB444)
>> + video_info->color_space = COLOR_YCBCR444;
>> + else if (display_info->color_formats | DRM_COLOR_FORMAT_YCRCB422)
>> + video_info->color_space = COLOR_YCBCR422;
>> + else if (display_info->color_formats | DRM_COLOR_FORMAT_RGB444)
>> + video_info->color_space = COLOR_RGB;
>> + else
>> + video_info->color_space = COLOR_RGB;
>> +
>> + /*
>> + * NOTE: those property parseing code is used for
> s/parseing/parsing/
>
> BTW, you can easily integrate spell-check to vim... It is not that I
> search for such misspellings - they are highlighted...
Wow, thanks for your remind, I have set the spell-check now. :)
>
>> + * providing backward compatibility for samsung platform.
>> + */
>> + of_property_read_u32(dp_node, "samsung,color-space",
>> + &video_info->color_space);
>> + of_property_read_u32(dp_node, "samsung,dynamic-range",
>> + &video_info->dynamic_range);
>> + of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
>> + &video_info->ycbcr_coeff);
>> + of_property_read_u32(dp_node, "samsung,color-depth",
>> + &video_info->color_depth);
>> + of_property_read_u32(dp_node, "hsync-active-high",
>> + (unsigned int *)&video_info->h_sync_polarity);
>> + of_property_read_u32(dp_node, "vsync-active-high",
>> + (unsigned int *)&video_info->v_sync_polarity);
>> + of_property_read_u32(dp_node, "interlaced",
>> + (unsigned int *)&video_info->interlaced);
> You made assumption that the sizeof(bool) is always equal to
> sizeof(u32)... Then you cast it to pointer to unsigned int but function
> wants pointer to u32. Just for reading boolean property. There's easier
> way - of_property_read_bool. It returns bool.
Thanks, done.
>
>> +}
>> +
>> static void analogix_dp_bridge_nop(struct drm_bridge *bridge)
>> {
>> /* do nothing */
>> @@ -1091,6 +1167,7 @@ static const struct drm_bridge_funcs analogix_dp_bridge_funcs = {
>> .disable = analogix_dp_bridge_disable,
>> .pre_enable = analogix_dp_bridge_nop,
>> .post_disable = analogix_dp_bridge_nop,
>> + .mode_set = analogix_dp_bridge_mode_set,
>> .attach = analogix_dp_bridge_attach,
>> };
>>
>> @@ -1121,62 +1198,24 @@ static int analogix_dp_create_bridge(struct drm_device *drm_dev,
>> return 0;
>> }
>>
>> -static struct video_info *analogix_dp_dt_parse_pdata(struct device *dev)
>> +static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
>> {
>> - struct device_node *dp_node = dev->of_node;
>> - struct video_info *dp_video_config;
>> -
>> - dp_video_config = devm_kzalloc(dev, sizeof(*dp_video_config),
>> - GFP_KERNEL);
>> - if (!dp_video_config)
>> - return ERR_PTR(-ENOMEM);
>> -
>> - dp_video_config->h_sync_polarity =
>> - of_property_read_bool(dp_node, "hsync-active-high");
>> -
>> - dp_video_config->v_sync_polarity =
>> - of_property_read_bool(dp_node, "vsync-active-high");
>> -
>> - dp_video_config->interlaced =
>> - of_property_read_bool(dp_node, "interlaced");
>> -
>> - if (of_property_read_u32(dp_node, "samsung,color-space",
>> - &dp_video_config->color_space)) {
>> - dev_err(dev, "failed to get color-space\n");
>> - return ERR_PTR(-EINVAL);
>> - }
>> -
>> - if (of_property_read_u32(dp_node, "samsung,dynamic-range",
>> - &dp_video_config->dynamic_range)) {
>> - dev_err(dev, "failed to get dynamic-range\n");
>> - return ERR_PTR(-EINVAL);
>> - }
>> -
>> - if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
>> - &dp_video_config->ycbcr_coeff)) {
>> - dev_err(dev, "failed to get ycbcr-coeff\n");
>> - return ERR_PTR(-EINVAL);
>> - }
>> -
>> - if (of_property_read_u32(dp_node, "samsung,color-depth",
>> - &dp_video_config->color_depth)) {
>> - dev_err(dev, "failed to get color-depth\n");
>> - return ERR_PTR(-EINVAL);
>> - }
>> + struct device_node *dp_node = dp->dev->of_node;
>> + struct video_info *video_config = &dp->video_info;
>>
>> if (of_property_read_u32(dp_node, "samsung,link-rate",
>> - &dp_video_config->link_rate)) {
>> + &video_info->link_rate)) {
>> dev_err(dev, "failed to get link-rate\n");
>> - return ERR_PTR(-EINVAL);
>> + return -EINVAL;
>> }
>>
>> if (of_property_read_u32(dp_node, "samsung,lane-count",
>> - &dp_video_config->lane_count)) {
>> + &video_info->lane_count)) {
>> dev_err(dev, "failed to get lane-count\n");
>> - return ERR_PTR(-EINVAL);
>> + return -EINVAL;
>> }
>>
>> - return dp_video_config;
>> + return 0;
>> }
>>
>> int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
>> @@ -1205,9 +1244,9 @@ int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
>> */
>> dp->plat_data = plat_data;
>>
>> - dp->video_info = analogix_dp_dt_parse_pdata(&pdev->dev);
>> - if (IS_ERR(dp->video_info))
>> - return PTR_ERR(dp->video_info);
>> + ret = analogix_dp_dt_parse_pdata(dp);
>> + if (ret)
>> + return ret;
>>
>> dp->phy = devm_phy_get(dp->dev, "dp");
>> if (IS_ERR(dp->phy)) {
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>> index ffabbd0..6e3d5bc 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>> @@ -154,7 +154,7 @@ struct analogix_dp_device {
>> unsigned int irq;
>> void __iomem *reg_base;
>>
>> - struct video_info *video_info;
>> + struct video_info video_info;
>> struct link_train link_train;
>> struct work_struct hotplug_work;
>> struct phy *phy;
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> index b879d8c..6a643be 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> @@ -1084,15 +1084,15 @@ void analogix_dp_set_video_color_format(struct analogix_dp_device *dp)
>> u32 reg;
>>
>> /* Configure the input color depth, color space, dynamic range */
>> - reg = (dp->video_info->dynamic_range << IN_D_RANGE_SHIFT) |
>> - (dp->video_info->color_depth << IN_BPC_SHIFT) |
>> - (dp->video_info->color_space << IN_COLOR_F_SHIFT);
>> + reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) |
>> + (dp->video_info.color_depth << IN_BPC_SHIFT) |
>> + (dp->video_info.color_space << IN_COLOR_F_SHIFT);
>> writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2);
>>
>> /* Set Input Color YCbCr Coefficients to ITU601 or ITU709 */
>> reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
>> reg &= ~IN_YC_COEFFI_MASK;
>> - if (dp->video_info->ycbcr_coeff)
>> + if (dp->video_info.ycbcr_coeff)
>> reg |= IN_YC_COEFFI_ITU709;
>> else
>> reg |= IN_YC_COEFFI_ITU601;
>> @@ -1229,17 +1229,17 @@ void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp)
>>
>> reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
>> reg &= ~INTERACE_SCAN_CFG;
>> - reg |= (dp->video_info->interlaced << 2);
>> + reg |= (dp->video_info.interlaced << 2);
>> writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
>>
>> reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
>> reg &= ~VSYNC_POLARITY_CFG;
>> - reg |= (dp->video_info->v_sync_polarity << 1);
>> + reg |= (dp->video_info.v_sync_polarity << 1);
>> writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
>>
>> reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
>> reg &= ~HSYNC_POLARITY_CFG;
>> - reg |= (dp->video_info->h_sync_polarity << 0);
>> + reg |= (dp->video_info.h_sync_polarity << 0);
>> writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
>>
>> reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE;
>> diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
>> index 7e1be72..6060d2c 100644
>> --- a/drivers/gpu/drm/exynos/exynos_dp.c
>> +++ b/drivers/gpu/drm/exynos/exynos_dp.c
>> @@ -28,8 +28,13 @@
>>
>> #include "exynos_drm_crtc.h"
>>
>> -#define plat_data_to_dp(pd) \
>> - container_of(pd, struct exynos_dp_device, plat_data)
>> +#define to_dp(nm) container_of(nm, struct exynos_dp_device, nm)
>> +
>> +struct video_info {
>> + bool h_sync_polarity;
>> + bool v_sync_polarity;
>> + bool interlaced;
>> +};
>>
>> struct exynos_dp_device {
>> struct drm_encoder encoder;
>> @@ -39,12 +44,13 @@ struct exynos_dp_device {
>>
>> struct exynos_drm_panel_info priv;
>> struct analogix_dp_plat_data plat_data;
>> + struct video_info video_info;
>> };
>>
>> int exynos_dp_crtc_clock_enable(struct analogix_dp_plat_data *plat_data,
>> bool enable)
>> {
>> - struct exynos_dp_device *dp = plat_data_to_dp(plat_data);
>> + struct exynos_dp_device *dp = to_dp(plat_data);
>> struct drm_encoder *encoder = &dp->encoder;
>> struct exynos_drm_crtc *crtc;
>>
>> @@ -71,7 +77,7 @@ static int exynos_dp_poweroff(struct analogix_dp_plat_data *plat_data)
>> static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data,
>> struct drm_connector *connector)
>> {
>> - struct exynos_dp_device *dp = plat_data_to_dp(plat_data);
>> + struct exynos_dp_device *dp = to_dp(plat_data);
>> struct drm_display_mode *mode;
>>
>> if (dp->plat_data.panel)
>> @@ -99,7 +105,7 @@ static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data,
>> static int exynos_dp_bridge_attach(struct analogix_dp_plat_data *plat_data,
>> struct drm_bridge *bridge)
>> {
>> - struct exynos_dp_device *dp = plat_data_to_dp(plat_data);
>> + struct exynos_dp_device *dp = to_dp(plat_data);
>> struct drm_encoder *encoder = &dp->encoder;
>> int ret;
>>
>> @@ -122,6 +128,28 @@ static bool exynos_dp_mode_fixup(struct drm_encoder *encoder,
>> const struct drm_display_mode *mode,
>> struct drm_display_mode *adjusted_mode)
>> {
>> + struct exynos_dp_device *dp = to_dp(encoder);
>> + int flags = adjusted_mode->flags;
>> +
>> + flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC |
>> + DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC |
>> + DRM_MODE_FLAG_INTERLACE);
>> +
>> + if (dp->video_info.h_sync_polarity)
>> + flags |= DRM_MODE_FLAG_PHSYNC;
>> + else
>> + flags |= DRM_MODE_FLAG_NHSYNC;
>> +
>> + if (dp->video_info.v_sync_polarity)
>> + flags |= DRM_MODE_FLAG_PVSYNC;
>> + else
>> + flags |= DRM_MODE_FLAG_NVSYNC;
>> +
>> + if (dp->video_info.interlaced)
>> + flags |= DRM_MODE_FLAG_INTERLACE;
>> +
>> + adjusted_mode->flags = flags;
>> +
>> return true;
>> }
>>
>> @@ -163,6 +191,22 @@ static int exynos_dp_dt_parse_panel(struct exynos_dp_device *dp)
>> return 0;
>> }
>>
>> +static int exynos_dp_dt_parse_video_info(struct exynos_dp_device *dp)
>> +{
>> + struct device_node *dp_node = dp->dev->of_node;
>> +
>> + dp->video_info.h_sync_polarity =
>> + of_property_read_bool(dp_node, "hsync-active-high");
>> +
>> + dp->video_info.v_sync_polarity =
>> + of_property_read_bool(dp_node, "vsync-active-high");
>> +
>> + dp->video_info.interlaced =
>> + of_property_read_bool(dp_node, "interlaced");
>> +
>> + return 0;
> Probably you wanted to follow the convention of other DT-parse functions
> but there is no need. This function cannot fail so maybe make it void?
> It would simplify a bit the code in exynos_dp_bind().
Actually, I found an mistaken here. I have parsed those two property for
twice,
one is here, the other is analogix_dp_core.c mode_set() function.
/*
* NOTE: those property parseing code is used for
* providing backward compatibility for samsung platform.
*/
[....]
of_property_read_u32(dp_node, "hsync-active-high",
(unsigned int *)&video_info->h_sync_polarity);
of_property_read_u32(dp_node, "vsync-active-high",
(unsigned int *)&video_info->v_sync_polarity);
of_property_read_u32(dp_node, "interlaced",
(unsigned int *)&video_info->interlaced);
And I think it would be easy to code when I achieve the backward
compatibility
in analogix core driver. So I prefer this way :-)
Anyway, thanks,
- Yakir
> Best regards,
> Krzysztof
>
>
>
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-01 08:10 +0200 |
| Subject | [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support |
| Message-ID | <q3MVA-6v2-1@gated-at.bofh.it> |
| In reply to | #1216602 |
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add GNU license v2 declared and samsung copyright
drivers/gpu/drm/exynos/exynos_dp.c | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 1 +
include/drm/bridge/analogix_dp.h | 16 ++++++++++++++++
3 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
index 6060d2c..40ef727 100644
--- a/drivers/gpu/drm/exynos/exynos_dp.c
+++ b/drivers/gpu/drm/exynos/exynos_dp.c
@@ -224,6 +224,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
dp->dev = dev;
dp->drm_dev = drm_dev;
+ dp->plat_data.dev_type = EXYNOS_DP;
dp->plat_data.power_on = exynos_dp_poweron;
dp->plat_data.power_off = exynos_dp_poweroff;
dp->plat_data.get_modes = exynos_dp_get_modes;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index efea045..4934271 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -293,6 +293,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
return ret;
}
+ dp->plat_data.dev_type = RK3288_DP;
dp->plat_data.attach = NULL;
dp->plat_data.get_modes = NULL;
dp->plat_data.power_on = rockchip_dp_poweron;
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 8b4ffad..7209a64 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -1,9 +1,25 @@
+/*
+ * Analogix Core DP (Display Port) interface driver.
+ *
+ * Copyright (C) 2012 Samsung Electronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
#ifndef _ANALOGIX_DP_H_
#define _ANALOGIX_DP_H_
#include <drm/drm_crtc.h>
+enum analogix_dp_devtype {
+ EXYNOS_DP,
+ RK3288_DP,
+};
+
struct analogix_dp_plat_data {
+ enum analogix_dp_devtype dev_type;
struct drm_panel *panel;
int (*power_on)(struct analogix_dp_plat_data *);
--
2.1.2
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| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Date | 2015-09-04 02:40 +0200 |
| Subject | Re: [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support |
| Message-ID | <q4NcR-2Q3-9@gated-at.bofh.it> |
| In reply to | #1216610 |
On 01.09.2015 15:07, Yakir Yang wrote:
Empty commit message. Please explain here why you want to add platform
device type support.
Actually the title is confusing. You are not adding support for platform
device types but rather adding a field containing type of device.
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> ---
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> - Add GNU license v2 declared and samsung copyright
>
> drivers/gpu/drm/exynos/exynos_dp.c | 1 +
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 1 +
> include/drm/bridge/analogix_dp.h | 16 ++++++++++++++++
> 3 files changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
> index 6060d2c..40ef727 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp.c
> +++ b/drivers/gpu/drm/exynos/exynos_dp.c
> @@ -224,6 +224,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
> dp->dev = dev;
> dp->drm_dev = drm_dev;
>
> + dp->plat_data.dev_type = EXYNOS_DP;
> dp->plat_data.power_on = exynos_dp_poweron;
> dp->plat_data.power_off = exynos_dp_poweroff;
> dp->plat_data.get_modes = exynos_dp_get_modes;
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index efea045..4934271 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -293,6 +293,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
> return ret;
> }
>
> + dp->plat_data.dev_type = RK3288_DP;
> dp->plat_data.attach = NULL;
> dp->plat_data.get_modes = NULL;
> dp->plat_data.power_on = rockchip_dp_poweron;
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index 8b4ffad..7209a64 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -1,9 +1,25 @@
> +/*
> + * Analogix Core DP (Display Port) interface driver.
> + *
> + * Copyright (C) 2012 Samsung Electronics Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
Two questions:
1. Why this change is here? I would rather expect it at patch 3/16 when
you created this file... That is the usual time for adding copyrights.
2. Does this file contains previous Samsung work?
Best regards,
Krzysztof
> #ifndef _ANALOGIX_DP_H_
> #define _ANALOGIX_DP_H_
>
> #include <drm/drm_crtc.h>
>
> +enum analogix_dp_devtype {
> + EXYNOS_DP,
> + RK3288_DP,
> +};
> +
> struct analogix_dp_plat_data {
> + enum analogix_dp_devtype dev_type;
> struct drm_panel *panel;
>
> int (*power_on)(struct analogix_dp_plat_data *);
>
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-06 06:10 +0200 |
| Subject | Re: [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support |
| Message-ID | <q5zrb-4sO-7@gated-at.bofh.it> |
| In reply to | #1218625 |
Hi Krzysztof,
在 09/04/2015 08:36 AM, Krzysztof Kozlowski 写道:
> On 01.09.2015 15:07, Yakir Yang wrote:
>
> Empty commit message. Please explain here why you want to add platform
> device type support.
>
> Actually the title is confusing. You are not adding support for platform
> device types but rather adding a field containing type of device.
>
>
>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>> ---
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2:
>> - Add GNU license v2 declared and samsung copyright
>>
>> drivers/gpu/drm/exynos/exynos_dp.c | 1 +
>> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 1 +
>> include/drm/bridge/analogix_dp.h | 16 ++++++++++++++++
>> 3 files changed, 18 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
>> index 6060d2c..40ef727 100644
>> --- a/drivers/gpu/drm/exynos/exynos_dp.c
>> +++ b/drivers/gpu/drm/exynos/exynos_dp.c
>> @@ -224,6 +224,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
>> dp->dev = dev;
>> dp->drm_dev = drm_dev;
>>
>> + dp->plat_data.dev_type = EXYNOS_DP;
>> dp->plat_data.power_on = exynos_dp_poweron;
>> dp->plat_data.power_off = exynos_dp_poweroff;
>> dp->plat_data.get_modes = exynos_dp_get_modes;
>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>> index efea045..4934271 100644
>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>> @@ -293,6 +293,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
>> return ret;
>> }
>>
>> + dp->plat_data.dev_type = RK3288_DP;
>> dp->plat_data.attach = NULL;
>> dp->plat_data.get_modes = NULL;
>> dp->plat_data.power_on = rockchip_dp_poweron;
>> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
>> index 8b4ffad..7209a64 100644
>> --- a/include/drm/bridge/analogix_dp.h
>> +++ b/include/drm/bridge/analogix_dp.h
>> @@ -1,9 +1,25 @@
>> +/*
>> + * Analogix Core DP (Display Port) interface driver.
>> + *
>> + * Copyright (C) 2012 Samsung Electronics Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License as published by the
>> + * Free Software Foundation; either version 2 of the License, or (at your
>> + * option) any later version.
>> + */
> Two questions:
> 1. Why this change is here? I would rather expect it at patch 3/16 when
> you created this file... That is the usual time for adding copyrights.
Yep, I should move this to 03/16.
> 2. Does this file contains previous Samsung work?
Hmm... I think this haven't contains the previous Samsung works,
but I have the cover the head message from analogix_dp_core driver
(include the copyright, but without ant author).
Thanks
- Yakir
> Best regards,
> Krzysztof
>
>> #ifndef _ANALOGIX_DP_H_
>> #define _ANALOGIX_DP_H_
>>
>> #include <drm/drm_crtc.h>
>>
>> +enum analogix_dp_devtype {
>> + EXYNOS_DP,
>> + RK3288_DP,
>> +};
>> +
>> struct analogix_dp_plat_data {
>> + enum analogix_dp_devtype dev_type;
>> struct drm_panel *panel;
>>
>> int (*power_on)(struct analogix_dp_plat_data *);
>>
>
>
>
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| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Date | 2015-09-07 02:00 +0200 |
| Subject | Re: [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support |
| Message-ID | <q5S0N-5r9-1@gated-at.bofh.it> |
| In reply to | #1219696 |
On 06.09.2015 13:07, Yakir Yang wrote:
> Hi Krzysztof,
>
> 在 09/04/2015 08:36 AM, Krzysztof Kozlowski 写道:
>> On 01.09.2015 15:07, Yakir Yang wrote:
>>
>> Empty commit message. Please explain here why you want to add platform
>> device type support.
>>
>> Actually the title is confusing. You are not adding support for platform
>> device types but rather adding a field containing type of device.
>>
>>
>>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>>> ---
>>> Changes in v4: None
>>> Changes in v3: None
>>> Changes in v2:
>>> - Add GNU license v2 declared and samsung copyright
>>>
>>> drivers/gpu/drm/exynos/exynos_dp.c | 1 +
>>> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 1 +
>>> include/drm/bridge/analogix_dp.h | 16 ++++++++++++++++
>>> 3 files changed, 18 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/exynos/exynos_dp.c
>>> b/drivers/gpu/drm/exynos/exynos_dp.c
>>> index 6060d2c..40ef727 100644
>>> --- a/drivers/gpu/drm/exynos/exynos_dp.c
>>> +++ b/drivers/gpu/drm/exynos/exynos_dp.c
>>> @@ -224,6 +224,7 @@ static int exynos_dp_bind(struct device *dev,
>>> struct device *master, void *data)
>>> dp->dev = dev;
>>> dp->drm_dev = drm_dev;
>>> + dp->plat_data.dev_type = EXYNOS_DP;
>>> dp->plat_data.power_on = exynos_dp_poweron;
>>> dp->plat_data.power_off = exynos_dp_poweroff;
>>> dp->plat_data.get_modes = exynos_dp_get_modes;
>>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> index efea045..4934271 100644
>>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> @@ -293,6 +293,7 @@ static int rockchip_dp_bind(struct device *dev,
>>> struct device *master,
>>> return ret;
>>> }
>>> + dp->plat_data.dev_type = RK3288_DP;
>>> dp->plat_data.attach = NULL;
>>> dp->plat_data.get_modes = NULL;
>>> dp->plat_data.power_on = rockchip_dp_poweron;
>>> diff --git a/include/drm/bridge/analogix_dp.h
>>> b/include/drm/bridge/analogix_dp.h
>>> index 8b4ffad..7209a64 100644
>>> --- a/include/drm/bridge/analogix_dp.h
>>> +++ b/include/drm/bridge/analogix_dp.h
>>> @@ -1,9 +1,25 @@
>>> +/*
>>> + * Analogix Core DP (Display Port) interface driver.
>>> + *
>>> + * Copyright (C) 2012 Samsung Electronics Co., Ltd.
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> modify it
>>> + * under the terms of the GNU General Public License as published by
>>> the
>>> + * Free Software Foundation; either version 2 of the License, or (at
>>> your
>>> + * option) any later version.
>>> + */
>> Two questions:
>> 1. Why this change is here? I would rather expect it at patch 3/16 when
>> you created this file... That is the usual time for adding copyrights.
>
> Yep, I should move this to 03/16.
>
>> 2. Does this file contains previous Samsung work?
>
> Hmm... I think this haven't contains the previous Samsung works,
> but I have the cover the head message from analogix_dp_core driver
> (include the copyright, but without ant author).
If it does not contain Samsung's work then don't mention its copyrights.
Best regards,
Krzysztof
>
> Thanks
> - Yakir
>
>> Best regards,
>> Krzysztof
>>
>>> #ifndef _ANALOGIX_DP_H_
>>> #define _ANALOGIX_DP_H_
>>> #include <drm/drm_crtc.h>
>>> +enum analogix_dp_devtype {
>>> + EXYNOS_DP,
>>> + RK3288_DP,
>>> +};
>>> +
>>> struct analogix_dp_plat_data {
>>> + enum analogix_dp_devtype dev_type;
>>> struct drm_panel *panel;
>>> int (*power_on)(struct analogix_dp_plat_data *);
>>>
>>
>>
>>
>
>
>
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-07 03:50 +0200 |
| Subject | Re: [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support |
| Message-ID | <q5TJf-7TU-1@gated-at.bofh.it> |
| In reply to | #1219877 |
Hi Krzysztof,
在 09/07/2015 07:55 AM, Krzysztof Kozlowski 写道:
> On 06.09.2015 13:07, Yakir Yang wrote:
>> Hi Krzysztof,
>>
>> 在 09/04/2015 08:36 AM, Krzysztof Kozlowski 写道:
>>> On 01.09.2015 15:07, Yakir Yang wrote:
>>>
>>> Empty commit message. Please explain here why you want to add platform
>>> device type support.
>>>
>>> Actually the title is confusing. You are not adding support for platform
>>> device types but rather adding a field containing type of device.
>>>
>>>
>>>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>>>> ---
>>>> Changes in v4: None
>>>> Changes in v3: None
>>>> Changes in v2:
>>>> - Add GNU license v2 declared and samsung copyright
>>>>
>>>> drivers/gpu/drm/exynos/exynos_dp.c | 1 +
>>>> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 1 +
>>>> include/drm/bridge/analogix_dp.h | 16 ++++++++++++++++
>>>> 3 files changed, 18 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/exynos/exynos_dp.c
>>>> b/drivers/gpu/drm/exynos/exynos_dp.c
>>>> index 6060d2c..40ef727 100644
>>>> --- a/drivers/gpu/drm/exynos/exynos_dp.c
>>>> +++ b/drivers/gpu/drm/exynos/exynos_dp.c
>>>> @@ -224,6 +224,7 @@ static int exynos_dp_bind(struct device *dev,
>>>> struct device *master, void *data)
>>>> dp->dev = dev;
>>>> dp->drm_dev = drm_dev;
>>>> + dp->plat_data.dev_type = EXYNOS_DP;
>>>> dp->plat_data.power_on = exynos_dp_poweron;
>>>> dp->plat_data.power_off = exynos_dp_poweroff;
>>>> dp->plat_data.get_modes = exynos_dp_get_modes;
>>>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>> b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>> index efea045..4934271 100644
>>>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>> @@ -293,6 +293,7 @@ static int rockchip_dp_bind(struct device *dev,
>>>> struct device *master,
>>>> return ret;
>>>> }
>>>> + dp->plat_data.dev_type = RK3288_DP;
>>>> dp->plat_data.attach = NULL;
>>>> dp->plat_data.get_modes = NULL;
>>>> dp->plat_data.power_on = rockchip_dp_poweron;
>>>> diff --git a/include/drm/bridge/analogix_dp.h
>>>> b/include/drm/bridge/analogix_dp.h
>>>> index 8b4ffad..7209a64 100644
>>>> --- a/include/drm/bridge/analogix_dp.h
>>>> +++ b/include/drm/bridge/analogix_dp.h
>>>> @@ -1,9 +1,25 @@
>>>> +/*
>>>> + * Analogix Core DP (Display Port) interface driver.
>>>> + *
>>>> + * Copyright (C) 2012 Samsung Electronics Co., Ltd.
>>>> + *
>>>> + * This program is free software; you can redistribute it and/or
>>>> modify it
>>>> + * under the terms of the GNU General Public License as published by
>>>> the
>>>> + * Free Software Foundation; either version 2 of the License, or (at
>>>> your
>>>> + * option) any later version.
>>>> + */
>>> Two questions:
>>> 1. Why this change is here? I would rather expect it at patch 3/16 when
>>> you created this file... That is the usual time for adding copyrights.
>> Yep, I should move this to 03/16.
>>
>>> 2. Does this file contains previous Samsung work?
>> Hmm... I think this haven't contains the previous Samsung works,
>> but I have the cover the head message from analogix_dp_core driver
>> (include the copyright, but without ant author).
> If it does not contain Samsung's work then don't mention its copyrights.
Okay,
- Yakir
>
> Best regards,
> Krzysztof
>
>> Thanks
>> - Yakir
>>
>>> Best regards,
>>> Krzysztof
>>>
>>>> #ifndef _ANALOGIX_DP_H_
>>>> #define _ANALOGIX_DP_H_
>>>> #include <drm/drm_crtc.h>
>>>> +enum analogix_dp_devtype {
>>>> + EXYNOS_DP,
>>>> + RK3288_DP,
>>>> +};
>>>> +
>>>> struct analogix_dp_plat_data {
>>>> + enum analogix_dp_devtype dev_type;
>>>> struct drm_panel *panel;
>>>> int (*power_on)(struct analogix_dp_plat_data *);
>>>>
>>>
>>>
>>
>>
>
>
>
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-01 08:10 +0200 |
| Subject | [PATCH v4 08/16] drm: rockchip/dp: add rockchip platform dp driver |
| Message-ID | <q3MVA-6v2-7@gated-at.bofh.it> |
| In reply to | #1216602 |
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v4:
- Remove some deprecated DT properties in rockchip dp document.
Changes in v3:
- Take Thierry Reding and Heiko suggest, leave "sclk_edp_24m" to rockchip
dp phy driver which name to "24m", and leave "sclk_edp" to analogix dp
core driver which name to "dp", and leave "pclk_edp" to rockchip dp platform
driver which name to "pclk".
- Take Heiko suggest, add devicetree binding document.
- Take Heiko suggest, remove "rockchip,panel" DT property, take use of remote
point to get panel node.
- Add the new function point analogix_dp_platdata.get_modes init.
Changes in v2:
- Take Heiko suggest, get panel node with remote-endpoint method,
and create devicetree binding for driver.
- Remove the clock enable/disbale with "sclk_edp" & "sclk_edp_24m",
leave those clock to rockchip dp phy driver.
.../bindings/video/analogix_dp-rockchip.txt | 74 ++++
drivers/gpu/drm/rockchip/Kconfig | 9 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 389 +++++++++++++++++++++
4 files changed, 473 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
create mode 100644 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
diff --git a/Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
new file mode 100644
index 0000000..502483e
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
@@ -0,0 +1,74 @@
+Rockchip RK3288 specific extensions to the Analogix Display Port
+================================
+
+Required properties:
+- compatible: "rockchip,rk3288-edp";
+
+- reg: physical base address of the controller and length
+
+- clocks: from common clock binding: handle to dp clock.
+ of memory mapped region.
+
+- clock-names: from common clock binding:
+ Required elements: "dp" "pclk"
+
+- resets: Must contain an entry for each entry in reset-names.
+ See ../reset/reset.txt for details.
+
+- reset-names: Must include the name "dp"
+
+- rockchip,grf: this soc should set GRF regs, so need get grf here.
+
+- ports: contain a port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt.
+
+
+For the below properties, please refer to Analogix DP binding document:
+ * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
+- phys (required)
+- phy-names (required)
+- hpd-gpios (optional)
+-------------------------------------------------------------------------------
+
+Example:
+ dp-controller: dp@ff970000 {
+ compatible = "rockchip,rk3288-dp";
+ reg = <0xff970000 0x4000>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+ clock-names = "dp", "pclk";
+ phys = <&dp_phy>;
+ phy-names = "dp";
+
+ rockchip,grf = <&grf>;
+ resets = <&cru 111>;
+ reset-names = "dp";
+
+ status = "disabled";
+
+ ports {
+ edp_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ edp_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_edp>;
+ };
+ edp_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_edp>;
+ };
+ };
+
+ edp_out: port@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ edp_out_panel: endpoint {
+ reg = <0>;
+ remote-endpoint = <&panel_in_edp>
+ };
+ };
+ };
+ };
+
diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index 35215f6..c2ba945 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -25,3 +25,12 @@ config ROCKCHIP_DW_HDMI
for the Synopsys DesignWare HDMI driver. If you want to
enable HDMI on RK3288 based SoC, you should selet this
option.
+
+config ROCKCHIP_ANALOGIX_DP
+ tristate "Rockchip specific extensions for Analogix DP driver"
+ depends on DRM_ROCKCHIP
+ select DRM_ANALOGIX_DP
+ help
+ This selects support for Rockchip SoC specific extensions
+ for the Analogix Core DP driver. If you want to enable DP
+ on RK3288 based SoC, you should selet this option.
diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile
index f3d8a19..8ad01fb 100644
--- a/drivers/gpu/drm/rockchip/Makefile
+++ b/drivers/gpu/drm/rockchip/Makefile
@@ -6,5 +6,6 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o rockchip_drm_fbdev.o \
rockchip_drm_gem.o
obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
+obj-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o
obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_drm_vop.o
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
new file mode 100644
index 0000000..cebff9e
--- /dev/null
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -0,0 +1,389 @@
+/*
+ * Rockchip SoC DP (Display Port) interface driver.
+ *
+ * Copyright (C) Fuzhou Rockchip Electronics Co., Ltd.
+ * Author: Andy Yan <andy.yan@rock-chips.com>
+ * Yakir Yang <ykk@rock-chips.com>
+ * Jeff Chen <jeff.chen@rock-chips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <drm/drmP.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_of.h>
+#include <drm/drm_dp_helper.h>
+
+#include <linux/component.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of_graph.h>
+#include <linux/regmap.h>
+#include <linux/reset.h>
+#include <linux/clk.h>
+
+#include <video/of_videomode.h>
+#include <video/videomode.h>
+
+#include <drm/bridge/analogix_dp.h>
+
+#include "rockchip_drm_drv.h"
+#include "rockchip_drm_vop.h"
+
+#define encoder_to_dp(c) \
+ container_of(c, struct rockchip_dp_device, encoder)
+
+#define plat_data_to_dp(pd) \
+ container_of(pd, struct rockchip_dp_device, plat_data)
+
+/* dp grf register offset */
+#define GRF_GPIO7B_IOMUX 0x0070
+#define GPIO7B3_SEL_MASK (0x03 << 6)
+#define GPIO7B3_SEL_EDP_HOTPLUG BIT(7)
+
+#define GRF_SOC_CON6 0x025c
+#define GRF_EDP_LCD_SEL_MASK BIT(5)
+#define GRF_EDP_SEL_VOP_LIT BIT(5)
+#define GRF_EDP_SEL_VOP_BIG 0
+
+struct rockchip_dp_device {
+ struct drm_device *drm_dev;
+ struct device *dev;
+ struct drm_encoder encoder;
+ struct drm_display_mode mode;
+
+ struct clk *pclk;
+ struct regmap *grf;
+ struct reset_control *rst;
+
+ struct analogix_dp_plat_data plat_data;
+};
+
+static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
+{
+ u32 val;
+ int ret;
+
+ val = GPIO7B3_SEL_EDP_HOTPLUG | (GPIO7B3_SEL_MASK << 16);
+ ret = regmap_write(dp->grf, GRF_GPIO7B_IOMUX, val);
+ if (ret != 0) {
+ dev_err(dp->dev, "Could not config GRF edp hpd: %d\n", ret);
+ return ret;
+ }
+
+ reset_control_assert(dp->rst);
+ usleep_range(10, 20);
+ reset_control_deassert(dp->rst);
+
+ return 0;
+}
+
+static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
+{
+ struct rockchip_dp_device *dp = plat_data_to_dp(plat_data);
+ int ret;
+
+ ret = clk_prepare_enable(dp->pclk);
+ if (ret < 0) {
+ dev_err(dp->dev, "failed to enable pclk %d\n", ret);
+ return ret;
+ }
+
+ ret = rockchip_dp_pre_init(dp);
+ if (ret < 0) {
+ dev_err(dp->dev, "failed to dp pre init %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
+{
+ struct rockchip_dp_device *dp = plat_data_to_dp(plat_data);
+
+ clk_disable_unprepare(dp->pclk);
+
+ return 0;
+}
+
+static bool
+rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ /* do nothing */
+ return true;
+}
+
+static void rockchip_dp_drm_encoder_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted)
+{
+ /* do nothing */
+}
+
+static void rockchip_dp_drm_encoder_prepare(struct drm_encoder *encoder)
+{
+ struct rockchip_dp_device *dp = encoder_to_dp(encoder);
+ u32 val;
+ int ret;
+
+ ret = rockchip_drm_crtc_mode_config(encoder->crtc,
+ DRM_MODE_CONNECTOR_eDP,
+ ROCKCHIP_OUT_MODE_AAAA);
+ if (ret < 0) {
+ dev_err(dp->dev, "Could not set crtc mode config: %d.\n", ret);
+ return;
+ }
+
+ ret = rockchip_drm_encoder_get_mux_id(dp->dev->of_node, encoder);
+ if (ret < 0)
+ return;
+
+ if (ret)
+ val = GRF_EDP_SEL_VOP_LIT | (GRF_EDP_LCD_SEL_MASK << 16);
+ else
+ val = GRF_EDP_SEL_VOP_BIG | (GRF_EDP_LCD_SEL_MASK << 16);
+
+ dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
+
+ ret = regmap_write(dp->grf, GRF_SOC_CON6, val);
+ if (ret != 0) {
+ dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+ return;
+ }
+}
+
+static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
+{
+ /* do nothing */
+}
+
+static struct drm_encoder_helper_funcs rockchip_dp_encoder_helper_funcs = {
+ .mode_fixup = rockchip_dp_drm_encoder_mode_fixup,
+ .mode_set = rockchip_dp_drm_encoder_mode_set,
+ .prepare = rockchip_dp_drm_encoder_prepare,
+ .commit = rockchip_dp_drm_encoder_nop,
+ .disable = rockchip_dp_drm_encoder_nop,
+};
+
+static void rockchip_dp_drm_encoder_destroy(struct drm_encoder *encoder)
+{
+ drm_encoder_cleanup(encoder);
+}
+
+static struct drm_encoder_funcs rockchip_dp_encoder_funcs = {
+ .destroy = rockchip_dp_drm_encoder_destroy,
+};
+
+static int rockchip_dp_init(struct rockchip_dp_device *dp)
+{
+ struct device *dev = dp->dev;
+ struct device_node *np = dev->of_node;
+ int ret;
+
+ dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
+ if (IS_ERR(dp->grf)) {
+ dev_err(dev, "failed to get rockchip,grf property\n");
+ return PTR_ERR(dp->grf);
+ }
+
+ dp->pclk = devm_clk_get(dev, "pclk");
+ if (IS_ERR(dp->pclk)) {
+ dev_err(dev, "failed to get pclk property\n");
+ return PTR_ERR(dp->pclk);
+ }
+
+ dp->rst = devm_reset_control_get(dev, "dp");
+ if (IS_ERR(dp->rst)) {
+ dev_err(dev, "failed to get dp reset control\n");
+ return PTR_ERR(dp->rst);
+ }
+
+ ret = clk_prepare_enable(dp->pclk);
+ if (ret < 0) {
+ dev_err(dp->dev, "failed to enable pclk %d\n", ret);
+ return ret;
+ }
+
+ ret = rockchip_dp_pre_init(dp);
+ if (ret < 0) {
+ dev_err(dp->dev, "failed to pre init %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp)
+{
+ struct drm_encoder *encoder = &dp->encoder;
+ struct drm_device *drm_dev = dp->drm_dev;
+ struct device *dev = dp->dev;
+ int ret;
+
+ encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
+ dev->of_node);
+ DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs);
+
+ ret = drm_encoder_init(drm_dev, encoder, &rockchip_dp_encoder_funcs,
+ DRM_MODE_ENCODER_TMDS);
+ if (ret) {
+ DRM_ERROR("failed to initialize encoder with drm\n");
+ return ret;
+ }
+
+ drm_encoder_helper_add(encoder, &rockchip_dp_encoder_helper_funcs);
+
+ return 0;
+}
+
+static int rockchip_dp_bind(struct device *dev, struct device *master,
+ void *data)
+{
+ struct rockchip_dp_device *dp = dev_get_drvdata(dev);
+ struct drm_device *drm_dev = data;
+ int ret;
+
+ /*
+ * Just like the probe function said, we don't need the
+ * device drvrate anymore, we should leave the charge to
+ * analogix dp driver, set the device drvdata to NULL.
+ */
+ dev_set_drvdata(dev, NULL);
+
+ ret = rockchip_dp_init(dp);
+ if (ret < 0)
+ return ret;
+
+ dp->drm_dev = drm_dev;
+
+ ret = rockchip_dp_drm_create_encoder(dp);
+ if (ret) {
+ DRM_ERROR("failed to create drm encoder\n");
+ return ret;
+ }
+
+ dp->plat_data.attach = NULL;
+ dp->plat_data.get_modes = NULL;
+ dp->plat_data.power_on = rockchip_dp_poweron;
+ dp->plat_data.power_off = rockchip_dp_powerdown;
+
+ return analogix_dp_bind(dev, dp->drm_dev, &dp->encoder,
+ &dp->plat_data);
+}
+
+static void rockchip_dp_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+ return analogix_dp_unbind(dev, master, data);
+}
+
+static const struct component_ops rockchip_dp_component_ops = {
+ .bind = rockchip_dp_bind,
+ .unbind = rockchip_dp_unbind,
+};
+
+static int rockchip_dp_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *panel_node, *port, *endpoint;
+ struct rockchip_dp_device *dp;
+ struct drm_panel *panel;
+
+ port = of_graph_get_port_by_id(dev->of_node, 1);
+ if (!port) {
+ dev_err(dev, "can't find output port\n");
+ return -EINVAL;
+ }
+
+ endpoint = of_get_child_by_name(port, "endpoint");
+ of_node_put(port);
+ if (!endpoint) {
+ dev_err(dev, "no output endpoint found\n");
+ return -EINVAL;
+ }
+
+ panel_node = of_graph_get_remote_port_parent(endpoint);
+ of_node_put(endpoint);
+ if (!panel_node) {
+ dev_err(dev, "no output node found\n");
+ return -EINVAL;
+ }
+
+ panel = of_drm_find_panel(panel_node);
+ if (!panel) {
+ DRM_ERROR("failed to find panel\n");
+ of_node_put(panel_node);
+ return -EPROBE_DEFER;
+ }
+
+ of_node_put(panel_node);
+
+ dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
+ if (!dp)
+ return -ENOMEM;
+
+ dp->dev = dev;
+
+ dp->plat_data.panel = panel;
+
+ /*
+ * We just use the drvdata until driver run into component
+ * add function, and then we would set drvdata to null, so
+ * that analogix dp driver could take charge of the drvdata.
+ */
+ platform_set_drvdata(pdev, dp);
+
+ return component_add(dev, &rockchip_dp_component_ops);
+}
+
+static int rockchip_dp_remove(struct platform_device *pdev)
+{
+ component_del(&pdev->dev, &rockchip_dp_component_ops);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int rockchip_dp_suspend(struct device *dev)
+{
+ return analogix_dp_suspend(dev);
+}
+
+static int rockchip_dp_resume(struct device *dev)
+{
+ return analogix_dp_resume(dev);
+}
+#endif
+
+static const struct dev_pm_ops rockchip_dp_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(rockchip_dp_suspend, rockchip_dp_resume)
+};
+
+static const struct of_device_id rockchip_dp_dt_ids[] = {
+ {.compatible = "rockchip,rk3288-dp",},
+ {}
+};
+MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
+
+static struct platform_driver rockchip_dp_driver = {
+ .probe = rockchip_dp_probe,
+ .remove = rockchip_dp_remove,
+ .driver = {
+ .name = "rockchip-dp",
+ .owner = THIS_MODULE,
+ .pm = &rockchip_dp_pm_ops,
+ .of_match_table = of_match_ptr(rockchip_dp_dt_ids),
+ },
+};
+
+module_platform_driver(rockchip_dp_driver);
+
+MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
+MODULE_AUTHOR("Jeff chen <jeff.chen@rock-chips.com>");
+MODULE_DESCRIPTION("Rockchip Specific Analogix-DP Driver Extension");
+MODULE_LICENSE("GPL v2");
--
2.1.2
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| From | Heiko Stuebner <heiko@sntech.de> |
|---|---|
| Date | 2015-09-01 16:30 +0200 |
| Subject | Re: [PATCH v4 08/16] drm: rockchip/dp: add rockchip platform dp driver |
| Message-ID | <q3UJs-Hp-17@gated-at.bofh.it> |
| In reply to | #1216612 |
Am Dienstag, 1. September 2015, 14:01:28 schrieb Yakir Yang:
> Rockchip have three clocks for dp controller, we leave pclk_edp
> to analogix_dp driver control, and keep the sclk_edp_24m and
> sclk_edp in platform driver.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> ---
> Changes in v4:
> - Remove some deprecated DT properties in rockchip dp document.
>
> Changes in v3:
> - Take Thierry Reding and Heiko suggest, leave "sclk_edp_24m" to rockchip
> dp phy driver which name to "24m", and leave "sclk_edp" to analogix dp
> core driver which name to "dp", and leave "pclk_edp" to rockchip dp
> platform driver which name to "pclk".
> - Take Heiko suggest, add devicetree binding document.
> - Take Heiko suggest, remove "rockchip,panel" DT property, take use of
> remote point to get panel node.
> - Add the new function point analogix_dp_platdata.get_modes init.
>
> Changes in v2:
> - Take Heiko suggest, get panel node with remote-endpoint method,
> and create devicetree binding for driver.
> - Remove the clock enable/disbale with "sclk_edp" & "sclk_edp_24m",
> leave those clock to rockchip dp phy driver.
>
> .../bindings/video/analogix_dp-rockchip.txt | 74 ++++
> drivers/gpu/drm/rockchip/Kconfig | 9 +
> drivers/gpu/drm/rockchip/Makefile | 1 +
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 389
> +++++++++++++++++++++ 4 files changed, 473 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt create
> mode 100644 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>
> diff --git
> a/Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
> b/Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt new file
> mode 100644
> index 0000000..502483e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
> @@ -0,0 +1,74 @@
> +Rockchip RK3288 specific extensions to the Analogix Display Port
> +================================
> +
> +Required properties:
> +- compatible: "rockchip,rk3288-edp";
> +
> +- reg: physical base address of the controller and length
> +
> +- clocks: from common clock binding: handle to dp clock.
> + of memory mapped region.
> +
> +- clock-names: from common clock binding:
> + Required elements: "dp" "pclk"
> +
> +- resets: Must contain an entry for each entry in reset-names.
> + See ../reset/reset.txt for details.
> +
> +- reset-names: Must include the name "dp"
> +
> +- rockchip,grf: this soc should set GRF regs, so need get grf here.
> +
> +- ports: contain a port node with endpoint definitions as defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt.
> +
> +
> +For the below properties, please refer to Analogix DP binding document:
> + * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
> +- phys (required)
> +- phy-names (required)
> +- hpd-gpios (optional)
> +---------------------------------------------------------------------------
> ---- +
> +Example:
> + dp-controller: dp@ff970000 {
> + compatible = "rockchip,rk3288-dp";
> + reg = <0xff970000 0x4000>;
> + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
> + clock-names = "dp", "pclk";
> + phys = <&dp_phy>;
> + phy-names = "dp";
> +
> + rockchip,grf = <&grf>;
> + resets = <&cru 111>;
> + reset-names = "dp";
> +
> + status = "disabled";
> +
> + ports {
> + edp_in: port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + edp_in_vopb: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&vopb_out_edp>;
> + };
> + edp_in_vopl: endpoint@1 {
> + reg = <1>;
> + remote-endpoint = <&vopl_out_edp>;
> + };
> + };
> +
> + edp_out: port@1 {
> + reg = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + edp_out_panel: endpoint {
> + reg = <0>;
> + remote-endpoint = <&panel_in_edp>
> + };
> + };
> + };
> + };
> +
just a nit right now, because "git am" mentioned it:
git am \[PATCH\ v4\ 08_16\]\ drm_rockchip_dp_add\ rockchip\ platform\ dp\
driver.mbox
[...]/linux-rockchip/.git/rebase-apply/patch:108: new blank line at EOF.
+
meaning you're adding an empty line at the end :-)
Heiko
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| From | Yakir Yang <ykk@rock-chips.com> |
|---|---|
| Date | 2015-09-01 16:50 +0200 |
| Subject | Re: [PATCH v4 08/16] drm: rockchip/dp: add rockchip platform dp driver |
| Message-ID | <q3V2O-13Z-19@gated-at.bofh.it> |
| In reply to | #1216881 |
Hi Heiko,
在 2015/9/1 22:24, Heiko Stuebner 写道:
> Am Dienstag, 1. September 2015, 14:01:28 schrieb Yakir Yang:
>> Rockchip have three clocks for dp controller, we leave pclk_edp
>> to analogix_dp driver control, and keep the sclk_edp_24m and
>> sclk_edp in platform driver.
>>
>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>> ---
>> Changes in v4:
>> - Remove some deprecated DT properties in rockchip dp document.
>>
>> Changes in v3:
>> - Take Thierry Reding and Heiko suggest, leave "sclk_edp_24m" to rockchip
>> dp phy driver which name to "24m", and leave "sclk_edp" to analogix dp
>> core driver which name to "dp", and leave "pclk_edp" to rockchip dp
>> platform driver which name to "pclk".
>> - Take Heiko suggest, add devicetree binding document.
>> - Take Heiko suggest, remove "rockchip,panel" DT property, take use of
>> remote point to get panel node.
>> - Add the new function point analogix_dp_platdata.get_modes init.
>>
>> Changes in v2:
>> - Take Heiko suggest, get panel node with remote-endpoint method,
>> and create devicetree binding for driver.
>> - Remove the clock enable/disbale with "sclk_edp" & "sclk_edp_24m",
>> leave those clock to rockchip dp phy driver.
>>
>> .../bindings/video/analogix_dp-rockchip.txt | 74 ++++
>> drivers/gpu/drm/rockchip/Kconfig | 9 +
>> drivers/gpu/drm/rockchip/Makefile | 1 +
>> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 389
>> +++++++++++++++++++++ 4 files changed, 473 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt create
>> mode 100644 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>
>> diff --git
>> a/Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
>> b/Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt new file
>> mode 100644
>> index 0000000..502483e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
>> @@ -0,0 +1,74 @@
>> +Rockchip RK3288 specific extensions to the Analogix Display Port
>> +================================
>> +
>> +Required properties:
>> +- compatible: "rockchip,rk3288-edp";
>> +
>> +- reg: physical base address of the controller and length
>> +
>> +- clocks: from common clock binding: handle to dp clock.
>> + of memory mapped region.
>> +
>> +- clock-names: from common clock binding:
>> + Required elements: "dp" "pclk"
>> +
>> +- resets: Must contain an entry for each entry in reset-names.
>> + See ../reset/reset.txt for details.
>> +
>> +- reset-names: Must include the name "dp"
>> +
>> +- rockchip,grf: this soc should set GRF regs, so need get grf here.
>> +
>> +- ports: contain a port node with endpoint definitions as defined in
>> + Documentation/devicetree/bindings/media/video-interfaces.txt.
>> +
>> +
>> +For the below properties, please refer to Analogix DP binding document:
>> + * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
>> +- phys (required)
>> +- phy-names (required)
>> +- hpd-gpios (optional)
>> +---------------------------------------------------------------------------
>> ---- +
>> +Example:
>> + dp-controller: dp@ff970000 {
>> + compatible = "rockchip,rk3288-dp";
>> + reg = <0xff970000 0x4000>;
>> + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
>> + clock-names = "dp", "pclk";
>> + phys = <&dp_phy>;
>> + phy-names = "dp";
>> +
>> + rockchip,grf = <&grf>;
>> + resets = <&cru 111>;
>> + reset-names = "dp";
>> +
>> + status = "disabled";
>> +
>> + ports {
>> + edp_in: port {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + edp_in_vopb: endpoint@0 {
>> + reg = <0>;
>> + remote-endpoint = <&vopb_out_edp>;
>> + };
>> + edp_in_vopl: endpoint@1 {
>> + reg = <1>;
>> + remote-endpoint = <&vopl_out_edp>;
>> + };
>> + };
>> +
>> + edp_out: port@1 {
>> + reg = <1>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + edp_out_panel: endpoint {
>> + reg = <0>;
>> + remote-endpoint = <&panel_in_edp>
>> + };
>> + };
>> + };
>> + };
>> +
> just a nit right now, because "git am" mentioned it:
>
> git am \[PATCH\ v4\ 08_16\]\ drm_rockchip_dp_add\ rockchip\ platform\ dp\
> driver.mbox
> [...]/linux-rockchip/.git/rebase-apply/patch:108: new blank line at EOF.
> +
>
> meaning you're adding an empty line at the end :-)
Oh, thanks, I have saw this too when I apply this on linux-next
branch, but I haven't see the log very careful at that time, and
".git/rebase-apply/patch" just empty, so I just go ahead and
forget to fix this one.
Thanks for your remind,
- Yakir
>
> Heiko
>
>
>
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