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Groups > linux.kernel > #1734038

[PATCHv7 11/19] x86/mm: Make STACK_TOP_MAX dynamic

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For boot-time switching between paging modes, we need to be able to
change STACK_TOP_MAX at runtime.

The change is trivial and it doesn't affect kernel image size.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
 arch/x86/include/asm/processor.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 3fa26a61eabc..fa9300ccce1b 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -871,7 +871,7 @@ static inline void spin_lock_prefetch(const void *x)
 					IA32_PAGE_OFFSET : TASK_SIZE_MAX)
 
 #define STACK_TOP		TASK_SIZE_LOW
-#define STACK_TOP_MAX		TASK_SIZE_MAX
+#define STACK_TOP_MAX		(pgtable_l5_enabled ? TASK_SIZE_MAX : DEFAULT_MAP_WINDOW)
 
 #define INIT_THREAD  {						\
 	.sp0			= TOP_OF_INIT_STACK,		\
-- 
2.14.1

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Thread

[PATCHv7 00/19] Boot-time switching between 4- and 5-level paging for 4.15 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
  [PATCHv7 18/19] x86/mm: Redefine some of page table helpers as macros "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
  [PATCHv7 14/19] x86/mm: Fold p4d page table layer at runtime "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
  [PATCHv7 16/19] x86/mm: Allow to boot without la57 if CONFIG_X86_5LEVEL=y "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
  [PATCHv7 10/19] x86/mm: Make __PHYSICAL_MASK_SHIFT and __VIRTUAL_MASK_SHIFT dynamic "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
  [PATCHv7 13/19] x86/mm: Make early boot code support boot-time switching of paging modes "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
  [PATCHv7 06/19] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
  [PATCHv7 04/19] x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
  [PATCHv7 08/19] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
    Re: [PATCHv7 08/19] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D  variable "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-19 16:10 +0200
  [PATCHv7 19/19] x86/mm: Offset boot-time paging mode switching cost "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
  [PATCHv7 09/19] x86/mm: Make MAX_PHYSADDR_BITS and MAX_PHYSMEM_BITS dynamic "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
  [PATCHv7 01/19] mm/sparsemem: Allocate mem_section at runtime for SPARSEMEM_EXTREME "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
  [PATCHv7 11/19] x86/mm: Make STACK_TOP_MAX dynamic "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
  [PATCHv7 03/19] x86/kasan: Use the same shadow offset for 4- and 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
  [PATCHv7 02/19] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
  [PATCHv7 12/19] x86/mm: Adjust virtual address space layout in early boot. "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
  Re: [PATCHv7 00/19] Boot-time switching between 4- and 5-level  paging for 4.15 "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-09-25 15:20 +0200

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