Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1734031
| From | "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCHv7 06/19] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time |
| Date | 2017-09-18 13:00 +0200 |
| Message-ID | <ur1Wr-5gk-37@gated-at.bofh.it> (permalink) |
| References | <ur1Wp-5gk-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
This patch prepare decompression code to boot-time switching between 4- and 5-level paging. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> --- arch/x86/boot/compressed/head_64.S | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S index b4a5d284391c..09c85e8558eb 100644 --- a/arch/x86/boot/compressed/head_64.S +++ b/arch/x86/boot/compressed/head_64.S @@ -288,6 +288,28 @@ ENTRY(startup_64) leaq boot_stack_end(%rbx), %rsp #ifdef CONFIG_X86_5LEVEL + /* Preserve rbx across cpuid */ + movq %rbx, %r8 + + /* Check if leaf 7 is supported */ + xorl %eax, %eax + cpuid + cmpl $7, %eax + jb lvl5 + + /* + * Check if la57 is supported. + * The feature is enumerated with CPUID.(EAX=07H, ECX=0):ECX[bit 16] + */ + movl $7, %eax + xorl %ecx, %ecx + cpuid + andl $(1 << 16), %ecx + jz lvl5 + + /* Restore rbx */ + movq %r8, %rbx + /* Check if 5-level paging has already enabled */ movq %cr4, %rax testl $X86_CR4_LA57, %eax @@ -327,6 +349,8 @@ ENTRY(startup_64) pushq %rax lretq lvl5: + /* Restore rbx */ + movq %r8, %rbx #endif /* Zero EFLAGS */ -- 2.14.1
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCHv7 00/19] Boot-time switching between 4- and 5-level paging for 4.15 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
[PATCHv7 18/19] x86/mm: Redefine some of page table helpers as macros "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
[PATCHv7 14/19] x86/mm: Fold p4d page table layer at runtime "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
[PATCHv7 16/19] x86/mm: Allow to boot without la57 if CONFIG_X86_5LEVEL=y "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
[PATCHv7 10/19] x86/mm: Make __PHYSICAL_MASK_SHIFT and __VIRTUAL_MASK_SHIFT dynamic "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
[PATCHv7 13/19] x86/mm: Make early boot code support boot-time switching of paging modes "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
[PATCHv7 06/19] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
[PATCHv7 04/19] x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
[PATCHv7 08/19] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
Re: [PATCHv7 08/19] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-19 16:10 +0200
[PATCHv7 19/19] x86/mm: Offset boot-time paging mode switching cost "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:00 +0200
[PATCHv7 09/19] x86/mm: Make MAX_PHYSADDR_BITS and MAX_PHYSMEM_BITS dynamic "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
[PATCHv7 01/19] mm/sparsemem: Allocate mem_section at runtime for SPARSEMEM_EXTREME "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
[PATCHv7 11/19] x86/mm: Make STACK_TOP_MAX dynamic "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
[PATCHv7 03/19] x86/kasan: Use the same shadow offset for 4- and 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
[PATCHv7 02/19] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
[PATCHv7 12/19] x86/mm: Adjust virtual address space layout in early boot. "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-09-18 13:10 +0200
Re: [PATCHv7 00/19] Boot-time switching between 4- and 5-level paging for 4.15 "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-09-25 15:20 +0200
csiph-web