Re: [RFC 1/4] mmc: cqhci: Move CQHCI_ENABLE before setting TDLBA/TDLBAU

From	Adrian Hunter <adrian.hunter@intel.com>
Newsgroups	linux.kernel
Subject	Re: [RFC 1/4] mmc: cqhci: Move CQHCI_ENABLE before setting TDLBA/TDLBAU
Date	2017-08-31 08:20 +0200
Message-ID	<ukqZz-202-3@gated-at.bofh.it> (permalink)
References	<ukaUN-i2-1@gated-at.bofh.it> <ukaUO-i2-31@gated-at.bofh.it>
Organization	Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki

Show all headers | View raw

On 30/08/17 16:04, Ritesh Harjani wrote:
> Without this patch the CQHCI registers are getting reset
> again.
> 
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
> ---
>  drivers/mmc/host/cqhci.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/mmc/host/cqhci.c b/drivers/mmc/host/cqhci.c
> index 8650a13..2a7351c 100644
> --- a/drivers/mmc/host/cqhci.c
> +++ b/drivers/mmc/host/cqhci.c
> @@ -262,6 +262,9 @@ static void __cqhci_enable(struct cqhci_host *cq_host)
>  
>  	cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
>  
> +	cqcfg |= CQHCI_ENABLE;
> +	cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
That doesn't follow the flow in the specification B.6.1. Command Queuing
Initialization Sequence.  Also in B.3.5 Task List, the spec. says "Changing
the value of TDLBA is not allowed when command queue mode is enabled."

So you will need to add a quirk for this.

> +
>  	cqhci_writel(cq_host, lower_32_bits(cq_host->desc_dma_base),
>  		     CQHCI_TDLBA);
>  	cqhci_writel(cq_host, upper_32_bits(cq_host->desc_dma_base),
> @@ -271,10 +274,6 @@ static void __cqhci_enable(struct cqhci_host *cq_host)
>  
>  	cqhci_set_irqs(cq_host, 0);
>  
> -	cqcfg |= CQHCI_ENABLE;
> -
> -	cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
> -
>  	mmc->cqe_on = true;
>  
>  	if (cq_host->ops->enable)
>

Thread

[RFC 0/4] mmc: sdhci-msm: Add CQE support for sdhci-msm Ritesh Harjani <riteshh@codeaurora.org> - 2017-08-30 15:10 +0200
  [RFC 2/4] mmc: sdhci-msm: Add CQHCI support for sdhci-msm Ritesh Harjani <riteshh@codeaurora.org> - 2017-08-30 15:10 +0200
    Re: [RFC 2/4] mmc: sdhci-msm: Add CQHCI support for sdhci-msm Adrian Hunter <adrian.hunter@intel.com> - 2017-08-31 09:40 +0200
      Re: [RFC 2/4] mmc: sdhci-msm: Add CQHCI support for sdhci-msm Ritesh Harjani <riteshh@codeaurora.org> - 2017-09-02 07:20 +0200
  [RFC 3/4] mmc: sdhci-msm: Change the desc_sz on cqe_enable/disable. Ritesh Harjani <riteshh@codeaurora.org> - 2017-08-30 15:10 +0200
    Re: [RFC 3/4] mmc: sdhci-msm: Change the desc_sz on  cqe_enable/disable. Adrian Hunter <adrian.hunter@intel.com> - 2017-08-31 08:50 +0200
      Re: [RFC 3/4] mmc: sdhci-msm: Change the desc_sz on  cqe_enable/disable. Ritesh Harjani <riteshh@codeaurora.org> - 2017-09-02 07:20 +0200
  [RFC 1/4] mmc: cqhci: Move CQHCI_ENABLE before setting TDLBA/TDLBAU Ritesh Harjani <riteshh@codeaurora.org> - 2017-08-30 15:10 +0200
    Re: [RFC 1/4] mmc: cqhci: Move CQHCI_ENABLE before setting  TDLBA/TDLBAU Adrian Hunter <adrian.hunter@intel.com> - 2017-08-31 08:20 +0200
      Re: [RFC 1/4] mmc: cqhci: Move CQHCI_ENABLE before setting  TDLBA/TDLBAU Ritesh Harjani <riteshh@codeaurora.org> - 2017-09-02 07:10 +0200
  [RFC 4/4] mmc: sdhci-msm: Handle unexpected interrupt case on enabling legacy IRQs on CQE halt Ritesh Harjani <riteshh@codeaurora.org> - 2017-08-30 15:10 +0200
    Re: [RFC 4/4] mmc: sdhci-msm: Handle unexpected interrupt case on  enabling legacy IRQs on CQE halt Adrian Hunter <adrian.hunter@intel.com> - 2017-08-31 09:50 +0200
      Re: [RFC 4/4] mmc: sdhci-msm: Handle unexpected interrupt case on  enabling legacy IRQs on CQE halt Ritesh Harjani <riteshh@codeaurora.org> - 2017-09-02 07:20 +0200
  Re: [RFC 0/4] mmc: sdhci-msm: Add CQE support for sdhci-msm Adrian Hunter <adrian.hunter@intel.com> - 2017-08-31 10:50 +0200
    Re: [RFC 0/4] mmc: sdhci-msm: Add CQE support for sdhci-msm Ritesh Harjani <riteshh@codeaurora.org> - 2017-09-02 07:20 +0200

csiph-web