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Re: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR

From Peter Zijlstra <peterz@infradead.org>
Newsgroups linux.kernel
Subject Re: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR
Date 2017-08-22 20:30 +0200
Message-ID <uhm66-66D-7@gated-at.bofh.it> (permalink)
References <ufxyG-7o-23@gated-at.bofh.it> <uhkH1-53a-33@gated-at.bofh.it> <uhlD3-5Gr-5@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Tue, Aug 22, 2017 at 05:58:34PM +0000, Liang, Kan wrote:

> It looks there is still one room in cacheline 1.

> > So this is very unfortunate...
> > 
> > struct perf_sample_data {
> >         u64                        addr;                 /*     0     8 */
> >         struct perf_raw_record *   raw;                  /*     8     8 */
> >         struct perf_branch_stack * br_stack;             /*    16     8 */
> >         u64                        period;               /*    24     8 */
> >         u64                        weight;               /*    32     8 */
> >         u64                        txn;                  /*    40     8 */
> >         union perf_mem_data_src    data_src;             /*    48     8 */
> >         u64                        type;                 /*    56     8 */

You mean @type, right? That is unconditionally used by the output code.

> >         /* --- cacheline 1 boundary (64 bytes) --- */
> >         u64                        ip;                   /*    64     8 */
> >         struct {
> >                 u32                pid;                  /*    72     4 */
> >                 u32                tid;                  /*    76     4 */
> >         } tid_entry;                                     /*    72     8 */
> >         u64                        time;                 /*    80     8 */
> >         u64                        id;                   /*    88     8 */
> >         u64                        stream_id;            /*    96     8 */
> >         struct {
> >                 u32                cpu;                  /*   104     4 */
> >                 u32                reserved;             /*   108     4 */
> >         } cpu_entry;                                     /*   104     8 */
> >         struct perf_callchain_entry * callchain;         /*   112     8 */
> >         struct perf_regs           regs_user;            /*   120    16 */
> >         /* --- cacheline 2 boundary (128 bytes) was 8 bytes ago --- */
> >         struct pt_regs             regs_user_copy;       /*   136   168 */
> >         /* --- cacheline 4 boundary (256 bytes) was 48 bytes ago --- */
> >         struct perf_regs           regs_intr;            /*   304    16 */
> >         /* --- cacheline 5 boundary (320 bytes) --- */
> >         u64                        stack_user_size;      /*   320     8 */
> > 
> >         /* size: 384, cachelines: 6, members: 19 */
> >         /* padding: 56 */
> > };

Now, I was hoping, that if you move the entire thing into generic code
(PPC also support PERF_SAMPLE_DATA) then we can avoid the init here and
rely on perf_sample_prepare().

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Thread

[PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR kan.liang@intel.com - 2017-08-17 20:20 +0200
  Re: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR Peter Zijlstra <peterz@infradead.org> - 2017-08-22 19:00 +0200
    RE: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR "Liang, Kan" <kan.liang@intel.com> - 2017-08-22 20:00 +0200
      Re: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR Peter Zijlstra <peterz@infradead.org> - 2017-08-22 20:30 +0200
  Re: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR Peter Zijlstra <peterz@infradead.org> - 2017-08-22 19:10 +0200
    RE: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR "Liang, Kan" <kan.liang@intel.com> - 2017-08-22 19:20 +0200
    Re: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR Andi Kleen <ak@linux.intel.com> - 2017-08-22 19:40 +0200

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