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Groups > linux.kernel > #1717505
| From | Waiman Long <longman@redhat.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs |
| Date | 2017-08-22 17:40 +0200 |
| Message-ID | <uhjrA-4i3-9@gated-at.bofh.it> (permalink) |
| References | (6 earlier) <ueP4B-4UD-7@gated-at.bofh.it> <ugSB5-3kB-39@gated-at.bofh.it> <ugZjc-7Ii-21@gated-at.bofh.it> <uh0yC-8qw-25@gated-at.bofh.it> <uh0RZ-6N-39@gated-at.bofh.it> |
| Organization | Red Hat |
On 08/21/2017 03:42 PM, Peter Zijlstra wrote: > On Mon, Aug 21, 2017 at 09:25:50PM +0200, Peter Zijlstra wrote: >> On Mon, Aug 21, 2017 at 07:00:02PM +0100, Will Deacon wrote: >>>> No, I meant _from_ the LL load, not _to_ a later load. >>> Sorry, I'm still not following enough to give you a definitive answer on >>> that. Could you give an example, please? These sequences usually run in >>> a loop, so the conditional branch back (based on the status flag) is where >>> the read-after-read comes in. >>> >>> Any control dependencies from the loaded data exist regardless of the status >>> flag. >> Basically what Waiman ended up doing, something like: >> >> if (cmpxchg_relaxed(&pn->state, vcpu_halted, vcpu_hashed) != vcpu_halted) >> return; >> >> WRITE_ONCE(l->locked, _Q_SLOW_VAL); >> >> Where the STORE depends on the LL value being 'complete'. >> pn->state == vcpu_halted is the prerequisite of putting _Q_SLOW_VAL into the lock. The order of writing vcpu_hashed into pn->state doesn't really matter. The cmpxchg_relaxed() here should synchronize with the cmpxchg() in pv_wait_node(). Cheers, Longman
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Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Will Deacon <will.deacon@arm.com> - 2017-08-14 14:10 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Waiman Long <longman@redhat.com> - 2017-08-14 17:10 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Will Deacon <will.deacon@arm.com> - 2017-08-14 18:10 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Peter Zijlstra <peterz@infradead.org> - 2017-08-14 20:50 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Will Deacon <will.deacon@arm.com> - 2017-08-15 20:50 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Peter Zijlstra <peterz@infradead.org> - 2017-08-21 13:00 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Will Deacon <will.deacon@arm.com> - 2017-08-21 20:10 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Peter Zijlstra <peterz@infradead.org> - 2017-08-21 21:30 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Peter Zijlstra <peterz@infradead.org> - 2017-08-21 21:50 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Waiman Long <longman@redhat.com> - 2017-08-22 17:40 +0200
Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Will Deacon <will.deacon@arm.com> - 2017-08-22 12:50 +0200
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