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Groups > linux.kernel > #1711145
| From | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 4/5] ARC: AXS103: DTS: Set cpu frequency explicitly via dts |
| Date | 2017-08-14 18:20 +0200 |
| Message-ID | <ueqfV-6mT-41@gated-at.bofh.it> (permalink) |
| References | <ueqfT-6mT-1@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Set cpu frequency explicitly via "cpu-freq" param in cpu 0 node
in device tree.
We add "cpu-freq" only to cpu 0 as all cpus are clocking from same
clock source (same pll in our case).
We override cpus node in skeleton as we don't need this change for
nsim.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
---
arch/arc/boot/dts/axc003.dtsi | 13 +++++++++++++
arch/arc/boot/dts/axc003_idu.dtsi | 35 +++++++++++++++++++++++++++++++++++
2 files changed, 48 insertions(+)
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index dca7e39..7c7411c 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -17,6 +17,19 @@
#address-cells = <2>;
#size-cells = <2>;
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "snps,archs38";
+ reg = <0>;
+ cpu-freq = <100000000>;
+ clocks = <&core_clk>;
+ };
+ };
+
cpu_card {
compatible = "simple-bus";
#address-cells = <1>;
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index 5b56bef..44bc01e 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -17,6 +17,41 @@
#address-cells = <2>;
#size-cells = <2>;
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /*
+ * "cpu-freq" was added only to cpu 0 as all cpus are clocking
+ * from same clock source (same pll (core_clk) in our case).
+ */
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "snps,archs38";
+ reg = <0>;
+ cpu-freq = <100000000>;
+ clocks = <&core_clk>;
+ };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "snps,archs38";
+ reg = <1>;
+ clocks = <&core_clk>;
+ };
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "snps,archs38";
+ reg = <2>;
+ clocks = <&core_clk>;
+ };
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "snps,archs38";
+ reg = <3>;
+ clocks = <&core_clk>;
+ };
+ };
+
cpu_card {
compatible = "simple-bus";
#address-cells = <1>;
--
2.9.3
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[PATCH 0/5] Updates to arc clock tree managment Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> - 2017-08-14 18:20 +0200
[PATCH 2/5] ARC: AXS103: Get rid of platform specific cpu clock configuration Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> - 2017-08-14 18:20 +0200
Re: [PATCH 2/5] ARC: AXS103: Get rid of platform specific cpu clock configuration Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2017-08-22 22:40 +0200
[PATCH 1/5] ARC: set and print cpu frequency at boot time Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> - 2017-08-14 18:20 +0200
[PATCH 3/5] ARC: AXS103: DTS: Add core pll node to manage cpu frequency Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> - 2017-08-14 18:20 +0200
Re: [PATCH 3/5] ARC: AXS103: DTS: Add core pll node to manage cpu frequency Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2017-08-22 22:50 +0200
Re: [PATCH 3/5] ARC: AXS103: DTS: Add core pll node to manage cpu frequency Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2017-08-22 22:50 +0200
Re: [PATCH 3/5] ARC: AXS103: DTS: Add core pll node to manage cpu frequency Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> - 2017-08-23 14:20 +0200
[PATCH 4/5] ARC: AXS103: DTS: Set cpu frequency explicitly via dts Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> - 2017-08-14 18:20 +0200
Re: [PATCH 4/5] ARC: AXS103: DTS: Set cpu frequency explicitly via dts Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2017-08-22 23:50 +0200
Re: [PATCH 4/5] ARC: AXS103: DTS: Set cpu frequency explicitly via dts Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> - 2017-08-23 13:30 +0200
Re: [PATCH 4/5] ARC: AXS103: DTS: Set cpu frequency explicitly via dts Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2017-08-23 18:50 +0200
[PATCH 5/5] ARC: AXS103: use cpu-freq param instead of /cpu_card/core_clk Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> - 2017-08-14 18:20 +0200
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