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Groups > linux.kernel > #1699716
| From | Vivek Gautam <vivek.gautam@codeaurora.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v5 2/7] dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074 |
| Date | 2017-07-31 08:00 +0200 |
| Message-ID | <u9bUf-2kb-13@gated-at.bofh.it> (permalink) |
| References | <u9bKx-2gK-3@gated-at.bofh.it> <u9bKy-2gK-19@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 07/31/2017 11:09 AM, Varadarajan Narayanan wrote: > IPQ8074 uses QMP phy controller that provides support to PCIe and > USB. Adding dt binding information for the same. > > Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> > --- Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> > Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > index 5d7a51f..802af1b 100644 > --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > @@ -6,6 +6,7 @@ controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. > > Required properties: > - compatible: compatible list, contains: > + "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074 > "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996, > "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996. > > @@ -38,6 +39,8 @@ Required properties: > "phy", "common", "cfg". > For "qcom,msm8996-qmp-usb3-phy" must contain > "phy", "common". > + For "qcom,ipq8074-qmp-pcie-phy" must contain: > + "phy", "common". > > - vdda-phy-supply: Phandle to a regulator supply to PHY core block. > - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block. > @@ -63,6 +66,11 @@ Required properties for child node: > - clock-output-names: Name of the phy clock that will be the parent for > the above pipe clock. > > + For "qcom,ipq8074-qmp-pcie-phy": > + - "pcie20_phy0_pipe_clk" Pipe Clock parent > + (or) > + "pcie20_phy1_pipe_clk" > + > - resets: a list of phandles and reset controller specifier pairs, > one for each entry in reset-names. > - reset-names: Must contain following for pcie qmp phys: -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
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[PATCH v5 0/7] Add support for IPQ8074 PCIe phy and controller Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-31 07:50 +0200
[PATCH v5 1/7] dt-bindings: phy: qmp: Add output-clock-names Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-31 07:50 +0200
[PATCH v5 2/7] dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074 Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-31 07:50 +0200
Re: [PATCH v5 2/7] dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074 Vivek Gautam <vivek.gautam@codeaurora.org> - 2017-07-31 08:00 +0200
[PATCH v5 4/7] phy: qcom-qmp: Add support for IPQ8074 Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-31 07:50 +0200
[PATCH v5 6/7] dt-bindings: pci: qcom: Add support for IPQ8074 Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-31 07:50 +0200
[PATCH v5 3/7] phy: qcom-qmp: Fix phy pipe clock name Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-31 07:50 +0200
Re: [PATCH v5 3/7] phy: qcom-qmp: Fix phy pipe clock name Vivek Gautam <vivek.gautam@codeaurora.org> - 2017-07-31 08:00 +0200
[PATCH v5 5/7] PCI: dwc: qcom: Use block IP version for operations Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-31 07:50 +0200
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