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[PATCH 26/32] dt-bindings: phy: Add support for QUSB2 phy

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From: Vivek Gautam <vivek.gautam@codeaurora.org>

Qualcomm chipsets have QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller.
Adding dt binding information for the same.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 .../devicetree/bindings/phy/qcom-qusb2-phy.txt     | 43 ++++++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt

diff --git a/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
new file mode 100644
index 000000000000..aa0fcb05acb3
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
@@ -0,0 +1,43 @@
+Qualcomm QUSB2 phy controller
+=============================
+
+QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
+
+Required properties:
+ - compatible: compatible list, contains "qcom,msm8996-qusb2-phy".
+ - reg: offset and length of the PHY register set.
+ - #phy-cells: must be 0.
+
+ - clocks: a list of phandles and clock-specifier pairs,
+	   one for each entry in clock-names.
+ - clock-names: must be "cfg_ahb" for phy config clock,
+			"ref" for 19.2 MHz ref clk,
+			"iface" for phy interface clock (Optional).
+
+ - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
+ - vdda-phy-dpdm-supply: Phandle to 3.1V regulator supply to Dp/Dm port signals.
+
+ - resets: Phandle to reset to phy block.
+
+Optional properties:
+ - nvmem-cells: Phandle to nvmem cell that contains 'HS Tx trim'
+		tuning parameter value for qusb2 phy.
+
+ - qcom,tcsr-syscon: Phandle to TCSR syscon register region.
+
+Example:
+	hsusb_phy: phy@7411000 {
+		compatible = "qcom,msm8996-qusb2-phy";
+		reg = <0x7411000 0x180>;
+		#phy-cells = <0>;
+
+		clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+			<&gcc GCC_RX1_USB2_CLKREF_CLK>,
+		clock-names = "cfg_ahb", "ref";
+
+		vdda-pll-supply = <&pm8994_l12>;
+		vdda-phy-dpdm-supply = <&pm8994_l24>;
+
+		resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+		nvmem-cells = <&qusb2p_hstx_trim>;
+        };
-- 
2.11.0

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[GIT PULL] phy: for 4.12 Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 02/32] phy: phy-exynos-pcie: make it explicitly non-modular Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 08/32] phy: meson8b-usb2: fix offsets for some of the registers Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 05/32] phy: sun4i-usb: change PHYCTL register clearing code Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 04/32] dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64 Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 20/32] phy: phy-mt65xx-usb3: add support for new version phy Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 10/32] phy: exynos5: Remove duplicated defines of PHY register defines Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 09/32] phy: exynos4: Remove duplicated defines of PHY register defines Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 24/32] dt-bindings: add DT bindings for usb2-phy grf Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 29/32] phy: qcom-qmp: new qmp phy driver for qcom-chipsets Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:20 +0200
  [PATCH 31/32] phy: rockchip-usb: Add vbus regulator support. Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 27/32] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 15/32] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 13/32] phy: rockchip-inno-usb2: fix spelling mistake: "connecetd" -> "connected" Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 03/32] mfd: exynos-lpass: Use common soc/exynos-regs-pmu.h header Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 19/32] phy: phy-mt65xx-usb3: move clock from phy node into port nodes Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 30/32] phy: bcm-ns-usb3: split all writes into reg & val pairs Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 32/32] phy: qcom-qusb2: add NVMEM dependency Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 17/32] phy: phy-mt65xx-usb3: increase LFPS filter threshold Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 07/32] phy: sun4i-usb: support automatically switch PHY0 route to MUSB/HCI Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 26/32] dt-bindings: phy: Add support for QUSB2 phy Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 18/32] phy: phy-mt65xx-usb3: split SuperSpeed port into two ones Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 14/32] phy: rcar-gen3-usb2: fix implementation for runtime PM Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 06/32] phy: sun4i-usb: add PHYCTL offset for H3 SoC Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 21/32] phy: phy-mt65xx-usb3: disable 100uA extraction from SS port to HS port Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 28/32] dt-bindings: phy: Add support for QMP phy Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 22/32] dt-bindings: phy-mt65xx-usb: add support for new version phy Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  [PATCH 01/32] mfd: exynos-lpass: Use common soc/exynos-regs-pmu.h header Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
    Re: [PATCH 01/32] mfd: exynos-lpass: Use common  soc/exynos-regs-pmu.h header Lee Jones <lee.jones@linaro.org> - 2017-04-11 16:20 +0200
      Re: [PATCH 01/32] mfd: exynos-lpass: Use common soc/exynos-regs-pmu.h  header Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-11 16:30 +0200
        Re: [PATCH 01/32] mfd: exynos-lpass: Use common  soc/exynos-regs-pmu.h header Lee Jones <lee.jones@linaro.org> - 2017-04-11 18:40 +0200
          Re: [PATCH 01/32] mfd: exynos-lpass: Use common soc/exynos-regs-pmu.h  header Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-12 07:30 +0200
            Re: [PATCH 01/32] mfd: exynos-lpass: Use common  soc/exynos-regs-pmu.h header Lee Jones <lee.jones@linaro.org> - 2017-04-12 10:00 +0200
      Re: [PATCH 01/32] mfd: exynos-lpass: Use common  soc/exynos-regs-pmu.h header Greg KH <gregkh@linuxfoundation.org> - 2017-04-11 16:30 +0200
  [PATCH 25/32] phy: rockchip-inno-usb2: add support of usb2-phy for rk3328 Kishon Vijay Abraham I <kishon@TI.COM> - 2017-04-10 15:30 +0200
  [PATCH 23/32] dt-bindings: phy-rockchip-inno-usb2: add assign clock property in usb2-phy node Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-10 15:30 +0200
  Re: [GIT PULL] phy: for 4.12 Greg KH <gregkh@linuxfoundation.org> - 2017-04-10 15:50 +0200

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