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Groups > linux.kernel > #1611824
| From | Icenowy Zheng <icenowy@aosc.io> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 3/5] arm64: allwinner: a64: add r_ccu node |
| Date | 2017-03-29 13:10 +0200 |
| Message-ID | <tqjEd-60u-1@gated-at.bofh.it> (permalink) |
| References | <tqjkR-5EX-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Icenowy Zheng <icenowy@aosc.xyz>
A64 SoC have a CCU (r_ccu) in PRCM block.
Add the device node for it.
The mux 3 of R_CCU is an internal oscillator, which is 16MHz according
to the user manual, and has only 30% accuracy based on our experience
on older SoCs. The real mesaured value of it on two Pine64 boards is
around 11MHz, which is around 70% of 16MHz.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
Changes in v3:
- Change osc32000 to iosc, which is 16MHz plus minus 30%, according to the
RTC chapter of the user manual and our experiences on A33.
Changes in v2:
- Add osc32000.
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1c64ea2d23f9..0fe9865d4bd6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -43,8 +43,10 @@
*/
#include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h>
+#include <dt-bindings/reset/sun8i-r-ccu.h>
/ {
interrupt-parent = <&gic>;
@@ -98,6 +100,14 @@
clock-output-names = "osc32k";
};
+ iosc: internal-osc-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <16000000>;
+ clock-accuracy = <300000000>;
+ clock-output-names = "iosc";
+ };
+
psci {
compatible = "arm,psci-0.2";
method = "smc";
@@ -392,5 +402,14 @@
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ r_ccu: clock@1f01400 {
+ compatible = "allwinner,sun50i-a64-r-ccu";
+ reg = <0x01f01400 0x100>;
+ clocks = <&osc24M>, <&osc32k>, <&iosc>;
+ clock-names = "hosc", "losc", "iosc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
};
};
--
2.12.0
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[PATCH v3 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs Icenowy Zheng <icenowy@aosc.io> - 2017-03-29 12:50 +0200
[PATCH v3 2/5] clk: sunxi-ng: add support for PRCM CCUs Icenowy Zheng <icenowy@aosc.io> - 2017-03-29 12:50 +0200
Re: [PATCH v3 2/5] clk: sunxi-ng: add support for PRCM CCUs Icenowy Zheng <icenowy@aosc.io> - 2017-03-29 17:40 +0200
[PATCH v3 1/5] dt-bindings: update device tree binding for Allwinner PRCM CCUs Icenowy Zheng <icenowy@aosc.io> - 2017-03-29 12:50 +0200
Re: [PATCH v3 1/5] dt-bindings: update device tree binding for Allwinner PRCM CCUs Rob Herring <robh@kernel.org> - 2017-04-03 17:00 +0200
[PATCH v3 3/5] arm64: allwinner: a64: add r_ccu node Icenowy Zheng <icenowy@aosc.io> - 2017-03-29 13:10 +0200
[PATCH v3 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu Icenowy Zheng <icenowy@aosc.io> - 2017-03-29 13:30 +0200
[PATCH v3 5/5] arm64: allwinner: a64: add R_PIO pinctrl node Icenowy Zheng <icenowy@aosc.io> - 2017-03-29 13:50 +0200
Re: [PATCH v3 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-04-02 18:10 +0200
Re: [PATCH v3 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs Icenowy Zheng <icenowy@aosc.io> - 2017-04-02 18:40 +0200
Re: [PATCH v3 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-04-03 09:40 +0200
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