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Re: [PATCH v3 0/3] perf/sdt: Hardening argument support

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Hi Arnaldo,

please pull this, I've already acked to this series.

Thank you, 

On Tue, 28 Mar 2017 15:17:51 +0530
Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> wrote:

> SDT event argument support on x86 is recently added to Perf. But
> there are couple of issues with it.
> 
> It lacks renaming mapping for few 8 bit registers: al, bl, cl, dl,
> ah, bh, ch and dh. SDT events using these registers in arguments
> are failing at 'perf probe'. Add renaming logic to them. (patch 1)
> 
> It still has x86 specific code in general code. It also fails to
> convert arguments having no offset but still surrounds register with
> parenthesis for ex. 8@(%rdi) is converted to +(%di):u64, which is
> rejected by uprobe_events. Also, 'perf probe' is failing for *all SDT
> events on all archs except x86*. Solve these issues. (patch 2)
> 
> Add argument parser for powerpc. (patch 3)
> 
> Changes in v3:
>   - (patch 1) Add renaming entries for ah, bh, ch and dh registers.[1]
> 
>   - (patch 1) v2 contains silly copy-paste error. It maps all al, bl...
>     registers to ax. Fix that.
> 
>   - (patch 2) Fix typo 'constant'.
> 
>   - Patch 2 is not applying cleanly on top of patch 1 after adding
>     ah, bh... registers. Fix that.
> 
> v2: https://lkml.org/lkml/2017/3/27/118
> 
> This patch is prepared on top of acme/perf/core.
> 
> [1] https://lkml.org/lkml/2017/3/27/462
> 
> Ravi Bangoria (3):
>   perf/sdt/x86: Add renaming logic for (missing) 8 bit registers
>   perf/sdt/x86: Move OP parser to tools/perf/arch/x86/
>   perf/sdt/powerpc: Add argument support
> 
>  tools/perf/arch/powerpc/util/perf_regs.c | 111 ++++++++++++++++++
>  tools/perf/arch/x86/util/perf_regs.c     | 187 +++++++++++++++++++++++++------
>  tools/perf/util/perf_regs.c              |   6 +-
>  tools/perf/util/perf_regs.h              |  11 +-
>  tools/perf/util/probe-file.c             | 132 +++++++---------------
>  5 files changed, 313 insertions(+), 134 deletions(-)
> 
> -- 
> 2.9.3
> 


-- 
Masami Hiramatsu <mhiramat@kernel.org>

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[PATCH v3 0/3] perf/sdt: Hardening argument support Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> - 2017-03-28 13:10 +0200
  [PATCH v3 3/3] perf/sdt/powerpc: Add argument support Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> - 2017-03-28 14:10 +0200
    [tip:perf/core] perf sdt powerpc: Add argument support tip-bot for Ravi Bangoria <tipbot@zytor.com> - 2017-04-05 08:00 +0200
  [PATCH v3 2/3] perf/sdt/x86: Move OP parser to tools/perf/arch/x86/ Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> - 2017-03-28 15:40 +0200
    [tip:perf/core] perf/sdt/x86: Move OP parser to  tools/perf/arch/x86/ tip-bot for Ravi Bangoria <tipbot@zytor.com> - 2017-04-02 21:20 +0200
  [PATCH v3 1/3] perf/sdt/x86: Add renaming logic for (missing) 8 bit registers Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> - 2017-03-28 16:00 +0200
    [tip:perf/core] perf/sdt/x86: Add renaming logic for (missing) 8  bit registers tip-bot for Ravi Bangoria <tipbot@zytor.com> - 2017-04-02 21:20 +0200
  Re: [PATCH v3 0/3] perf/sdt: Hardening argument support Masami Hiramatsu <mhiramat@kernel.org> - 2017-03-28 17:40 +0200
    Re: [PATCH v3 0/3] perf/sdt: Hardening argument support Arnaldo Carvalho de Melo <acme@redhat.com> - 2017-03-28 17:50 +0200
      Re: [PATCH v3 0/3] perf/sdt: Hardening argument support Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> - 2017-04-01 08:30 +0200

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