RE: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI

From	"Liang, Kan" <kan.liang@intel.com>
Newsgroups	linux.kernel
Subject	RE: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI
Date	2017-03-24 15:20 +0100
Message-ID	<toyem-2LK-29@gated-at.bofh.it> (permalink)
References	<tofOp-6a9-23@gated-at.bofh.it> <tofOq-6a9-27@gated-at.bofh.it> <tohGx-7w7-3@gated-at.bofh.it> <tosVk-7gO-19@gated-at.bofh.it>
Organization	linux.* mail to news gateway

Show all headers | View raw


> On Thu, 23 Mar 2017, Peter Zijlstra wrote:
> > On Thu, Mar 23, 2017 at 11:25:49AM -0700, kan.liang@intel.com wrote:
> > > +	for_each_possible_cpu(cpu) {
> > > +		rdmsrl_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR,
> &debugctlmsr);
> > > +		if (val)
> > > +			wrmsrl_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR,
> debugctlmsr | DEBUGCTLMSR_FREEZE_WHILE_SMM);
> > > +		else
> > > +			wrmsrl_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR,
> debugctlmsr & ~DEBUGCTLMSR_FREEZE_WHILE_SMM);
> > > +	}
> >
> > No; that's just disgusting. Also {rd,wr}msr_on_cpu() should die,
> > exactly because people end up writing crap like this.
> 
> Aside of that this is completely broken against other users of
> DEBUGCTLMSR because it's not atomic vs. the other modifications.
> 

OK. I will change it.
I guess I need a way/function which can atomically rd,wr msr on all cpus.
Are there existing alternative ways/functions to do that?

Thanks,
Kan

Thread

[PATCH 0/3]measure SMI cost kan.liang@intel.com - 2017-03-23 19:40 +0100
  [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI kan.liang@intel.com - 2017-03-23 19:40 +0100
    Re: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI Peter Zijlstra <peterz@infradead.org> - 2017-03-23 21:40 +0100
      Re: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI Thomas Gleixner <tglx@linutronix.de> - 2017-03-24 09:40 +0100
        RE: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI "Liang, Kan" <kan.liang@intel.com> - 2017-03-24 15:20 +0100
          Re: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI Peter Zijlstra <peterz@infradead.org> - 2017-03-24 15:30 +0100
    Re: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI Peter Zijlstra <peterz@infradead.org> - 2017-03-23 21:40 +0100
      RE: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI "Liang, Kan" <kan.liang@intel.com> - 2017-03-23 21:50 +0100
      Re: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI Andi Kleen <ak@linux.intel.com> - 2017-03-23 23:30 +0100
        Re: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI Peter Zijlstra <peterz@infradead.org> - 2017-03-24 09:20 +0100
  [PATCH 3/3] perf stat: Add support to measure SMI cost kan.liang@intel.com - 2017-03-23 19:40 +0100
  Re: [PATCH 0/3]measure SMI cost Thomas Gleixner <tglx@linutronix.de> - 2017-03-24 09:50 +0100
    Re: [PATCH 0/3]measure SMI cost Andi Kleen <ak@linux.intel.com> - 2017-03-24 12:50 +0100
      Re: [PATCH 0/3]measure SMI cost Thomas Gleixner <tglx@linutronix.de> - 2017-03-24 13:10 +0100
        RE: [PATCH 0/3]measure SMI cost "Liang, Kan" <kan.liang@intel.com> - 2017-03-24 15:20 +0100

csiph-web