Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1606880

RE: [PATCH v2 0/7] Renesas RZ/A1 pin and gpio controller

From Chris Brandt <Chris.Brandt@renesas.com>
Newsgroups linux.kernel
Subject RE: [PATCH v2 0/7] Renesas RZ/A1 pin and gpio controller
Date 2017-03-22 19:20 +0100
Message-ID <tnT1w-6Ex-9@gated-at.bofh.it> (permalink)
References <tn8lY-7kZ-19@gated-at.bofh.it>
Organization linux.* mail to news gateway

Show all headers | View raw


Hi Jacopo,

On Monday, March 20, 2017, Jacopo Mondi wrote:
> Chris: it would be great if you could give this another spin on RSK board.


I tested these patches on an RZ/A1H RSK board after modifying the DT for
the RSK vs the GENMAI board.

The following worked fine:
 * SCIF
 * I2C
 * SDHI
 * Ethernet

I see Geert has already responded with mostly text (grammar) changes.
As for the "API" of the driver from a user perspective, I think it should
cover all the use cases of the peripherals.


For your reference, here was my pin config for the RSK board testing. Once
this driver is (hopefully) accepted, I will update the upstream rskrza1 DT. 


--- RSK BOARD PIN SETUP ---

&pinctrl {

	scif2_pins: serial2 {
		/* P3_0 as TxD2; P3_2 as RxD2 */
		renesas,pins = <PIN(3, 0) 6>,
			       <PIN(3, 2) 4>;
	};

	/* RIIC Ch 3 */
	i2c3_pins: i2c3 {
		/* RIIC3: P1_6 as SCL, P1_7 as SDA */
		renesas,pins = <PIN(1, 6) (1 | BI_DIR)>,
			       <PIN(1, 7) (1 | BI_DIR)>;
	};

	/* SHDI ch1 on CN1 */
	sdhi1_pins: sdhi1 {
		/* SHDI ch1 on Port 3 */
		renesas,pins = <PIN(3, 8) (7)>,		/* SDHI1 CD */
				<PIN(3, 9) (7)>,		/* SDHI1 WP */
				<PIN(3, 10) (7 | BI_DIR)>,	/* SDHI1 DAT1 */
				<PIN(3, 11) (7 | BI_DIR)>,	/* SDHI1 DAT0 */
				<PIN(3, 12) (7)>,		/* SDHI1 CLK */
				<PIN(3, 13) (7 | BI_DIR)>,	/* SDHI1 CMD */
				<PIN(3, 14) (7 | BI_DIR)>,	/* SDHI1 DAT3 */
				<PIN(3, 15) (7 | BI_DIR)>;	/* SDHI1 DAT2 */
	};

	/* Ethernet */
	ether_pins: ether {
		/* Ethernet on Ports 1,2,3,5 */
		renesas,pins = <PIN(1, 14) (4)>, /* P1_14 = ET_COL */
			<PIN(5, 9) (2)>,	/* P5_9 = ET_MDC */
			<PIN(3, 3) (2 | BI_DIR)>,	/* P3_3 = ET_MDIO (bi dir) */
			<PIN(3, 4) (2)>,	/* P3_4 = ET_RXCLK */
			<PIN(3, 5) (2)>,	/* P3_5 = ET_RXER */
			<PIN(3, 6) (2)>,	/* P3_6 = ET_RXDV */
			<PIN(2, 0) (2)>,	/* P2_0 = ET_TXCLK */
			<PIN(2, 1) (2)>,	/* P2_1 = ET_TXER */
			<PIN(2, 2) (2)>,	/* P2_2 = ET_TXEN */
			<PIN(2, 3) (2)>,	/* P2_3 = ET_CRS */
			<PIN(2, 4) (2)>,	/* P2_4 = ET_TXD0 */
			<PIN(2, 5) (2)>,	/* P2_5 = ET_TXD1 */
			<PIN(2, 6) (2)>,	/* P2_6 = ET_TXD2 */
			<PIN(2, 7) (2)>,	/* P2_7 = ET_TXD3 */
			<PIN(2, 8) (2)>,	/* P2_8 = ET_RXD0 */
			<PIN(2, 9) (2)>,	/* P2_9 = ET_RXD1 */
			<PIN(2, 10) (2)>, /* P2_10 = ET_RXD2 */
			<PIN(2, 11) (2)>; /* P2_11 = ET_RXD3 */
	};
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
};

&scif2 {
	pinctrl-names = "default";
	pinctrl-0 = <&scif2_pins>;
};

&sdhi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&sdhi1_pins>;
};

&ether {
	pinctrl-names = "default";
	pinctrl-0 = <&ether_pins>;
};

/ {
	leds {
		status = "okay";
		compatible = "gpio-leds";

		led1 {
			gpios = <&port7 1 GPIO_ACTIVE_LOW>;
		};
	};
};



Thank you,
Chris

Back to linux.kernel | Previous | NextPrevious in thread | Find similar | Unroll thread


Thread

[PATCH v2 0/7] Renesas RZ/A1 pin and gpio controller Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-03-20 17:30 +0100
  [PATCH v2 6/7] arm: dts: genmai: Add RIIC2 pin group Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-03-20 17:30 +0100
    Re: [PATCH v2 6/7] arm: dts: genmai: Add RIIC2 pin group Geert Uytterhoeven <geert@linux-m68k.org> - 2017-03-22 14:20 +0100
  [PATCH v2 7/7] arm: dts: genmai: Add user led device nodes Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-03-20 17:30 +0100
    Re: [PATCH v2 7/7] arm: dts: genmai: Add user led device nodes Geert Uytterhoeven <geert@linux-m68k.org> - 2017-03-22 14:30 +0100
  [PATCH v2 1/7] pinctrl: Renesas RZ/A1 pin and gpio controller Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-03-20 17:50 +0100
    Re: [PATCH v2 1/7] pinctrl: Renesas RZ/A1 pin and gpio controller Geert Uytterhoeven <geert@linux-m68k.org> - 2017-03-22 11:30 +0100
      Re: [PATCH v2 1/7] pinctrl: Renesas RZ/A1 pin and gpio controller jacopo <jacopo@jmondi.org> - 2017-03-23 15:30 +0100
  [PATCH v2 4/7] arm: dts: r7s72100: Add pin controller node Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-03-20 17:50 +0100
    Re: [PATCH v2 4/7] arm: dts: r7s72100: Add pin controller node Geert Uytterhoeven <geert@linux-m68k.org> - 2017-03-22 14:20 +0100
      Re: [PATCH v2 4/7] arm: dts: r7s72100: Add pin controller node jacopo <jacopo@jmondi.org> - 2017-03-23 17:20 +0100
  [PATCH v2 3/7] arm: dts: dt-bindings: Add Renesas RZ pinctrl header Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-03-20 18:00 +0100
    Re: [PATCH v2 3/7] arm: dts: dt-bindings: Add Renesas RZ pinctrl header Geert Uytterhoeven <geert@linux-m68k.org> - 2017-03-22 11:40 +0100
  [PATCH v2 5/7] arm: dts: genmai: Add SCIF2 pin group Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-03-20 18:00 +0100
    Re: [PATCH v2 5/7] arm: dts: genmai: Add SCIF2 pin group Geert Uytterhoeven <geert@linux-m68k.org> - 2017-03-22 14:20 +0100
  [PATCH v2 2/7] dt-bindings: pinctrl: Add RZ/A1 bindings doc Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-03-20 18:30 +0100
    Re: [PATCH v2 2/7] dt-bindings: pinctrl: Add RZ/A1 bindings doc Geert Uytterhoeven <geert@linux-m68k.org> - 2017-03-22 11:40 +0100
      Re: [PATCH v2 2/7] dt-bindings: pinctrl: Add RZ/A1 bindings doc Geert Uytterhoeven <geert@linux-m68k.org> - 2017-03-22 14:30 +0100
        Re: [PATCH v2 2/7] dt-bindings: pinctrl: Add RZ/A1 bindings doc jacopo <jacopo@jmondi.org> - 2017-03-22 16:40 +0100
          Re: [PATCH v2 2/7] dt-bindings: pinctrl: Add RZ/A1 bindings doc Geert Uytterhoeven <geert@linux-m68k.org> - 2017-03-22 17:00 +0100
      Re: [PATCH v2 2/7] dt-bindings: pinctrl: Add RZ/A1 bindings doc jacopo <jacopo@jmondi.org> - 2017-03-23 17:10 +0100
  RE: [PATCH v2 0/7] Renesas RZ/A1 pin and gpio controller Chris Brandt <Chris.Brandt@renesas.com> - 2017-03-22 19:20 +0100

csiph-web