Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata

Path	csiph.com!aioe.org!bofh.it!news.nic.it!robomod
From	Thomas Gleixner <tglx@linutronix.de>
Newsgroups	linux.kernel
Subject	Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata
Date	Sat, 11 Mar 2017 08:50:01 +0100
Message-ID	<tjJWN-83e-1@gated-at.bofh.it> (permalink)
References	<tbWHv-8v1-5@gated-at.bofh.it> <tbWHw-8v1-7@gated-at.bofh.it> <tgd73-47I-5@gated-at.bofh.it> <tjgi6-45M-13@gated-at.bofh.it> <tjqr8-2Qu-25@gated-at.bofh.it> <tjxsC-7NS-25@gated-at.bofh.it> <tjxVD-80K-1@gated-at.bofh.it> <tjATw-1Jy-7@gated-at.bofh.it>
X-Original-To	"Luck, Tony" <tony.luck@intel.com>
User-Agent	Alpine 2.20 (DEB 67 2015-01-07)
MIME-Version	1.0
Content-Type	text/plain; charset=US-ASCII
Sender	robomod@news.nic.it
List-ID	<linux-kernel.vger.kernel.org>
X-Mailing-List	linux-kernel@vger.kernel.org
Approved	robomod@news.nic.it
Lines	49
Organization	linux.* mail to news gateway
X-Original-Cc	Shivappa Vikas <vikas.shivappa@intel.com>, Shivappa Vikas <vikas.shivappa@linux.intel.com>, linux-kernel@vger.kernel.org, x86@kernel.org, hpa@zytor.com, mingo@kernel.org, peterz@infradead.org, ravi.v.shankar@intel.com, fenghua.yu@intel.com, andi.kleen@intel.com
X-Original-Date	Sat, 11 Mar 2017 08:47:37 +0100 (CET)
X-Original-Message-ID	<alpine.DEB.2.20.1703110847100.4213@nanos>
X-Original-References	<1487360328-6768-1-git-send-email-vikas.shivappa@linux.intel.com> <1487360328-6768-3-git-send-email-vikas.shivappa@linux.intel.com> <alpine.DEB.2.20.1703011431480.4005@nanos> <alpine.DEB.2.10.1703091601480.5245@vshiva-Udesk> <alpine.DEB.2.20.1703101150160.3681@nanos> <alpine.DEB.2.10.1703101020540.5245@vshiva-Udesk> <alpine.DEB.2.20.1703101952040.3723@nanos> <20170310220550.GA22430@intel.com>
X-Original-Sender	linux-kernel-owner@vger.kernel.org
Xref	csiph.com linux.kernel:1598285

Show key headers only | View raw

On Fri, 10 Mar 2017, Luck, Tony wrote:
> On Fri, Mar 10, 2017 at 07:58:51PM +0100, Thomas Gleixner wrote:
> > Well, we have several options to tackle this:
> > 
> > 1) Have schemata files for each resource
> > 
> >    schemata_l2, _l3 _mb
> > 
> > 2) Request a full overwrite every time (all entries required)
> > 
> >    That still does not require ordering
> > 
> > 3) Allow full overwrite and 'append' mode
> > 
> >    echo "...." > schemata
> > 
> >    Overwrites the whole file. It does not require all entries to be
> >    supplied.  Non supplied entries are reset to default
> > 
> >    echo "...." >> schemata
> > 		 
> >    "Appends" the supplied entries by overwriting the existing ones.
> > 
> > My favourite would be #1, but I have no strong opinions other than not
> > caring about resource write ordering for #2 and #3.
> 
> If you are going to head in the direction of partial update, then
> why not go for:
> 
> 4) Drop the code that check that the user wrote all
>    the fields as well as the check for all the lines. Just update
>    the bits they list, and leave the rest unchanged.
> 
> I.e. the user could say:
> 
> # echo "L3:1=0x3f" > schemata
> 
> if they just wanted to update resource L3, instance 1.

Even better

> I don't think there is much benefit to the overwrite vs. append
> semantics for the user.

Agreed.

Thanks,

	tglx

Back to linux.kernel | Previous | Next — Previous in thread | Find similar | Unroll thread

Thread

Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata Thomas Gleixner <tglx@linutronix.de> - 2017-03-01 15:10 +0100
  Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata Shivappa Vikas <vikas.shivappa@linux.intel.com> - 2017-03-10 01:10 +0100
    Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata Thomas Gleixner <tglx@linutronix.de> - 2017-03-10 12:00 +0100
      Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata Shivappa Vikas <vikas.shivappa@intel.com> - 2017-03-10 19:30 +0100
        Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata Thomas Gleixner <tglx@linutronix.de> - 2017-03-10 20:00 +0100
          Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata "Luck, Tony" <tony.luck@intel.com> - 2017-03-10 23:10 +0100
            Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata Thomas Gleixner <tglx@linutronix.de> - 2017-03-11 08:50 +0100

csiph-web