Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1595916
| From | Jerome Brunet <jbrunet@baylibre.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 2/9] clk: meson: add missing const qualifiers on gate arrays |
| Date | 2017-03-09 12:00 +0100 |
| Message-ID | <tj3XB-43h-23@gated-at.bofh.it> (permalink) |
| References | <tj3NT-3XL-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/clk/meson/gxbb.c | 2 +-
drivers/clk/meson/meson8b.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 1c1ec137a3cc..c063287bb0ed 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -816,7 +816,7 @@ static struct meson_clk_mpll *const gxbb_clk_mplls[] = {
&gxbb_mpll2,
};
-static struct clk_gate *gxbb_clk_gates[] = {
+static struct clk_gate *const gxbb_clk_gates[] = {
&gxbb_clk81,
&gxbb_ddr,
&gxbb_dos,
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 888494d4fb8a..d1cc4d7cc8ff 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -501,7 +501,7 @@ static struct meson_clk_pll *const meson8b_clk_plls[] = {
&meson8b_sys_pll,
};
-static struct clk_gate *meson8b_clk_gates[] = {
+static struct clk_gate *const meson8b_clk_gates[] = {
&meson8b_clk81,
&meson8b_ddr,
&meson8b_dos,
--
2.9.3
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH v2 0/9] clk: meson: update clock controller for audio support Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 11:50 +0100 [PATCH v2 1/9] clk: meson: fix SET_PARM macro Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 11:50 +0100 [PATCH v2 7/9] clk: meson8b: add the mplls clocks 0, 1 and 2 Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 12:00 +0100 [PATCH v2 4/9] clk: gxbb: put dividers and muxes in tables Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 12:00 +0100 [PATCH v2 5/9] clk: meson: mpll: add rw operation Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 12:00 +0100 [PATCH v2 2/9] clk: meson: add missing const qualifiers on gate arrays Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 12:00 +0100 [PATCH v2 6/9] clk: meson: gxbb: mpll: use rw operation Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 12:00 +0100 [PATCH v2 8/9] clk: meson: mpll: correct N2 maximum value Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 12:00 +0100 [PATCH v2 9/9] dt-bindings: clk: gxbb: expose i2s output clock gates Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 12:00 +0100 [PATCH v2 3/9] clk: meson8b: put dividers and muxes in tables Jerome Brunet <jbrunet@baylibre.com> - 2017-03-09 12:00 +0100 Re: [PATCH v2 0/9] clk: meson: update clock controller for audio support Kevin Hilman <khilman@baylibre.com> - 2017-03-11 01:40 +0100
csiph-web