Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1593369
| From | "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCHv4 01/33] x86/cpufeature: Add 5-level paging detection |
| Date | 2017-03-06 15:10 +0100 |
| Message-ID | <ti1uP-Rx-51@gated-at.bofh.it> (permalink) |
| References | <ti1l7-yB-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Look for 'la57' in /proc/cpuinfo to see if your machine supports 5-level paging. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> --- arch/x86/include/asm/cpufeatures.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 4e7772387c6e..b04bb6dfed7f 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -289,7 +289,8 @@ #define X86_FEATURE_PKU (16*32+ 3) /* Protection Keys for Userspace */ #define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */ #define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */ -#define X86_FEATURE_RDPID (16*32+ 22) /* RDPID instruction */ +#define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */ +#define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */ /* AMD-defined CPU features, CPUID level 0x80000007 (ebx), word 17 */ #define X86_FEATURE_OVERFLOW_RECOV (17*32+0) /* MCA overflow recovery support */ -- 2.11.0
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCHv4 00/33] 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 01/33] x86/cpufeature: Add 5-level paging detection "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 14/33] x86/kexec: support p4d_t "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 18/33] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
Re: [PATCHv4 18/33] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d Boris Ostrovsky <boris.ostrovsky@oracle.com> - 2017-03-06 21:50 +0100
Re: [PATCHv4 18/33] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-03-07 14:10 +0100
Re: [PATCHv4 18/33] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d Boris Ostrovsky <boris.ostrovsky@oracle.com> - 2017-03-07 19:20 +0100
Re: [Xen-devel] [PATCHv4 18/33] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d Andrew Cooper <andrew.cooper3@citrix.com> - 2017-03-07 19:30 +0100
Re: [Xen-devel] [PATCHv4 18/33] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d Boris Ostrovsky <boris.ostrovsky@oracle.com> - 2017-03-07 20:30 +0100
[PATCHv4 30/33] x86/mm: make kernel_physical_mapping_init() support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 21/33] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 08/33] x86: basic changes into headers for 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 16/33] x86/mm/pat: handle additional page table "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 05/33] asm-generic: introduce <asm-generic/pgtable-nop4d.h> "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 15/33] x86/efi: handle p4d in EFI pagetables "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 19/33] x86: convert the rest of the code to support p4d_t "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 20/33] x86: detect 5-level paging support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 07/33] mm: introduce __p4d_alloc() "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 27/33] x86/espfix: support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 13/33] x86/power: support p4d_t in hibernate code "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:10 +0100
[PATCHv4 02/33] asm-generic: introduce 5level-fixup.h "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-06 15:20 +0100
Re: [PATCHv4 00/33] 5-level paging Linus Torvalds <torvalds@linux-foundation.org> - 2017-03-06 19:40 +0100
Re: [PATCHv4 00/33] 5-level paging Thomas Gleixner <tglx@linutronix.de> - 2017-03-06 19:50 +0100
Re: [PATCHv4 00/33] 5-level paging Linus Torvalds <torvalds@linux-foundation.org> - 2017-03-06 20:10 +0100
Re: [PATCHv4 00/33] 5-level paging "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-03-06 20:10 +0100
Re: [PATCHv4 00/33] 5-level paging Linus Torvalds <torvalds@linux-foundation.org> - 2017-03-06 20:50 +0100
Re: [PATCHv4 00/33] 5-level paging Stephen Rothwell <sfr@canb.auug.org.au> - 2017-03-07 02:30 +0100
Re: [PATCHv4 00/33] 5-level paging Thomas Gleixner <tglx@linutronix.de> - 2017-03-07 11:20 +0100
csiph-web