[PATCH v4 3/4] fpga dt: bindings for Altera Partial Reconfiguration IP.

From	matthew.gerlach@linux.intel.com
Newsgroups	linux.kernel
Subject	[PATCH v4 3/4] fpga dt: bindings for Altera Partial Reconfiguration IP.
Date	2017-03-02 17:10 +0100
Message-ID	<tgBsJ-4MC-3@gated-at.bofh.it> (permalink)
References	<tgBsJ-4MC-5@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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From: Matthew Gerlach <matthew.gerlach@linux.intel.com>

Device Tree bindings for Altera Partial Reconfiguration IP.

v3: s/altr,pr-ip/altr,a10-pr-ip/
v2: s/Reconfiguraion/Reconfiguration/
====================

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
---
 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt

diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
new file mode 100644
index 0000000..52a294c
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
@@ -0,0 +1,12 @@
+Altera Arria10 Partial Reconfiguration IP
+
+Required properties:
+- compatible : should contain "altr,a10-pr-ip"
+- reg        : base address and size for memory mapped io.
+
+Example:
+
+	fpga_mgr: fpga-mgr@ff20c000 {
+		compatible = "altr,a10-pr-ip";
+		reg = <0xff20c000 0x10>;
+	};
-- 
2.7.4

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[PATCH v4 3/4] fpga dt: bindings for Altera Partial Reconfiguration IP. matthew.gerlach@linux.intel.com - 2017-03-02 17:10 +0100
  Re: [PATCH v4 3/4] fpga dt: bindings for Altera Partial  Reconfiguration IP. Rob Herring <robh@kernel.org> - 2017-03-03 08:10 +0100

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