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Groups > linux.kernel > #1584803
| From | Paolo Bonzini <pbonzini@redhat.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 0/6] KVM TSS cleanups and speedups |
| Date | 2017-02-20 19:00 +0100 |
| Message-ID | <td0pI-7LH-15@gated-at.bofh.it> (permalink) |
| References | <tcZtE-7aS-23@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 20/02/2017 17:56, Andy Lutomirski wrote: > The first four patches here are intended to be straightforward > cleanups and to make a better base for Thomas' GDT series. They may > be a slight speedup, too, because they remove an STR instruction > from the VMX entry path. > > The last two patches are a reasonably large speedup but need careful > review. I spotted (I think) a bug in patch 6, but apart from that it looks nice. Paolo > FWIW, I can see lots of additional easy-ish speedups here. For example: > > - The GDT reload on VM exit isn't really needed at all. Instead let's > just change the kernel limit to 0xFFFF. Doing that naively would > waste memory, but doing it carefully on top of Thomas' series would > be straightforward and almost free. > > - RDMSR from MSR_GS_BASE is totally pointless. > > - Once I or someone finishes the FSGSBASE series, we get a big speedup > there. > > - The LDT reload code should be split up and optimized better, I think. > > Andy Lutomirski (6): > x86/asm: Define the kernel TSS limit in a macro > x86/kvm/vmx: Don't fetch the TSS base from the GDT > x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels > x86/kvm/vmx: Simplify segment_base() > x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss > x86/kvm/vmx: Defer TR reload after VM exit > > arch/x86/include/asm/desc.h | 58 ++++++++++++++++++++++++++++++------ > arch/x86/include/asm/processor.h | 12 +++++++- > arch/x86/kernel/ioport.c | 5 ++++ > arch/x86/kernel/process.c | 10 +++++++ > arch/x86/kvm/vmx.c | 63 +++++++++++++++++----------------------- > 5 files changed, 102 insertions(+), 46 deletions(-) >
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[PATCH 0/6] KVM TSS cleanups and speedups Andy Lutomirski <luto@kernel.org> - 2017-02-20 18:00 +0100 [PATCH 2/6] x86/kvm/vmx: Don't fetch the TSS base from the GDT Andy Lutomirski <luto@kernel.org> - 2017-02-20 18:00 +0100 [PATCH 5/6] x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss Andy Lutomirski <luto@kernel.org> - 2017-02-20 18:00 +0100 [PATCH 1/6] x86/asm: Define the kernel TSS limit in a macro Andy Lutomirski <luto@kernel.org> - 2017-02-20 18:10 +0100 Re: [PATCH 0/6] KVM TSS cleanups and speedups Paolo Bonzini <pbonzini@redhat.com> - 2017-02-20 19:00 +0100
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