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Groups > linux.kernel > #1581670
| From | matthew.gerlach@linux.intel.com |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 1/4] fpga: add config complete timeout |
| Date | 2017-02-15 22:20 +0100 |
| Message-ID | <tbf9w-59d-17@gated-at.bofh.it> (permalink) |
| References | <tbf9v-59d-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Alan Tull <atull@opensource.altera.com>
Adding timeout for maximum allowed time for FPGA to go to
operating mode after a FPGA region has been programmed.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
---
drivers/fpga/fpga-region.c | 3 +++
include/linux/fpga/fpga-mgr.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c
index 3222fdb..28401cb 100644
--- a/drivers/fpga/fpga-region.c
+++ b/drivers/fpga/fpga-region.c
@@ -381,6 +381,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
&info->disable_timeout_us);
+ of_property_read_u32(nd->overlay, "config-complete-timeout-us",
+ &info->config_complete_timeout_us);
+
/* If FPGA was externally programmed, don't specify firmware */
if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
pr_err("error: specified firmware and external-fpga-config");
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index 57beb5d..fd3f083 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -76,11 +76,14 @@ enum fpga_mgr_states {
* @flags: boolean flags as defined above
* @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
+ * @config_complete_timeout_us: maximum time for FPGA to switch to operating
+ * status in the write_complete op.
*/
struct fpga_image_info {
u32 flags;
u32 enable_timeout_us;
u32 disable_timeout_us;
+ u32 config_complete_timeout_us;
};
/**
--
2.7.4
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[PATCH 0/4] Altera Partial Reconfiguration IP matthew.gerlach@linux.intel.com - 2017-02-15 22:20 +0100
[PATCH 1/4] fpga: add config complete timeout matthew.gerlach@linux.intel.com - 2017-02-15 22:20 +0100
[PATCH 2/4] fpga pr ip: Core driver support for Altera Partial Reconfiguration IP. matthew.gerlach@linux.intel.com - 2017-02-15 22:20 +0100
Re: [PATCH 2/4] fpga pr ip: Core driver support for Altera Partial Reconfiguration IP. Moritz Fischer <moritz.fischer@ettus.com> - 2017-02-16 18:40 +0100
Re: [PATCH 2/4] fpga pr ip: Core driver support for Altera Partial Reconfiguration IP. matthew.gerlach@linux.intel.com - 2017-02-16 23:50 +0100
[PATCH 3/4] fpga dt: bindings for Altera Partial Reconfiguraion IP. matthew.gerlach@linux.intel.com - 2017-02-15 22:20 +0100
Re: [PATCH 3/4] fpga dt: bindings for Altera Partial Reconfiguraion IP. Dinh Nguyen <dinh.linux@gmail.com> - 2017-02-17 14:40 +0100
Re: [PATCH 3/4] fpga dt: bindings for Altera Partial Reconfiguraion IP. Moritz Fischer <mdf@kernel.org> - 2017-02-17 16:30 +0100
Re: [PATCH 3/4] fpga dt: bindings for Altera Partial Reconfiguraion IP. Rob Herring <robh@kernel.org> - 2017-02-27 15:40 +0100
Re: [PATCH 3/4] fpga dt: bindings for Altera Partial Reconfiguraion IP. matthew.gerlach@linux.intel.com - 2017-02-27 17:40 +0100
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