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Groups > linux.kernel > #1583289
| From | Kishon Vijay Abraham I <kishon@ti.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 12/22] dt-bindings: PCI: dra7xx: Add dt bindings for pci dra7xx EP mode |
| Date | 2017-02-17 11:10 +0100 |
| Message-ID | <tbNEe-2WR-31@gated-at.bofh.it> (permalink) |
| References | <tbNux-2Ef-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Add device tree binding documentation for pci dra7xx EP mode.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
Documentation/devicetree/bindings/pci/ti-pci.txt | 37 ++++++++++++++++++----
1 file changed, 30 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
index 60e2516..190828a 100644
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -1,17 +1,22 @@
TI PCI Controllers
PCIe Designware Controller
- - compatible: Should be "ti,dra7-pcie""
- - reg : Two register ranges as listed in the reg-names property
- - reg-names : The first entry must be "ti-conf" for the TI specific registers
- The second entry must be "rc-dbics" for the designware pcie
- registers
- The third entry must be "config" for the PCIe configuration space
+ - compatible: Should be "ti,dra7-pcie" for RC
+ Should be "ti,dra7-pcie-ep" for EP
- phys : list of PHY specifiers (used by generic PHY framework)
- phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
number of PHYs as specified in *phys* property.
- ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
where <X> is the instance number of the pcie from the HW spec.
+ - num-lanes as specified in ../designware-pcie.txt
+
+HOST MODE
+=========
+ - reg : Two register ranges as listed in the reg-names property
+ - reg-names : The first entry must be "ti-conf" for the TI specific registers
+ The second entry must be "rc-dbics" for the designware pcie
+ registers
+ The third entry must be "config" for the PCIe configuration space
- interrupts : Two interrupt entries must be specified. The first one is for
main interrupt line and the second for MSI interrupt line.
- #address-cells,
@@ -19,13 +24,31 @@ PCIe Designware Controller
#interrupt-cells,
device_type,
ranges,
- num-lanes,
interrupt-map-mask,
interrupt-map : as specified in ../designware-pcie.txt
+DEVICE MODE
+===========
+ - reg : Four register ranges as listed in the reg-names property
+ - reg-names : "ti-conf" for the TI specific registers
+ "ep_dbics" for the standard configuration registers as
+ they are locally accessed within the DIF CS space
+ "ep_dbics2" for the standard configuration registers as
+ they are locally accessed within the DIF CS2 space
+ "addr_space" used to map remote RC address space
+ - interrupts : one interrupt entries must be specified for main interrupt.
+ - num-ib-windows : number of inbound address translation windows
+ - num-ob-windows : number of outbound address translation windows
+
Optional Property:
- gpios : Should be added if a gpio line is required to drive PERST# line
+NOTE: Two dt nodes may be added for each PCI controller; one for host
+mode and another for device mode. So in order for PCI to
+work in host mode, EP mode dt node should be disabled and in order to PCI to
+work in EP mode, host mode dt node should be disabled. And host mode and EP
+mode are mutually exclusive.
+
Example:
axi {
compatible = "simple-bus";
--
1.7.9.5
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[PATCH v2 00/22] PCI: Support for configurable PCI endpoint Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 08/22] PCI: dwc: designware: Add EP mode support Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
Re: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 14:20 +0100
Re: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support Joao Pinto <Joao.Pinto@synopsys.com> - 2017-02-17 18:30 +0100
[PATCH v2 22/22] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 15/22] PCI: Add device IDs for DRA74x and DRA72x Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 21/22] MAINTAINERS: add PCI EP maintainer Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 06/22] PCI: endpoint: functions: Add an EP function to test PCI Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 05/22] Documentation: PCI: Add specification for the *pci test* function device Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 18/22] tools: PCI: Add a userspace tool to test PCI endpoint Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 03/22] PCI: endpoint: Introduce configfs entry for configuring EP functions Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
Re: [PATCH v2 03/22] PCI: endpoint: Introduce configfs entry for configuring EP functions Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 13:10 +0100
Re: [PATCH v2 03/22] PCI: endpoint: Introduce configfs entry for configuring EP functions Christoph Hellwig <hch@infradead.org> - 2017-02-17 18:10 +0100
[PATCH v2 17/22] Documentation: misc-devices: Add Documentation for pci-endpoint-test driver Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 10/22] PCI: dwc: dra7xx: Facilitate wrapper and msi interrupts to be enabled independently Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 11/22] PCI: dwc: dra7xx: Add EP mode support Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 20/22] Documentation: PCI: Add userguide for PCI endpoint test function Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 19/22] tools: PCI: Add sample test script to invoke pcitest Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 02/22] Documentation: PCI: Guide to use PCI Endpoint Core Layer Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
Re: [PATCH v2 02/22] Documentation: PCI: Guide to use PCI Endpoint Core Layer Joao Pinto <Joao.Pinto@synopsys.com> - 2017-02-17 12:50 +0100
[PATCH v2 16/22] misc: Add host side pci driver for pci test function device Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:00 +0100
[PATCH v2 07/22] Documentation: PCI: Add binding documentation for pci-test endpoint function Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:10 +0100
[PATCH v2 13/22] PCI: dwc: dra7xx: Workaround for errata id i870 Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:10 +0100
[PATCH v2 09/22] dt-bindings: PCI: Add dt bindings for pci designware EP mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:10 +0100
[PATCH v2 12/22] dt-bindings: PCI: dra7xx: Add dt bindings for pci dra7xx EP mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:10 +0100
[PATCH v2 14/22] dt-bindings: PCI: dra7xx: Add dt bindings to enable legacy mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 11:10 +0100
Re: [PATCH v2 14/22] dt-bindings: PCI: dra7xx: Add dt bindings to enable legacy mode Rob Herring <robh@kernel.org> - 2017-02-27 18:20 +0100
Re: [PATCH v2 14/22] dt-bindings: PCI: dra7xx: Add dt bindings to enable legacy mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-28 06:30 +0100
Re: [PATCH v2 01/22] PCI: endpoint: Add EP core layer to enable EP controller and EP functions Kishon Vijay Abraham I <kishon@ti.com> - 2017-02-17 12:40 +0100
Re: [PATCH v2 01/22] PCI: endpoint: Add EP core layer to enable EP controller and EP functions Joao Pinto <Joao.Pinto@synopsys.com> - 2017-02-17 12:50 +0100
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