Re: [PATCH 5/9] RISC-V: Task implementation

From	James Hogan <james.hogan@imgtec.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH 5/9] RISC-V: Task implementation
Date	2017-06-29 01:40 +0200
Message-ID	<tXuIX-1Gz-5@gated-at.bofh.it> (permalink)
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On Wed, Jun 28, 2017 at 11:55:34AM -0700, Palmer Dabbelt wrote:
> diff --git a/arch/riscv/include/asm/kprobes.h b/arch/riscv/include/asm/kprobes.h
> new file mode 100644
> index 000000000000..1190de7a0f74
> --- /dev/null
> +++ b/arch/riscv/include/asm/kprobes.h
> @@ -0,0 +1,22 @@
...
> +#ifdef CONFIG_KPROBES
> +#error "RISC-V doesn't skpport CONFIG_KPROBES"
> +#endif

I'm wondering where your fallback definition of e.g. NOKPROBE_SYMBOL
comes from then.

Could you just use the asm-generic one?

> diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
> new file mode 100644
> index 000000000000..b13d3ea3bf79
> --- /dev/null
> +++ b/arch/riscv/kernel/process.c
> @@ -0,0 +1,131 @@
...
> +void show_regs(struct pt_regs *regs)
> +{
> +	show_regs_print_info(KERN_DEFAULT);
> +
> +	printk(KERN_CONT "sepc: " REG_FMT " ra : " REG_FMT " sp : " REG_FMT "\n",
> +		regs->sepc, regs->ra, regs->sp);

I've noticed inconsistent use of pr_* and printk(KERN_* in this
patchset. Maybe now would be the best time to switch everything to pr_*.

> +	/* Reset FPU context
> +	 *	frm: round to nearest, ties to even (IEEE default)
> +	 *	fflags: accrued exceptions cleared
> +	 */

Similarly lots of multiline comments which don't follow the standard
style in Documentation/process/coding-style.rst. Maybe now is the best
time to convert if you're going to.

Cheers
James

Thread

RISC-V Linux Port v3 Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-28 21:00 +0200
  [PATCH 6/9] RISC-V: Device, timer, IRQs, and the SBI Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-28 21:00 +0200
    Re: [PATCH 6/9] RISC-V: Device, timer, IRQs, and the SBI Tobias Klauser <tklauser@distanz.ch> - 2017-06-29 10:40 +0200
      Re: [PATCH 6/9] RISC-V: Device, timer, IRQs, and the SBI Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-30 01:00 +0200
        Re: [PATCH 6/9] RISC-V: Device, timer, IRQs, and the SBI Tobias Klauser <tklauser@distanz.ch> - 2017-06-30 10:00 +0200
  [PATCH 4/9] RISC-V: ELF and module implementation Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-28 21:00 +0200
  [PATCH 7/9] RISC-V: Paging and MMU Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-28 21:10 +0200
    Re: [PATCH 7/9] RISC-V: Paging and MMU James Hogan <james.hogan@imgtec.com> - 2017-06-29 01:20 +0200
      Re: [PATCH 7/9] RISC-V: Paging and MMU Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-30 00:20 +0200
  [PATCH 9/9] RISC-V: Build Infastructure Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-28 21:10 +0200
    Re: [PATCH 9/9] RISC-V: Build Infastructure Karsten Merker <merker@debian.org> - 2017-06-28 23:10 +0200
      Re: [PATCH 9/9] RISC-V: Build Infastructure Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-28 23:20 +0200
    Re: [PATCH 9/9] RISC-V: Build Infastructure James Hogan <james.hogan@imgtec.com> - 2017-06-28 23:30 +0200
      Re: [PATCH 9/9] RISC-V: Build Infastructure Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-29 18:40 +0200
    Re: [PATCH 9/9] RISC-V: Build Infastructure James Hogan <james.hogan@imgtec.com> - 2017-06-29 01:00 +0200
      Re: [PATCH 9/9] RISC-V: Build Infastructure Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-30 00:20 +0200
  Re: [PATCH 8/9] RISC-V: User-facing API Thomas Gleixner <tglx@linutronix.de> - 2017-06-29 00:00 +0200
  Re: [PATCH 8/9] RISC-V: User-facing API Thomas Gleixner <tglx@linutronix.de> - 2017-06-29 00:00 +0200
    Re: [PATCH 8/9] RISC-V: User-facing API Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-29 19:30 +0200
  Re: [PATCH 8/9] RISC-V: User-facing API James Hogan <james.hogan@imgtec.com> - 2017-06-29 00:50 +0200
    Re: [PATCH 8/9] RISC-V: User-facing API Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-29 23:50 +0200
  Re: [PATCH 5/9] RISC-V: Task implementation James Hogan <james.hogan@imgtec.com> - 2017-06-29 01:40 +0200
    Re: [PATCH 5/9] RISC-V: Task implementation Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-30 01:00 +0200
  Re: [PATCH 5/9] RISC-V: Task implementation Tobias Klauser <tklauser@distanz.ch> - 2017-06-29 10:30 +0200
    Re: [PATCH 5/9] RISC-V: Task implementation Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-30 01:00 +0200
  Re: [PATCH 1/9] RISC-V: Init and Halt Code Geert Uytterhoeven <geert@linux-m68k.org> - 2017-06-29 11:50 +0200
    Re: [PATCH 1/9] RISC-V: Init and Halt Code Palmer Dabbelt <palmer@dabbelt.com> - 2017-06-30 01:00 +0200

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