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Groups > linux.kernel > #1675481
| From | Varadarajan Narayanan <varada@codeaurora.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v4 12/14] spi: qup: refactor spi_qup_prep_sg |
| Date | 2017-06-27 11:50 +0200 |
| Message-ID | <tWVib-739-49@gated-at.bofh.it> (permalink) |
| References | <tWVi9-739-11@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Take specific sgl and nent to be prepared. This is in
preparation for splitting DMA into multiple transacations, this
contains no code changes just refactoring.
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
---
drivers/spi/spi-qup.c | 25 ++++++++++---------------
1 file changed, 10 insertions(+), 15 deletions(-)
diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
index 026f25e..2423ee5 100644
--- a/drivers/spi/spi-qup.c
+++ b/drivers/spi/spi-qup.c
@@ -382,26 +382,19 @@ static void spi_qup_write(struct spi_qup *controller)
} while (remainder);
}
-static int spi_qup_prep_sg(struct spi_master *master, struct spi_transfer *xfer,
- enum dma_transfer_direction dir,
+static int spi_qup_prep_sg(struct spi_master *master, struct scatterlist *sgl,
+ unsigned int nents, enum dma_transfer_direction dir,
dma_async_tx_callback callback, void *data)
{
unsigned long flags = DMA_PREP_INTERRUPT | DMA_PREP_FENCE;
struct dma_async_tx_descriptor *desc;
- struct scatterlist *sgl;
struct dma_chan *chan;
dma_cookie_t cookie;
- unsigned int nents;
- if (dir == DMA_MEM_TO_DEV) {
+ if (dir == DMA_MEM_TO_DEV)
chan = master->dma_tx;
- nents = xfer->tx_sg.nents;
- sgl = xfer->tx_sg.sgl;
- } else {
+ else
chan = master->dma_rx;
- nents = xfer->rx_sg.nents;
- sgl = xfer->rx_sg.sgl;
- }
desc = dmaengine_prep_slave_sg(chan, sgl, nents, dir, flags);
if (IS_ERR_OR_NULL(desc))
@@ -444,8 +437,9 @@ static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer,
}
if (xfer->rx_buf) {
- ret = spi_qup_prep_sg(master, xfer, DMA_DEV_TO_MEM,
- spi_qup_dma_done, &qup->rxc);
+ ret = spi_qup_prep_sg(master, xfer->rx_sg.sgl,
+ xfer->rx_sg.nents, DMA_DEV_TO_MEM,
+ spi_qup_dma_done, &qup->rxc);
if (ret)
return ret;
@@ -453,8 +447,9 @@ static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer,
}
if (xfer->tx_buf) {
- ret = spi_qup_prep_sg(master, xfer, DMA_MEM_TO_DEV,
- spi_qup_dma_done, &qup->txc);
+ ret = spi_qup_prep_sg(master, xfer->tx_sg.sgl,
+ xfer->tx_sg.nents, DMA_MEM_TO_DEV,
+ spi_qup_dma_done, &qup->txc);
if (ret)
return ret;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
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[PATCH v4 00/14] spi: qup: Fixes and add support for >64k transfers Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 11:50 +0200 [PATCH v4 07/14] spi: qup: Fix transaction done signaling Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 11:50 +0200 [PATCH v4 11/14] spi: qup: allow block mode to generate multiple transactions Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 11:50 +0200 [PATCH v4 14/14] spi: qup: Ensure done detection Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 11:50 +0200 [PATCH v4 03/14] spi: qup: Add completion structures for DMA Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 11:50 +0200 [PATCH v4 08/14] spi: qup: Do block sized read/write in block mode Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 11:50 +0200 [PATCH v4 02/14] spi: qup: Setup DMA mode correctly Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 11:50 +0200 [PATCH v4 12/14] spi: qup: refactor spi_qup_prep_sg Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 11:50 +0200 [PATCH v4 01/14] spi: qup: Enable chip select support Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 12:00 +0200 [PATCH v4 05/14] spi: qup: Place the QUP in run mode before DMA Varadarajan Narayanan <varada@codeaurora.org> - 2017-06-27 12:00 +0200
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