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Groups > linux.kernel > #1666115
| From | Mathieu Poirier <mathieu.poirier@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 08/12] coresight tmc: Handle configuration types properly |
| Date | 2017-06-14 20:00 +0200 |
| Message-ID | <tSkKd-8fL-5@gated-at.bofh.it> (permalink) |
| References | <tRyFz-3h6-3@gated-at.bofh.it> <tRyFB-3h6-43@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, Jun 12, 2017 at 03:36:47PM +0100, Suzuki K Poulose wrote:
> Coresight SoC 600 defines a new configuration for TMC, Embedded Trace
> Streamer (ETS), indicated by 0x3 in MODE:CONFIG_TYPE. Make sure
> the driver handles the new type properly.
From what I see below this patch only improves readability by moving the if/else
compound to a case statement - there is no trace of the new ETS block.
Readability enhancement are good but the changelog must match the code.
>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> drivers/hwtracing/coresight/coresight-tmc.c | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
> index fd5a2e0..7152656 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc.c
> @@ -358,11 +358,13 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
> desc.dev = dev;
> desc.groups = coresight_tmc_groups;
>
> - if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
> + switch (drvdata->config_type) {
> + case TMC_CONFIG_TYPE_ETB:
> desc.type = CORESIGHT_DEV_TYPE_SINK;
> desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
> desc.ops = &tmc_etb_cs_ops;
> - } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
> + break;
> + case TMC_CONFIG_TYPE_ETR:
> desc.type = CORESIGHT_DEV_TYPE_SINK;
> desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
> desc.ops = &tmc_etr_cs_ops;
> @@ -373,10 +375,16 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
> ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
> if (ret)
> goto out;
> - } else {
> + break;
> + case TMC_CONFIG_TYPE_ETF:
> desc.type = CORESIGHT_DEV_TYPE_LINKSINK;
> desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO;
> desc.ops = &tmc_etf_cs_ops;
> + break;
> + default:
> + pr_err("%s: Unsupported TMC config\n", pdata->name);
> + ret = -EINVAL;
> + goto out;
> }
>
> drvdata->csdev = coresight_register(&desc);
> --
> 2.7.4
>
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[PATCH 00/12] coresight: Support for ARM Coresight SoC-600 Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-06-12 16:40 +0200
[PATCH 04/12] coresight: Add support for reading 64bit registers Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-06-12 16:40 +0200
Re: [PATCH 04/12] coresight: Add support for reading 64bit registers Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-06-13 19:50 +0200
Re: [PATCH 04/12] coresight: Add support for reading 64bit registers Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-06-13 20:00 +0200
[PATCH 05/12] coresight tmc: Add helpers for accessing 64bit registers Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-06-12 16:40 +0200
Re: [PATCH 05/12] coresight tmc: Add helpers for accessing 64bit registers Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-06-14 19:50 +0200
Re: [PATCH 05/12] coresight tmc: Add helpers for accessing 64bit registers Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-06-15 12:20 +0200
Re: [PATCH 05/12] coresight tmc: Add helpers for accessing 64bit registers Mike Leach <mike.leach@linaro.org> - 2017-06-15 15:40 +0200
Re: [PATCH 05/12] coresight tmc: Add helpers for accessing 64bit registers Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-06-15 16:30 +0200
[PATCH 06/12] coresight tmc: Expose DBA and AXICTL Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-06-12 16:40 +0200
Re: [PATCH 06/12] coresight tmc: Expose DBA and AXICTL Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-06-14 20:00 +0200
Re: [PATCH 06/12] coresight tmc: Expose DBA and AXICTL Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-06-15 12:20 +0200
[PATCH 02/12] arm64: dts: juno: Use the new coresight replicator string Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-06-12 16:40 +0200
[PATCH 09/12] coresight tmc: Add capability information Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-06-12 16:40 +0200
Re: [PATCH 09/12] coresight tmc: Add capability information Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-06-14 20:30 +0200
Re: [PATCH 09/12] coresight tmc: Add capability information Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-06-15 12:40 +0200
Re: [PATCH 09/12] coresight tmc: Add capability information Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-06-15 16:40 +0200
[PATCH 08/12] coresight tmc: Handle configuration types properly Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-06-12 16:40 +0200
Re: [PATCH 08/12] coresight tmc: Handle configuration types properly Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-06-14 20:00 +0200
Re: [PATCH 08/12] coresight tmc: Handle configuration types properly Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-06-15 12:30 +0200
Re: [PATCH 08/12] coresight tmc: Handle configuration types properly Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-06-15 16:40 +0200
[PATCH 07/12] coresight replicator: Expose replicator management registers Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-06-12 16:50 +0200
Re: [PATCH 07/12] coresight replicator: Expose replicator management registers Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-06-14 20:00 +0200
Re: [PATCH 07/12] coresight replicator: Expose replicator management registers Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-06-15 12:30 +0200
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