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Re: [PATCHv2 1/2] gpio: mvebu: fix blink counter register selection

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On Thu, Jun 1, 2017 at 2:18 PM, Richard Genoud <richard.genoud@gmail.com> wrote:

> The blink counter A was always selected because 0 was forced in the
> blink select counter register.
> The variable 'set' was obviously there to be used as the register value,
> selecting the B counter when id==1 and A counter when id==0.
>
> Tested on clearfog-pro (Marvell 88F6828)
>
> Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Reviewed-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>

Patch applied for fixes.

It appears this will clash with patches on the development branch :(

I might screw up the merges so help me check the end result
later.

Yours,
Linus Walleij

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Re: [PATCHv2 1/2] gpio: mvebu: fix blink counter register selection Linus Walleij <linus.walleij@linaro.org> - 2017-06-09 09:40 +0200
  Re: [PATCHv2 1/2] gpio: mvebu: fix blink counter register selection Richard Genoud <richard.genoud@gmail.com> - 2017-06-09 09:50 +0200
  Re: [PATCHv2 1/2] gpio: mvebu: fix blink counter register selection Ralph Sennhauser <ralph.sennhauser@gmail.com> - 2017-06-09 10:10 +0200
    Re: [PATCHv2 1/2] gpio: mvebu: fix blink counter register selection Linus Walleij <linus.walleij@linaro.org> - 2017-06-11 23:50 +0200
      Re: [PATCHv2 1/2] gpio: mvebu: fix blink counter register selection Ralph Sennhauser <ralph.sennhauser@gmail.com> - 2017-06-12 09:20 +0200

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