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[PATCH 3/6] arch/sparc: Introduce cmpxchg_u8 SPARC

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SPARC supports 32 bit and 64 bit cmpxchg right now. Add support
for 8 bit (1 byte) cmpxchg. This is required to support queued
rwlocks feature  which uses 1 byte cmpxchg.

The function __cmpxchg_u8 here uses the 4 byte cas instruction with a
byte manipulation to achieve 1 byte cmpxchg.

Signed-off-by: Babu Moger <babu.moger@oracle.com>
Reviewed-by: Håkon Bugge <haakon.bugge@oracle.com>
Reviewed-by: Steve Sistare <steven.sistare@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Reviewed-by: Jane Chu <jane.chu@oracle.com>
Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com>
---
 arch/sparc/include/asm/cmpxchg_64.h |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+), 0 deletions(-)

diff --git a/arch/sparc/include/asm/cmpxchg_64.h b/arch/sparc/include/asm/cmpxchg_64.h
index faa2f61..65bfae0 100644
--- a/arch/sparc/include/asm/cmpxchg_64.h
+++ b/arch/sparc/include/asm/cmpxchg_64.h
@@ -87,6 +87,33 @@ static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
 	return new;
 }
 
+/*
+ * Use 4 byte cas instruction to achieve 1 byte cmpxchg. Main logic
+ * here is to get the bit shift of the byte we are interested in.
+ * The XOR is handy for reversing the bits for big-endian byte order
+ */
+static inline unsigned long
+__cmpxchg_u8(volatile unsigned char *m, unsigned int old, unsigned int new)
+{
+	unsigned long maddr = (unsigned long)m;
+	int bit_shift = (((unsigned long)m & 3) ^ 3) << 3;
+	unsigned int mask = 0xff << bit_shift;
+	unsigned int *ptr = (unsigned int *) (maddr & ~3);
+	unsigned int old32, new32, load;
+	unsigned int load32 = *ptr;
+
+	do {
+		new32 = (load32 & ~mask) | (new << bit_shift);
+		old32 = (load32 & ~mask) | (old << bit_shift);
+		load32 = __cmpxchg_u32(ptr, old32, new32);
+		if (load32 == old32)
+			return old;
+		load = (load32 & mask) >> bit_shift;
+	} while (load == old);
+
+	return load;
+}
+
 /* This function doesn't exist, so you'll get a linker error
    if something tries to do an invalid cmpxchg().  */
 void __cmpxchg_called_with_bad_pointer(void);
@@ -95,6 +122,8 @@ static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
 {
 	switch (size) {
+		case 1:
+			return __cmpxchg_u8(ptr, old, new);
 		case 4:
 			return __cmpxchg_u32(ptr, old, new);
 		case 8:
-- 
1.7.1

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[PATCH 0/6] Enable queued rwlock and queued spinlock for SPARC Babu Moger <babu.moger@oracle.com> - 2017-05-19 02:40 +0200
  [PATCH 3/6] arch/sparc: Introduce cmpxchg_u8 SPARC Babu Moger <babu.moger@oracle.com> - 2017-05-19 02:40 +0200
  [PATCH 6/6] arch/sparc: Enable queued spinlock support for SPARC Babu Moger <babu.moger@oracle.com> - 2017-05-19 02:40 +0200
    Re: [PATCH 6/6] arch/sparc: Enable queued spinlock support for  SPARC David Miller <davem@davemloft.net> - 2017-05-19 04:40 +0200
      Re: [PATCH 6/6] arch/sparc: Enable queued spinlock support for SPARC Babu Moger <babu.moger@oracle.com> - 2017-05-19 18:40 +0200
  [PATCH 2/6] arch/sparc: Define config parameter CPU_BIG_ENDIAN Babu Moger <babu.moger@oracle.com> - 2017-05-19 02:40 +0200
    Re: [PATCH 2/6] arch/sparc: Define config parameter CPU_BIG_ENDIAN David Miller <davem@davemloft.net> - 2017-05-19 04:30 +0200
      Re: [PATCH 2/6] arch/sparc: Define config parameter CPU_BIG_ENDIAN Babu Moger <babu.moger@oracle.com> - 2017-05-19 18:30 +0200
  [PATCH 1/6] kernel/locking: Fix compile error with qrwlock.c Babu Moger <babu.moger@oracle.com> - 2017-05-19 02:40 +0200
    Re: [PATCH 1/6] kernel/locking: Fix compile error with qrwlock.c David Miller <davem@davemloft.net> - 2017-05-19 04:30 +0200
      Re: [PATCH 1/6] kernel/locking: Fix compile error with qrwlock.c Babu Moger <babu.moger@oracle.com> - 2017-05-19 18:40 +0200
  [PATCH 4/6] arch/sparc: Enable queued rwlocks for SPARC Babu Moger <babu.moger@oracle.com> - 2017-05-19 02:40 +0200
    Re: [PATCH 4/6] arch/sparc: Enable queued rwlocks for SPARC David Miller <davem@davemloft.net> - 2017-05-19 04:40 +0200
      Re: [PATCH 4/6] arch/sparc: Enable queued rwlocks for SPARC Peter Zijlstra <peterz@infradead.org> - 2017-05-19 11:10 +0200
        Re: [PATCH 4/6] arch/sparc: Enable queued rwlocks for SPARC Babu Moger <babu.moger@oracle.com> - 2017-05-19 18:50 +0200
        Re: [PATCH 4/6] arch/sparc: Enable queued rwlocks for SPARC David Miller <davem@davemloft.net> - 2017-05-19 21:20 +0200
          Re: [PATCH 4/6] arch/sparc: Enable queued rwlocks for SPARC Peter Zijlstra <peterz@infradead.org> - 2017-05-19 21:40 +0200
            Re: [PATCH 4/6] arch/sparc: Enable queued rwlocks for SPARC David Miller <davem@davemloft.net> - 2017-05-19 21:40 +0200
      Re: [PATCH 4/6] arch/sparc: Enable queued rwlocks for SPARC Babu Moger <babu.moger@oracle.com> - 2017-05-19 18:40 +0200

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