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Re: [PATCH v7 20/26] x86/cpufeature: Add User-Mode Instruction Prevention definitions

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On Sat, 2017-05-06 at 11:04 +0200, Paolo Bonzini wrote:
> 
> 
> On 05/05/2017 20:17, Ricardo Neri wrote:
> > User-Mode Instruction Prevention is a security feature present in
> new
> > Intel processors that, when set, prevents the execution of a subset
> of
> > instructions if such instructions are executed in user mode (CPL >
> 0).
> > Attempting to execute such instructions causes a general protection
> > exception.
> > 
> > The subset of instructions comprises:
> > 
> >  * SGDT - Store Global Descriptor Table
> >  * SIDT - Store Interrupt Descriptor Table
> >  * SLDT - Store Local Descriptor Table
> >  * SMSW - Store Machine Status Word
> >  * STR  - Store Task Register
> > 
> > This feature is also added to the list of disabled-features to allow
> > a cleaner handling of build-time configuration.
> > 
> > Cc: Andy Lutomirski <luto@kernel.org>
> > Cc: Andrew Morton <akpm@linux-foundation.org>
> > Cc: H. Peter Anvin <hpa@zytor.com>
> > Cc: Borislav Petkov <bp@suse.de>
> > Cc: Brian Gerst <brgerst@gmail.com>
> > Cc: Chen Yucong <slaoub@gmail.com>
> > Cc: Chris Metcalf <cmetcalf@mellanox.com>
> > Cc: Dave Hansen <dave.hansen@linux.intel.com>
> > Cc: Fenghua Yu <fenghua.yu@intel.com>
> > Cc: Huang Rui <ray.huang@amd.com>
> > Cc: Jiri Slaby <jslaby@suse.cz>
> > Cc: Jonathan Corbet <corbet@lwn.net>
> > Cc: Michael S. Tsirkin <mst@redhat.com>
> > Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
> > Cc: Peter Zijlstra <peterz@infradead.org>
> > Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
> > Cc: Shuah Khan <shuah@kernel.org>
> > Cc: Vlastimil Babka <vbabka@suse.cz>
> > Cc: Tony Luck <tony.luck@intel.com>
> > Cc: Paolo Bonzini <pbonzini@redhat.com>
> > Cc: Liang Z. Li <liang.z.li@intel.com>
> > Cc: Alexandre Julliard <julliard@winehq.org>
> > Cc: Stas Sergeev <stsp@list.ru>
> > Cc: x86@kernel.org
> > Cc: linux-msdos@vger.kernel.org
> > 
> > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> 
> Would it be possible to have this patch in a topic branch for KVM's
> consumption?
> 
I have put a branch here with this single patch:

https://github.com/ricardon/tip.git rneri/umip_for_kvm

This is based on Linux v4.11. Please let me know if this works for your
or you'd prefer it to be based on a different branch/commit/repo.

Thanks and BR,
Ricardo

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[PATCH v7 00/26] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 26/26] selftests/x86: Add tests for instruction str and sldt Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 25/26] selftests/x86: Add tests for User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 13/26] x86/insn-eval: Add function to get default params of code segment Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 10/26] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 24/26] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 20/26] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
    Re: [PATCH v7 20/26] x86/cpufeature: Add User-Mode Instruction  Prevention definitions Paolo Bonzini <pbonzini@redhat.com> - 2017-05-06 11:10 +0200
      Re: [PATCH v7 20/26] x86/cpufeature: Add User-Mode Instruction  Prevention definitions Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-11 05:30 +0200
  [PATCH v7 12/26] x86/insn-eval: Add utility functions to get segment descriptor base address and limit Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 14/26] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 5 Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 16/26] x86/insn-eval: Support both signed 32-bit and 64-bit effective addresses Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 03/26] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:20 +0200
  [PATCH v7 06/26] x86/mpx, x86/insn: Relocate insn util functions to a new insn-eval file Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 19/26] x86/insn-eval: Add wrapper function for 16-bit and 32-bit address encodings Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 15/26] x86/insn-eval: Incorporate segment base and limit in linear address computation Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 05/26] x86/mpx: Do not use SIB.base if its value is 101b and ModRM.mod = 0 Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 09/26] x86/insn-eval: Add utility function to identify string instructions Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 22/26] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 04/26] x86/mpx: Do not use SIB.index if its value is 100b and ModRM.mod is not 11b Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 07/26] x86/insn-eval: Do not BUG on invalid register type Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 11/26] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 17/26] x86/insn-eval: Handle 32-bit address encodings in virtual-8086 mode Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 08/26] x86/insn-eval: Add a utility function to get register offsets Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 02/26] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 18/26] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200
  [PATCH v7 21/26] x86: Add emulation code for UMIP instructions Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-05-05 20:30 +0200

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