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Re: [PATCH 1/5] PCI: add a define for the PCI resource type mask

From Andy Shevchenko <andy.shevchenko@gmail.com>
Newsgroups linux.kernel
Subject Re: [PATCH 1/5] PCI: add a define for the PCI resource type mask
Date 2017-05-08 00:20 +0200
Message-ID <tECH0-3sL-13@gated-at.bofh.it> (permalink)
References <tDloR-1BT-11@gated-at.bofh.it> <tDloT-1BT-37@gated-at.bofh.it>
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On Thu, May 4, 2017 at 12:31 PM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> We use this mask multiple times in the bus setup.

Couple of nitpicks below.
Otherwise, FWIW:

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> +#define PCI_RES_TYPE_MASK (IORESOURCE_IO | IORESOURCE_MEM | \
> +                          IORESOURCE_PREFETCH | IORESOURCE_MEM_64)

I would go with following indentation:
#define PCI_RES_TYPE_MASK \
(IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_MEM_64)

or (if it doesn't fit well)

#define PCI_RES_TYPE_MASK \
    (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH | \
     IORESOURCE_MEM_64)

>                 pci_bus_release_bridge_resources(fail_res->dev->bus,
> -                                                fail_res->flags & type_mask,
> +                                                fail_res->flags &
> +                                                PCI_RES_TYPE_MASK,

I would leave it on one line even if it goes as far as ~85ish column.

>                 pci_bus_release_bridge_resources(fail_res->dev->bus,
> -                                                fail_res->flags & type_mask,
> +                                                fail_res->flags &
> +                                                PCI_RES_TYPE_MASK,

Ditto.

-- 
With Best Regards,
Andy Shevchenko

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Thread

Resizeable PCI BAR support v5 Christian König <deathsimple@vodafone.de> - 2017-05-04 11:40 +0200
  [PATCH 2/5] PCI: add resizeable BAR infrastructure v5 Christian König <deathsimple@vodafone.de> - 2017-05-04 11:40 +0200
    Re: [PATCH 2/5] PCI: add resizeable BAR infrastructure v5 Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-05-08 00:40 +0200
  [PATCH 3/5] PCI: add functionality for resizing resources v4 Christian König <deathsimple@vodafone.de> - 2017-05-04 11:40 +0200
    Re: [PATCH 3/5] PCI: add functionality for resizing resources v4 Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-05-08 01:20 +0200
  [PATCH 5/5] drm/amdgpu: resize VRAM BAR for CPU access v2 Christian König <deathsimple@vodafone.de> - 2017-05-04 11:40 +0200
  [PATCH 4/5] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors v3 Christian König <deathsimple@vodafone.de> - 2017-05-04 11:40 +0200
    Re: [PATCH 4/5] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models  30h-3fh) Processors v3 Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-05-08 01:50 +0200
  [PATCH 1/5] PCI: add a define for the PCI resource type mask Christian König <deathsimple@vodafone.de> - 2017-05-04 11:40 +0200
    Re: [PATCH 1/5] PCI: add a define for the PCI resource type mask Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-05-08 00:20 +0200
  Re: Resizeable PCI BAR support v5 Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-05-08 02:00 +0200

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