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Groups > linux.kernel > #1632268
| From | Will Deacon <will.deacon@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 |
| Date | 2017-04-27 19:10 +0200 |
| Message-ID | <tAV5v-3A6-9@gated-at.bofh.it> (permalink) |
| References | <tARlf-13j-3@gated-at.bofh.it> <tAUMa-3dZ-13@gated-at.bofh.it> <tAUMa-3dZ-11@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Thu, Apr 27, 2017 at 05:42:37PM +0100, Mark Rutland wrote: > On Thu, Apr 27, 2017 at 05:16:23PM +0530, Geetha sowjanya wrote: > > + /* > > + * Override the size, for Cavium CN99xx implementations > > + * which doesn't support the page 1 SMMU register space. > > + */ > > + cpu_model = read_cpuid_id() & MIDR_CPU_MODEL_MASK; > > + if (cpu_model == MIDR_THUNDERX_99XX || > > + cpu_model == MIDR_BRCM_VULCAN) > > + size = SZ_64K; > > If you're trying to identify an SMMU erratum, identify the SMMU, not the > CPU it happens to be paired with this time. > > There are ID registers in the SMMU you can use to do so. > > NAK to using the CPU ID here. Agreed. I had some off-list discussion with Geetha where we agreed to use the "silicon ID", which I assumed was the SMMU IIDR register. Will
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Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Mark Rutland <mark.rutland@arm.com> - 2017-04-27 18:50 +0200
Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Will Deacon <will.deacon@arm.com> - 2017-04-27 19:10 +0200
Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Geetha Akula <geethasowjanya.akula@gmail.com> - 2017-05-02 08:40 +0200
Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Will Deacon <will.deacon@arm.com> - 2017-05-03 11:50 +0200
Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Geetha Akula <geethasowjanya.akula@gmail.com> - 2017-05-03 12:40 +0200
Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Jon Masters <jcm@jonmasters.org> - 2017-05-05 01:40 +0200
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