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Re: [PATCH 11/22] ARM: dts: add top-level DT bindings for Cortina Gemini

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On Sat, Jan 28, 2017 at 3:56 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Mon, Jan 23, 2017 at 9:21 PM, Rob Herring <robh@kernel.org> wrote:
>> On Sun, Jan 22, 2017 at 01:22:19PM +0100, Linus Walleij wrote:
>>> This adds the top level SoC bindings for Cortina systems Gemini
>>> platforms.
> (...)
>>> +- intcon: the root node must have an interrupt controller node pointing to
>>
>> intcon is just a source label and not meaningful for the binding.
>
> OK
>
>>> +Example:
>>> +
>>> +/ {
>>> +     interrupt-parent = <&intcon>;
>>> +
>>> +     syscon: syscon@40000000 {
>>
>> This chip has no internal bus? Put all these nodes under a bus.
>
> Are you thinking something of the form:
>
>         soc: soc {
>                 #address-cells = <1>;
>                 #size-cells = <1>;
>                 ranges;
>                 compatible = "simple-bus";
>
>                 syscon: syscon@40000000 {
>
> (...)
>
> ?

Yes.

Rob

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[PATCH 11/22] ARM: dts: add top-level DT bindings for Cortina Gemini Linus Walleij <linus.walleij@linaro.org> - 2017-01-22 13:30 +0100
  Re: [PATCH 11/22] ARM: dts: add top-level DT bindings for Cortina  Gemini Rob Herring <robh@kernel.org> - 2017-01-23 21:30 +0100
    Re: [PATCH 11/22] ARM: dts: add top-level DT bindings for Cortina Gemini Linus Walleij <linus.walleij@linaro.org> - 2017-01-28 23:00 +0100
      Re: [PATCH 11/22] ARM: dts: add top-level DT bindings for Cortina Gemini Rob Herring <robh@kernel.org> - 2017-01-30 18:40 +0100

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