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Re: [v3 PATCH 07/10] x86: Add emulation code for UMIP instructions

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On 01/25/17 12:23, Ricardo Neri wrote:
> +	case UMIP_SMSW:
> +		dummy_value = CR0_STATE;

Unless the user space process is running in 64-bit mode this value
should be & 0xffff.  I'm not sure if we should even support fixing up
UMIP instructions in 64-bit mode.

Also, please put an explicit /* fall through */ here.

> +	/*
> +	 * These two instructions return a 16-bit value. We return
> +	 * all zeros. This is equivalent to a null descriptor for
> +	 * str and sldt.
> +	 */
> +	case UMIP_SLDT:
> +	case UMIP_STR:
> +		/* if operand is a register, it is zero-extended*/
> +		if (X86_MODRM_MOD(insn->modrm.value) == 3) {
> +			memset(data, 0, insn->opnd_bytes);
> +			*data_size = insn->opnd_bytes;
> +		/* if not, only the two least significant bytes are copied */
> +		} else {
> +			*data_size = 2;
> +		}
> +		memcpy(data, &dummy_value, sizeof(dummy_value));
> +		break;
> +	default:
> +		return -EINVAL;
> +	}
> +	return 0;


> +bool fixup_umip_exception(struct pt_regs *regs)
> +{
> +	struct insn insn;
> +	unsigned char buf[MAX_INSN_SIZE];
> +	/* 10 bytes is the maximum size of the result of UMIP instructions */
> +	unsigned char dummy_data[10] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
> +#ifdef CONFIG_X86_64
> +	int x86_64 = user_64bit_mode(regs);
> +#else
> +	int x86_64 = 0;
> +#endif

Again, could we simply do:

	if (user_64bit_mode(regs))
		return false;

or are there known users of these instructions *in 64-bit mode*?

	-hpa

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[v3 PATCH 00/10] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
  [v3 PATCH 07/10] x86: Add emulation code for UMIP instructions Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
    Re: [v3 PATCH 07/10] x86: Add emulation code for UMIP instructions "H. Peter Anvin" <hpa@zytor.com> - 2017-01-25 21:50 +0100
      Re: [v3 PATCH 07/10] x86: Add emulation code for UMIP instructions Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-26 07:00 +0100
  [v3 PATCH 01/10] x86/mpx: Do not use SIB index if index points to R/ESP Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
  [v3 PATCH 09/10] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
  [v3 PATCH 03/10] x86/mpx, x86/insn: Relocate insn util functions to a new insn-kernel Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
    Re: [v3 PATCH 03/10] x86/mpx, x86/insn: Relocate insn util  functions to a new insn-kernel Masami Hiramatsu <mhiramat@kernel.org> - 2017-01-26 03:30 +0100
  [v3 PATCH 10/10] selftests/x86: Add tests for User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
  [v3 PATCH 05/10] x86/insn-kernel: Add support to resolve 16-bit addressing encodings Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
    Re: [v3 PATCH 05/10] x86/insn-kernel: Add support to resolve 16-bit  addressing encodings Andy Lutomirski <luto@amacapital.net> - 2017-01-25 23:00 +0100
      Re: [v3 PATCH 05/10] x86/insn-kernel: Add support to resolve 16-bit addressing encodings "H. Peter Anvin" <hpa@zytor.com> - 2017-01-25 23:10 +0100
      Re: [v3 PATCH 05/10] x86/insn-kernel: Add support to resolve 16-bit  addressing encodings Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-26 07:00 +0100
        Re: [v3 PATCH 05/10] x86/insn-kernel: Add support to resolve 16-bit  addressing encodings Andy Lutomirski <luto@amacapital.net> - 2017-01-26 18:20 +0100
          Re: [v3 PATCH 05/10] x86/insn-kernel: Add support to resolve 16-bit  addressing encodings Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-27 04:50 +0100
  [v3 PATCH 02/10] x86/mpx: Fail decoding when SIB baseR/EBP is and no displacement is used Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
  [v3 PATCH 08/10] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
  [v3 PATCH 04/10] x86/insn-kernel: Add a function to obtain register offset in ModRM Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-25 21:30 +0100
    Re: [v3 PATCH 04/10] x86/insn-kernel: Add a function to obtain  register offset in ModRM Masami Hiramatsu <mhiramat@kernel.org> - 2017-01-26 03:20 +0100
      Re: [v3 PATCH 04/10] x86/insn-kernel: Add a function to obtain  register offset in ModRM Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-26 07:10 +0100
        Re: [v3 PATCH 04/10] x86/insn-kernel: Add a function to obtain  register offset in ModRM Masami Hiramatsu <mhiramat@kernel.org> - 2017-01-27 09:00 +0100
  Re: [v3 PATCH 00/10] x86: Enable User-Mode Instruction Prevention "H. Peter Anvin" <hpa@zytor.com> - 2017-01-25 21:50 +0100
    Re: [v3 PATCH 00/10] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-01-26 07:00 +0100

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