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Re: [PATCH v3 8/13] arm64: allwinner: a64: Add MMC nodes

From Corentin Labbe <clabbe.montjoie@gmail.com>
Newsgroups linux.kernel
Subject Re: [PATCH v3 8/13] arm64: allwinner: a64: Add MMC nodes
Date 2017-01-16 20:40 +0100
Message-ID <t0lii-54V-19@gated-at.bofh.it> (permalink)
References <t0iNr-34Q-9@gated-at.bofh.it> <t0iX9-3o3-35@gated-at.bofh.it>
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On Mon, Jan 16, 2017 at 05:56:58PM +0100, Maxime Ripard wrote:
> From: Andre Przywara <andre.przywara@arm.com>
> 
> The A64 has 3 MMC controllers, one of them being especially targeted to
> eMMC. Among other things, it has a data strobe signal and a 8 bits data
> width.
> 
> The two other are more usual controllers that will have a 4 bits width at
> most and no data strobe signal, which limits it to more usual SD or MMC
> peripherals.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 39 ++++++++++++++++++++-
>  1 file changed, 39 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 99b6bb1e141c..143e9706438f 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -299,6 +299,45 @@
>  			#size-cells = <0>;
>  		};
>  
> +		mmc0: mmc@1c0f000 {
> +			compatible = "allwinner,sun50i-a64-mmc";
> +			reg = <0x01c0f000 0x1000>;
> +			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
> +			clock-names = "ahb", "mmc";
> +			resets = <&ccu RST_BUS_MMC0>;
> +			reset-names = "ahb";
> +			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +		};
> +
> +		mmc1: mmc@1c10000 {
> +			compatible = "allwinner,sun50i-a64-mmc";
> +			reg = <0x01c10000 0x1000>;
> +			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
> +			clock-names = "ahb", "mmc";
> +			resets = <&ccu RST_BUS_MMC1>;
> +			reset-names = "ahb";
> +			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +		};
> +
> +		mmc2: mmc@1c11000 {
> +			compatible = "allwinner,sun50i-a64-emmc";
> +			reg = <0x01c11000 0x1000>;
> +			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
> +			clock-names = "ahb", "mmc";
> +			resets = <&ccu RST_BUS_MMC2>;
> +			reset-names = "ahb";
> +			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +		};
> +
>  		gic: interrupt-controller@1c81000 {
>  			compatible = "arm,gic-400";
>  			reg = <0x01c81000 0x1000>,

Hello

It seems that mmc node is after i2c@1c2b400 so not in address order.

Regards
Corentin Labbe

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Thread

[PATCH v3 0/13] arm64: allwinner: a64: Enable MMC support Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-16 18:10 +0100
  [PATCH v3 1/13] mmc: sunxi: Fix clock frequency change sequence Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-16 18:10 +0100
    Re: [PATCH v3 1/13] mmc: sunxi: Fix clock frequency change sequence Ulf Hansson <ulf.hansson@linaro.org> - 2017-01-24 09:20 +0100
      Re: [PATCH v3 1/13] mmc: sunxi: Fix clock frequency change sequence Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-25 09:30 +0100
  [PATCH v3 3/13] mmc: sunxi: Always set signal delay to 0 for A64 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-16 18:10 +0100
    Re: [PATCH v3 3/13] mmc: sunxi: Always set signal delay to 0 for A64 Ulf Hansson <ulf.hansson@linaro.org> - 2017-01-24 09:20 +0100
      Re: [PATCH v3 3/13] mmc: sunxi: Always set signal delay to 0 for A64 Andre Przywara <andre.przywara@arm.com> - 2017-01-24 10:20 +0100
      Re: [PATCH v3 3/13] mmc: sunxi: Always set signal delay to 0 for A64 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-25 10:20 +0100
  [PATCH v3 8/13] arm64: allwinner: a64: Add MMC nodes Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-16 18:10 +0100
    Re: [PATCH v3 8/13] arm64: allwinner: a64: Add MMC nodes Corentin Labbe <clabbe.montjoie@gmail.com> - 2017-01-16 20:40 +0100
      Re: [PATCH v3 8/13] arm64: allwinner: a64: Add MMC nodes Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-25 10:20 +0100
  [PATCH v3 6/13] mmc: sunxi: Add EMMC (MMC2) controller compatible Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-16 18:10 +0100
  [PATCH v3 10/13] arm64: allwinner: a64: Increase the MMC max frequency Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-16 18:10 +0100
  [PATCH v3 9/13] arm64: allwinner: a64: Add MMC pinctrl nodes Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-16 18:10 +0100
  [PATCH v3 4/13] mmc: sunxi: Enable the new timings for the A64 MMC controllers Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-16 18:10 +0100
  [PATCH v3 2/13] mmc: sunxi: Gate the clock when rate is 0 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-16 18:10 +0100
    Re: [PATCH v3 2/13] mmc: sunxi: Gate the clock when rate is 0 Ulf Hansson <ulf.hansson@linaro.org> - 2017-01-24 09:20 +0100
  Re: [PATCH v3 0/13] arm64: allwinner: a64: Enable MMC support Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-23 12:00 +0100

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