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Re: [PATCH V3 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table

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Hi Mirza,

On 27/10/16 15:01, Mirza Krak wrote:
> From: Mirza Krak <mirza.krak@gmail.com>
>
> Add TEGRA20_CLK_NOR to init table and set default rate to 92 MHz which
> is max rate.
>
> The maximum rate value of 92 MHz is pulled from the downstream L4T
> kernel.

Thanks for adding this. I assume that this is from an L4T r16 release 
with a v3.1 kernel. I had a quick poke through the kernel sources for 
v3.1 but was unable to see where this is set. Obviously v3.1 did not 
have CCF and so everything seems to be in the arch/arm/mach-tegra 
directory for setting up clocks. Can you point me to the appropriate 
sources so I can ACK this?

Cheers
Jon

-- 
nvpublic

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[PATCH V3 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table Mirza Krak <mirza.krak@gmail.com> - 2016-10-27 16:10 +0200
  Re: [PATCH V3 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table Jon Hunter <jonathanh@nvidia.com> - 2016-11-03 11:10 +0100
    Re: [PATCH V3 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table Mirza Krak <mirza.krak@gmail.com> - 2016-11-03 13:30 +0100
      Re: [PATCH V3 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table Mirza Krak <mirza.krak@gmail.com> - 2016-11-03 13:40 +0100
        Re: [PATCH V3 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table Jon Hunter <jonathanh@nvidia.com> - 2016-11-03 14:50 +0100
  Re: [PATCH V3 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table Jon Hunter <jonathanh@nvidia.com> - 2016-11-03 14:50 +0100

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