Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1513877

[PATCH v2 0/6] pinctrl: aspeed: Fixes for g5, implement remaining pins

Show all headers | View raw

Hi all,

This is v2 of the series implementing the remainder of the pinmux tables for
the AST2400 and AST2500 SoCs. v1 of the series can be found here:

https://lkml.org/lkml/2016/9/27/309

The first patch, "pinctrl-aspeed-g5: Never set SCU90[6]", is another fix that
should be applied for 4.9. Please let me know if I should send such patches
separately, as the series otherwise targets 4.10.

v2 is based on 4.9-rc2 as requested in feedback on v1.

Cheers,

Andrew

Significant changes since v1:

* Fixes from v1 have been applied, so have been dropped for v2
* A new fix has appeared, "pinctrl-aspeed-g5: Never set SCU90[6]", as noted
  above
* New bindings documents for the SoC Display and LPC Host Controllers, driven
  by the patch "pinctrl: aspeed: Read and write bits in LPCHC and GFX
  controllers"
* The v1 patch "pinctrl: aspeed: Enable capture of off-SCU pinmux state" has
  been significantly reworked and is now titled "pinctrl: aspeed: Read and
  write bits in LPCHC and GFX controllers"

Andrew Jeffery (6):
  pinctrl-aspeed-g5: Never set SCU90[6]
  mfd: dt: Add bindings for the Aspeed SoC Display Controller (GFX)
  mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)
  pinctrl: aspeed: Read and write bits in LPCHC and GFX controllers
  pinctrl: aspeed-g4: Add mux configuration for all pins
  pinctrl: aspeed-g5: Add mux configuration for all pins

 .../devicetree/bindings/mfd/aspeed-gfx.txt         |   17 +
 .../devicetree/bindings/mfd/aspeed-lpchc.txt       |   17 +
 .../devicetree/bindings/pinctrl/pinctrl-aspeed.txt |   86 +-
 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c         | 1115 +++++++++++++-
 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c         | 1514 +++++++++++++++++++-
 drivers/pinctrl/aspeed/pinctrl-aspeed.c            |   66 +-
 drivers/pinctrl/aspeed/pinctrl-aspeed.h            |   33 +-
 7 files changed, 2760 insertions(+), 88 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/aspeed-gfx.txt
 create mode 100644 Documentation/devicetree/bindings/mfd/aspeed-lpchc.txt

-- 
2.7.4

Back to linux.kernel | Previous | Next — Next in thread | Find similar | Unroll thread

Thread

[PATCH v2 0/6] pinctrl: aspeed: Fixes for g5, implement remaining pins Andrew Jeffery <andrew@aj.id.au> - 2016-11-02 15:40 +0100
  [PATCH v2 2/6] mfd: dt: Add bindings for the Aspeed SoC Display Controller (GFX) Andrew Jeffery <andrew@aj.id.au> - 2016-11-02 15:40 +0100
    Re: [PATCH v2 2/6] mfd: dt: Add bindings for the Aspeed SoC Display  Controller (GFX) Rob Herring <robh@kernel.org> - 2016-11-09 19:30 +0100
      Re: [PATCH v2 2/6] mfd: dt: Add bindings for the Aspeed SoC Display  Controller (GFX) Joel Stanley <joel@jms.id.au> - 2016-11-10 04:20 +0100
        Re: [PATCH v2 2/6] mfd: dt: Add bindings for the Aspeed SoC Display  Controller (GFX) Rob Herring <robh@kernel.org> - 2016-11-10 18:50 +0100
  [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC) Andrew Jeffery <andrew@aj.id.au> - 2016-11-02 15:50 +0100
    Re: [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host  Controller (LPCHC) Joel Stanley <joel@jms.id.au> - 2016-11-04 00:10 +0100
      Re: [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host  Controller (LPCHC) Andrew Jeffery <andrew@aj.id.au> - 2016-11-04 04:50 +0100
  [PATCH v2 4/6] pinctrl: aspeed: Read and write bits in LPCHC and GFX controllers Andrew Jeffery <andrew@aj.id.au> - 2016-11-02 15:50 +0100
    Re: [PATCH v2 4/6] pinctrl: aspeed: Read and write bits in LPCHC and  GFX controllers Joel Stanley <joel@jms.id.au> - 2016-11-04 00:30 +0100
      Re: [PATCH v2 4/6] pinctrl: aspeed: Read and write bits in LPCHC  and GFX controllers Andrew Jeffery <andrew@aj.id.au> - 2016-11-04 05:10 +0100
    Re: [PATCH v2 4/6] pinctrl: aspeed: Read and write bits in LPCHC and  GFX controllers Rob Herring <robh@kernel.org> - 2016-11-09 19:30 +0100
      Re: [PATCH v2 4/6] pinctrl: aspeed: Read and write bits in LPCHC  and GFX controllers Andrew Jeffery <andrew@aj.id.au> - 2016-11-10 01:00 +0100

csiph-web