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Re: [PATCH 1/8] mtd: nand: sunxi: fix support for 512bytes ECC chunks

From Boris Brezillon <boris.brezillon@free-electrons.com>
Newsgroups linux.kernel
Subject Re: [PATCH 1/8] mtd: nand: sunxi: fix support for 512bytes ECC chunks
Date 2016-10-21 20:00 +0200
Message-ID <suMgT-so-17@gated-at.bofh.it> (permalink)
References <sugJX-50e-3@gated-at.bofh.it> <sugJY-50e-35@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Thu, 20 Oct 2016 10:12:42 +0200
Maxime Ripard <maxime.ripard@free-electrons.com> wrote:

> From: Boris Brezillon <boris.brezillon@free-electrons.com>
> 
> The driver is incorrectly assuming that the ECC block size is always 1k
> which is not always true.
> 
> Also take the other cases into account.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Applied.

> ---
>  drivers/mtd/nand/sunxi_nand.c | 4 ++++
>  1 file changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/sunxi_nand.c
> index 8b8470c4e6d0..e40482a65de6 100644
> --- a/drivers/mtd/nand/sunxi_nand.c
> +++ b/drivers/mtd/nand/sunxi_nand.c
> @@ -145,6 +145,7 @@
>  #define NFC_ECC_PIPELINE	BIT(3)
>  #define NFC_ECC_EXCEPTION	BIT(4)
>  #define NFC_ECC_BLOCK_SIZE_MSK	BIT(5)
> +#define NFC_ECC_BLOCK_512	BIT(5)
>  #define NFC_RANDOM_EN		BIT(9)
>  #define NFC_RANDOM_DIRECTION	BIT(10)
>  #define NFC_ECC_MODE_MSK	GENMASK(15, 12)
> @@ -817,6 +818,9 @@ static void sunxi_nfc_hw_ecc_enable(struct mtd_info *mtd)
>  	ecc_ctl |= NFC_ECC_EN | NFC_ECC_MODE(data->mode) | NFC_ECC_EXCEPTION |
>  		   NFC_ECC_PIPELINE;
>  
> +	if (nand->ecc.size == 512)
> +		ecc_ctl |= NFC_ECC_BLOCK_512;
> +
>  	writel(ecc_ctl, nfc->regs + NFC_REG_ECC_CTL);
>  }
>  

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Thread

[PATCH 0/8] ARM: gr8: Add support for the CHIP Pro Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 10:20 +0200
  [PATCH 3/8] ARM: gr8: Add the UART3 Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 10:20 +0200
    Re: [PATCH 3/8] ARM: gr8: Add the UART3 Chen-Yu Tsai <wens@csie.org> - 2016-10-20 16:10 +0200
      Re: [PATCH 3/8] ARM: gr8: Add the UART3 Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 19:10 +0200
  [PATCH 6/8] ARM: gr8: Add UART2 pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 10:20 +0200
    Re: [PATCH 6/8] ARM: gr8: Add UART2 pins Chen-Yu Tsai <wens@csie.org> - 2016-10-20 16:20 +0200
      Re: [PATCH 6/8] ARM: gr8: Add UART2 pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 19:10 +0200
  [PATCH 8/8] ARM: gr8: Add CHIP Pro support Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 10:20 +0200
    Re: [PATCH 8/8] ARM: gr8: Add CHIP Pro support Chen-Yu Tsai <wens@csie.org> - 2016-10-20 16:30 +0200
      Re: [PATCH 8/8] ARM: gr8: Add CHIP Pro support Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 19:10 +0200
  [PATCH 1/8] mtd: nand: sunxi: fix support for 512bytes ECC chunks Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 10:20 +0200
    Re: [PATCH 1/8] mtd: nand: sunxi: fix support for 512bytes ECC  chunks Boris Brezillon <boris.brezillon@free-electrons.com> - 2016-10-21 20:00 +0200
  [PATCH 2/8] mtd: nand: add support for the TC58NVG2S0H chip Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 10:20 +0200
    Re: [PATCH 2/8] mtd: nand: add support for the TC58NVG2S0H chip Boris Brezillon <boris.brezillon@free-electrons.com> - 2016-10-21 20:00 +0200
  [PATCH 4/8] ARM: gr8: Fix typo in the i2s mclk pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 10:20 +0200
    Re: [PATCH 4/8] ARM: gr8: Fix typo in the i2s mclk pin group Chen-Yu Tsai <wens@csie.org> - 2016-10-20 16:10 +0200
      Re: [PATCH 4/8] ARM: gr8: Fix typo in the i2s mclk pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-20 19:10 +0200

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