Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1498872

[PATCH 1/4] PCI: designware: Fix compiler warning

Show all headers | View raw

Fix the following compilation warning in dw_pcie_readl_unroll()
and dw_pcie_writel_unroll() by just invoking dw_pcie_readl_rc() and
dw_pcie_writel_rc() respectively instead of adding redundant code.

pcie-designware.c: In function 'dw_pcie_readl_unroll':
pcie-designware.c:165:32: warning: passing argument 2 of
 'pp->ops->readl_rc' makes integer from pointer without a cast
 [-Wint-conversion]
   return pp->ops->readl_rc(pp, pp->dbi_base + offset + reg);
                                ^
pcie-designware.c:165:32: note: expected 'u32 {aka unsigned int}' but
 argument is of type 'void *'
pcie-designware.c: In function 'dw_pcie_writel_unroll':
pcie-designware.c:176:31: warning: passing argument 3 of
 'pp->ops->writel_rc' makes integer from pointer without a cast
 [-Wint-conversion]
   pp->ops->writel_rc(pp, val, pp->dbi_base + offset + reg);
                               ^
drivers/pci/host/pcie-designware.c:176:31: note: expected 'u32
 {aka unsigned int}' but argument is of type 'void *'

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 drivers/pci/host/pcie-designware.c |   10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 5ee8772..b8feea4 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -161,10 +161,7 @@ static inline u32 dw_pcie_readl_unroll(struct pcie_port *pp, u32 index, u32 reg)
 {
 	u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
 
-	if (pp->ops->readl_rc)
-		return pp->ops->readl_rc(pp, pp->dbi_base + offset + reg);
-
-	return readl(pp->dbi_base + offset + reg);
+	return dw_pcie_readl_rc(pp, offset + reg);
 }
 
 static inline void dw_pcie_writel_unroll(struct pcie_port *pp, u32 index,
@@ -172,10 +169,7 @@ static inline void dw_pcie_writel_unroll(struct pcie_port *pp, u32 index,
 {
 	u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
 
-	if (pp->ops->writel_rc)
-		pp->ops->writel_rc(pp, val, pp->dbi_base + offset + reg);
-	else
-		writel(val, pp->dbi_base + offset + reg);
+	dw_pcie_writel_rc(pp, offset + reg, val);
 }
 
 static int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
-- 
1.7.9.5

Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread

Thread

[PATCH 0/4] PCI: designware/dra7xx: misc fixes and cleanups Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
  [PATCH 3/4] PCI: dra7xx: Add support to force RC to work in GEN1 mode Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
    Re: [PATCH 3/4] PCI: dra7xx: Add support to force RC to work in GEN1  mode Sekhar Nori <nsekhar@ti.com> - 2016-10-11 18:30 +0200
    Re: [PATCH 3/4] PCI: dra7xx: Add support to force RC to work in GEN1  mode Shawn Lin <shawn.lin@rock-chips.com> - 2016-10-12 06:20 +0200
  [PATCH 4/4] PCI: dra7xx: Enable MSI and legacy interrupts simultaneously Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
  [PATCH 2/4] PCI: dra7xx: simplify the probe code Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
  [PATCH 1/4] PCI: designware: Fix compiler warning Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
    Re: [PATCH 1/4] PCI: designware: Fix compiler warning Bjorn Helgaas <helgaas@kernel.org> - 2016-10-11 16:00 +0200

csiph-web