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[PATCH 4/4] PCI: dra7xx: Enable MSI and legacy interrupts simultaneously

From Kishon Vijay Abraham I <kishon@ti.com>
Newsgroups linux.kernel
Subject [PATCH 4/4] PCI: dra7xx: Enable MSI and legacy interrupts simultaneously
Date 2016-10-11 15:10 +0200
Message-ID <sr4YF-77t-3@gated-at.bofh.it> (permalink)
References <sr4YF-77t-5@gated-at.bofh.it>
Organization linux.* mail to news gateway

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dra7xx driver had a bug in that if CONFIG_PCI_MSI config is enabled,
it doesn't support legacy interrupt. Fix it here so that both MSI and
legacy interrupts can be enabled simultaneously and one of them will
be used based on the connected device.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 drivers/pci/host/pci-dra7xx.c |   32 ++++++++++++++------------------
 1 file changed, 14 insertions(+), 18 deletions(-)

diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c
index 2a669cb..1a68759 100644
--- a/drivers/pci/host/pci-dra7xx.c
+++ b/drivers/pci/host/pci-dra7xx.c
@@ -71,6 +71,7 @@ struct dra7xx_pcie {
 	int			phy_count;	/* DT phy-names count */
 	struct phy		**phy;
 	bool			is_gen1;
+	struct irq_domain	*irq_domain;
 };
 
 #define to_dra7xx_pcie(x)	container_of((x), struct dra7xx_pcie, pp)
@@ -142,13 +143,9 @@ static void dra7xx_pcie_enable_interrupts(struct dra7xx_pcie *dra7xx_pcie)
 	dra7xx_pcie_writel(dra7xx_pcie, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI,
 			   ~LEG_EP_INTERRUPTS & ~MSI);
 
-	if (IS_ENABLED(CONFIG_PCI_MSI))
-		dra7xx_pcie_writel(dra7xx_pcie,
-				   PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI, MSI);
-	else
-		dra7xx_pcie_writel(dra7xx_pcie,
-				   PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI,
-				   LEG_EP_INTERRUPTS);
+	dra7xx_pcie_writel(dra7xx_pcie,
+			   PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI,
+			   MSI | LEG_EP_INTERRUPTS);
 }
 
 static void dra7xx_pcie_host_init(struct pcie_port *pp)
@@ -163,8 +160,7 @@ static void dra7xx_pcie_host_init(struct pcie_port *pp)
 	dw_pcie_setup_rc(pp);
 
 	dra7xx_pcie_establish_link(dra7xx_pcie);
-	if (IS_ENABLED(CONFIG_PCI_MSI))
-		dw_pcie_msi_init(pp);
+	dw_pcie_msi_init(pp);
 	dra7xx_pcie_enable_interrupts(dra7xx_pcie);
 }
 
@@ -189,6 +185,7 @@ static int dra7xx_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
 static int dra7xx_pcie_init_irq_domain(struct pcie_port *pp)
 {
 	struct device *dev = pp->dev;
+	struct dra7xx_pcie *dra7xx_pcie = to_dra7xx_pcie(pp);
 	struct device_node *node = dev->of_node;
 	struct device_node *pcie_intc_node =  of_get_next_child(node, NULL);
 
@@ -197,9 +194,9 @@ static int dra7xx_pcie_init_irq_domain(struct pcie_port *pp)
 		return -ENODEV;
 	}
 
-	pp->irq_domain = irq_domain_add_linear(pcie_intc_node, 4,
-					       &intx_domain_ops, pp);
-	if (!pp->irq_domain) {
+	dra7xx_pcie->irq_domain = irq_domain_add_linear(pcie_intc_node, 4,
+							&intx_domain_ops, pp);
+	if (!dra7xx_pcie->irq_domain) {
 		dev_err(dev, "Failed to get a INTx IRQ domain\n");
 		return -ENODEV;
 	}
@@ -224,7 +221,8 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg)
 	case INTB:
 	case INTC:
 	case INTD:
-		generic_handle_irq(irq_find_mapping(pp->irq_domain, ffs(reg)));
+		generic_handle_irq(irq_find_mapping(dra7xx_pcie->irq_domain,
+				   ffs(reg)));
 		break;
 	}
 
@@ -314,11 +312,9 @@ static int __init dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx_pcie,
 		return ret;
 	}
 
-	if (!IS_ENABLED(CONFIG_PCI_MSI)) {
-		ret = dra7xx_pcie_init_irq_domain(pp);
-		if (ret < 0)
-			return ret;
-	}
+	ret = dra7xx_pcie_init_irq_domain(pp);
+	if (ret < 0)
+		return ret;
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rc_dbics");
 	pp->dbi_base = devm_ioremap(dev, res->start, resource_size(res));
-- 
1.7.9.5

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Thread

[PATCH 0/4] PCI: designware/dra7xx: misc fixes and cleanups Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
  [PATCH 3/4] PCI: dra7xx: Add support to force RC to work in GEN1 mode Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
    Re: [PATCH 3/4] PCI: dra7xx: Add support to force RC to work in GEN1  mode Sekhar Nori <nsekhar@ti.com> - 2016-10-11 18:30 +0200
    Re: [PATCH 3/4] PCI: dra7xx: Add support to force RC to work in GEN1  mode Shawn Lin <shawn.lin@rock-chips.com> - 2016-10-12 06:20 +0200
  [PATCH 4/4] PCI: dra7xx: Enable MSI and legacy interrupts simultaneously Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
  [PATCH 2/4] PCI: dra7xx: simplify the probe code Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
  [PATCH 1/4] PCI: designware: Fix compiler warning Kishon Vijay Abraham I <kishon@ti.com> - 2016-10-11 15:10 +0200
    Re: [PATCH 1/4] PCI: designware: Fix compiler warning Bjorn Helgaas <helgaas@kernel.org> - 2016-10-11 16:00 +0200

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