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Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms

From Robert Jarzmik <robert.jarzmik@free.fr>
Newsgroups linux.kernel
Subject Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms
Date 2016-10-06 08:50 +0200
Message-ID <spaFb-4Sw-3@gated-at.bofh.it> (permalink)
References (1 earlier) <so7q2-2Wv-27@gated-at.bofh.it> <sodF7-6Lm-9@gated-at.bofh.it> <soe8a-7gD-9@gated-at.bofh.it> <soeKR-7tO-3@gated-at.bofh.it> <sogWl-uQ-17@gated-at.bofh.it>
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Robert Jarzmik <robert.jarzmik@free.fr> writes:

> Mark Rutland <mark.rutland@arm.com> writes:
>
>> On Mon, Oct 03, 2016 at 06:11:23PM +0200, Robert Jarzmik wrote:
>>> Mark Rutland <mark.rutland@arm.com> writes:
>>> 
>>> reg-u16-align4 tells that a specific hardware doesn't support 16 bit writes not
>>> being 32 bits aligned, or said differently that a "store" 16 bits wide on an
>>> address of the format 4*n + 2 deserves a special handling in the driver, while a
>>> store 16 bits wide on an address of the format 4*n can follow the simple casual
>>> case.
>>
>> If I've understood correctly, effectively the low 2 address lines to the
>> device are hard-wired to zero, e.g. a 16-bit access to 4*n + 2 would go
>> to 4*n + 0 on the device? Or is the failure case distinct from that?
> It is distinct.
>
> The "awful truth" is that an FPGA lies between the system bus and the
> smc91c111. And this FPGA cannot handle correctly the 4*n + 2 u16 writes.
>
>> Do we have other platforms where similar is true? e.g. u8 accesses
>> requiring 16-bit alignment?
>
> Not really, ie. not with a alignement requirement.
>
> But there are of course these ones are handled by reg-io-width and the
> SMC_USE_xxx_BITS flags as far as I understand it. These cases are when a
> platform declares SMC91X_USE_16BIT or SMC91X_USE_32BIT, but not SMC91X_USE_8BIT,
> which would make me think of :
>  - CONFIG_SH_SH4202_MICRODEV,
>  - CONFIG_M32R
>  - several omap1 boards
>  - 1 sa1100 board
>  - several MMP and realview boards
>
> With all these platforms, each u8 access is replaced with a u16 access and a
> mask / shift + mask.

Or so what should I call this entry if reg-u16-align4 is not a good candidate ?

Cheers.

-- 
Robert

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Thread

[PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Robert Jarzmik <robert.jarzmik@free.fr> - 2016-10-03 11:10 +0200
  Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Jeremy Linton <jeremy.linton@arm.com> - 2016-10-03 17:30 +0200
    Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Robert Jarzmik <robert.jarzmik@free.fr> - 2016-10-03 18:20 +0200
  Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Mark Rutland <mark.rutland@arm.com> - 2016-10-03 17:50 +0200
    Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Robert Jarzmik <robert.jarzmik@free.fr> - 2016-10-03 18:20 +0200
      Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Mark Rutland <mark.rutland@arm.com> - 2016-10-03 19:00 +0200
        Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Robert Jarzmik <robert.jarzmik@free.fr> - 2016-10-03 21:20 +0200
          Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Robert Jarzmik <robert.jarzmik@free.fr> - 2016-10-06 08:50 +0200
            Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Rob Herring <robh@kernel.org> - 2016-10-09 03:40 +0200
    Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Russell King - ARM Linux <linux@armlinux.org.uk> - 2016-10-03 18:20 +0200
      Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Mark Rutland <mark.rutland@arm.com> - 2016-10-03 18:50 +0200
        Re: [PATCH 3/3] net: smsc911x: add u16 workaround for pxa platforms Rob Herring <robh@kernel.org> - 2016-10-09 03:40 +0200

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