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Re: [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR interrupts

From Eric Anholt <eric@anholt.net>
Newsgroups linux.kernel
Subject Re: [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR interrupts
Date 2016-09-29 00:10 +0200
Message-ID <smvd7-4aX-3@gated-at.bofh.it> (permalink)
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Noralf Trønnes <noralf@tronnes.org> writes:

> If an unexpected TXW or RXR interrupt occurs (msg_buf_remaining == 0),
> the driver has no way to fill/drain the FIFO to stop the interrupts.
> In this case the controller has to be disabled and the transfer
> completed to avoid hang.
>
> (CLKT | ERR) and DONE interrupts are completed in their own paths, and
> the controller is disabled in the transfer function after completion.
> Unite the code paths and do disabling inside the interrupt routine.
>
> Clear interrupt status bits in the united completion path instead of
> trying to do it on every interrupt which isn't necessary.
> Only CLKT, ERR and DONE can be cleared that way.
>
> Add the status value to the error value in case of TXW/RXR errors to
> distinguish them from the other S_LEN error.

I was surprised that not writing the TXW/RXR bits on handling their
interrupts was OK, given that we were doing so before, but it's a level
interrupt and those bits are basically ignored on write.

This patch and 3, 4, and 6 are:

Reviewed-by: Eric Anholt <eric@anholt.net>

Patch 5 is:

Acked-by: Eric Anholt <eric@anholt.net>

Note for future debug: The I2C_C_CLEAR on errors will take some time to
resolve -- if you were in non-idle state and I2C_C_READ, it sets an
abort_rx flag and runs through the state machine to send a NACK and a
STOP, I think.  Since we're setting CLEAR without I2CEN, that NACK will
be hanging around queued up for next time we start the engine.

Patch 7 I had questions about but probably will send an ack when you
reply.

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Thread

[PATCH v3 0/7] i2c: bcm2835: Bring in changes from downstream Noralf Trønnes <noralf@tronnes.org> - 2016-09-28 20:00 +0200
  [PATCH v3 5/7] i2c: bcm2835: Add support for Repeated Start Condition Noralf Trønnes <noralf@tronnes.org> - 2016-09-28 20:00 +0200
  [PATCH v3 7/7] i2c: bcm2835: Add support for dynamic clock Noralf Trønnes <noralf@tronnes.org> - 2016-09-28 20:00 +0200
    Re: [PATCH v3 7/7] i2c: bcm2835: Add support for dynamic clock Eric Anholt <eric@anholt.net> - 2016-09-28 23:30 +0200
      Re: [PATCH v3 7/7] i2c: bcm2835: Add support for dynamic clock Noralf Trønnes <noralf@tronnes.org> - 2016-09-29 00:20 +0200
      Re: [PATCH v3 7/7] i2c: bcm2835: Add support for dynamic clock Martin Sperl <kernel@martin.sperl.org> - 2016-09-29 10:10 +0200
  [PATCH v3 6/7] i2c: bcm2835: Support i2c-dev ioctl I2C_TIMEOUT Noralf Trønnes <noralf@tronnes.org> - 2016-09-28 20:00 +0200
  [PATCH v3 1/7] i2c: bcm2835: Fix hang for writing messages larger than 16 bytes Noralf Trønnes <noralf@tronnes.org> - 2016-09-28 20:00 +0200
  [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR interrupts Noralf Trønnes <noralf@tronnes.org> - 2016-09-28 20:00 +0200
    Re: [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR interrupts Eric Anholt <eric@anholt.net> - 2016-09-29 00:10 +0200
      Re: [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR  interrupts Noralf Trønnes <noralf@tronnes.org> - 2016-09-29 00:30 +0200
        Re: [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR  interrupts Stefan Wahren <stefan.wahren@i2se.com> - 2016-09-29 07:40 +0200
          Re: [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR  interrupts Noralf Trønnes <noralf@tronnes.org> - 2016-10-02 16:30 +0200
            Re: [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR interrupts Eric Anholt <eric@anholt.net> - 2016-10-03 21:00 +0200
        Re: [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR interrupts Eric Anholt <eric@anholt.net> - 2016-10-03 21:50 +0200
          Re: [PATCH v3 2/7] i2c: bcm2835: Protect against unexpected TXW/RXR  interrupts Noralf Trønnes <noralf@tronnes.org> - 2016-10-04 21:30 +0200

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