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Groups > linux.kernel > #1490366
| From | Mika Westerberg <mika.westerberg@linux.intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v3 2/3] pinctrl: cherryview: Do not add all southwest and north GPIOs to IRQ domain |
| Date | 2016-09-23 20:10 +0200 |
| Message-ID | <skD58-7dw-27@gated-at.bofh.it> (permalink) |
| References | <sjsbL-2RR-7@gated-at.bofh.it> <sjsbL-2RR-9@gated-at.bofh.it> <skyf7-3M0-5@gated-at.bofh.it> |
| Organization | Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo |
On Fri, Sep 23, 2016 at 02:58:47PM +0200, Linus Walleij wrote: > On Tue, Sep 20, 2016 at 2:15 PM, Mika Westerberg > <mika.westerberg@linux.intel.com> wrote: > > > It turns out that for north and southwest communities, they can only > > generate GPIO interrupts for lower 8 interrupts (IntSel value). The upper > > part (8-15) can only generate GPEs (General Purpose Events). > > > > Now the reason why EC events such as pressing hotkeys does not work if we > > mask all the interrupts is that in order to generate either interrupts or > > GPEs the INTMASK register must have that particular interrupt unmasked. In > > case of GPEs the CPU does not trigger normal interrupt (and thus the GPIO > > driver does not see it) but instead it causes SCI (System Control > > Interrupt) to be triggered with the GPE in question set. > > > > To make this all work as expected we only add those GPIOs to the IRQ domain > > that can actually generate interrupts (IntSel value 0-7) and skip others. > > > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > > Patch applied, had to merge in the recent fix from -rc6 first but > after that it applied cleanly. Check the result please! Looks good, thanks.
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[PATCH v3 2/3] pinctrl: cherryview: Do not add all southwest and north GPIOs to IRQ domain Mika Westerberg <mika.westerberg@linux.intel.com> - 2016-09-20 14:20 +0200
Re: [PATCH v3 2/3] pinctrl: cherryview: Do not add all southwest and north GPIOs to IRQ domain Linus Walleij <linus.walleij@linaro.org> - 2016-09-23 15:00 +0200
Re: [PATCH v3 2/3] pinctrl: cherryview: Do not add all southwest and north GPIOs to IRQ domain Mika Westerberg <mika.westerberg@linux.intel.com> - 2016-09-23 20:10 +0200
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