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Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts support

From Alexandre Torgue <alexandre.torgue@st.com>
Newsgroups linux.kernel
Subject Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts support
Date 2016-09-20 14:50 +0200
Message-ID <sjsEN-31h-3@gated-at.bofh.it> (permalink)
References (5 earlier) <shi6R-1iq-3@gated-at.bofh.it> <shizT-1s7-5@gated-at.bofh.it> <shiJA-1vt-3@gated-at.bofh.it> <sjpQB-1av-3@gated-at.bofh.it> <sjq0n-1dP-13@gated-at.bofh.it>
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Thomas,

On 09/20/2016 11:51 AM, Thomas Gleixner wrote:
> On Tue, 20 Sep 2016, Alexandre Torgue wrote:
>>> On 09/14/2016 03:34 PM, Thomas Gleixner wrote:
>>>> Well, you just used some function in some context which is not
>>>> relevant to
>>>> the normal operation. So adding that mask() is just paranoia for no
>>>> value.
>>>
>> A gentle reminder ping...
>> If ".free" callback is not relevant then I 'll remove it from exti domain.

Sorry for discussing about the same thing again (and again) but I just 
want to be sure before sending a new version. As you know I have 2 
domains: EXTI domain (parent) and stm32-pinctrl-bank domain (child one).

There does it make sens to have ".free" callbacks defined in both domain 
(actually if I define one for the child domain I have to define also 
".free" callback for parent domain (EXTI) as it is hierarchical) ?
If ".free" have no chance to be called then I will send a new version by 
removing .free callbacks (in both domain).

Regards
Alex

>
> I was not talking about the .free callback in general. I was talking about
> the masking. But yes, if the thing is otherwise a NOOP, then you can spare
> it completely.
>
> Thanks,
>
> 	tglx
>

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Thread

[PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts support Alexandre TORGUE <alexandre.torgue@st.com> - 2016-09-09 16:50 +0200
  Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Marc Zyngier <marc.zyngier@arm.com> - 2016-09-13 10:20 +0200
  Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Thomas Gleixner <tglx@linutronix.de> - 2016-09-13 17:30 +0200
    Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Alexandre Torgue <alexandre.torgue@st.com> - 2016-09-13 18:40 +0200
      Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Thomas Gleixner <tglx@linutronix.de> - 2016-09-14 11:30 +0200
        Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Alexandre Torgue <alexandre.torgue@st.com> - 2016-09-14 15:10 +0200
          Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Thomas Gleixner <tglx@linutronix.de> - 2016-09-14 15:40 +0200
            Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Alexandre Torgue <alexandre.torgue@st.com> - 2016-09-14 15:50 +0200
              Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Alexandre Torgue <alexandre.torgue@st.com> - 2016-09-20 11:50 +0200
                Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Thomas Gleixner <tglx@linutronix.de> - 2016-09-20 12:00 +0200
                Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Alexandre Torgue <alexandre.torgue@st.com> - 2016-09-20 14:50 +0200
                Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Thomas Gleixner <tglx@linutronix.de> - 2016-09-20 14:50 +0200
                Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Alexandre Torgue <alexandre.torgue@st.com> - 2016-09-20 15:40 +0200
                Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Thomas Gleixner <tglx@linutronix.de> - 2016-09-20 16:10 +0200
                Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Alexandre Torgue <alexandre.torgue@st.com> - 2016-09-20 17:30 +0200
                Re: [PATCH v5 2/9] drivers: irqchip: Add STM32 external interrupts  support Thomas Gleixner <tglx@linutronix.de> - 2016-09-20 18:10 +0200

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