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Groups > linux.kernel > #1478370
| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v3 5/8] pinctrl: Add core support for Aspeed SoCs |
| Date | 2016-09-07 17:00 +0200 |
| Message-ID | <seMuu-13P-41@gated-at.bofh.it> (permalink) |
| References | <sbM7D-1Ul-3@gated-at.bofh.it> <sbM7D-1Ul-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, Aug 30, 2016 at 9:54 AM, Andrew Jeffery <andrew@aj.id.au> wrote: > The Aspeed SoCs typically provide more than 200 pins for GPIO and other > functions. The signal enabled on a pin is determined on a priority > basis, where a given pin can provide a number of different signal types. > > In addition to the priority levels, the Aspeed pin controllers describe > the signal active on a pin by compound logical expressions involving > multiple operators, registers and bits. Some difficulty arises as a > pin's function bit masks for each priority level are frequently not the > same (i.e. we cannot just flip a bit to change from a high to low > priority signal), or even in the same register(s). Some configuration > bits affect multiple pins, while in other cases the signals for a bus > must each be enabled individually. > > Together, these features give rise to some complexity in the > implementation. A more complete description of the complexities is > provided in the associated header file. > > The patch doesn't implement pinctrl/pinmux/pinconf for any particular > Aspeed SoC, rather it adds the framework for defining pinmux > configurations. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > Reviewed-by: Joel Stanley <joel@jms.id.au> Patch applied! It's not getting better than this through iteration, it is better to get the system up and develop inside the mainline tree from now on. > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1027,6 +1027,7 @@ S: Maintained > F: arch/arm/mach-aspeed/ > F: arch/arm/boot/dts/aspeed-* > F: drivers/*/*aspeed* > +F: drivers/pinctrl/aspeed/ > F: Documentation/devicetree/bindings/*/*aspeed* I dropped this hunk of the patch, because: (A) I didn't merge the glob patch and (B) the glob covers this driver too, it is a tautology/truism Yours, Linus Walleij
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[PATCH v3 0/8] aspeed: Add pinctrl and gpio drivers Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
[PATCH v3 7/8] pinctrl: Add pinctrl-aspeed-g5 driver Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 7/8] pinctrl: Add pinctrl-aspeed-g5 driver Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 17:00 +0200
[PATCH v3 1/8] MAINTAINERS: Add glob for Aspeed devicetree bindings Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 1/8] MAINTAINERS: Add glob for Aspeed devicetree bindings Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 16:40 +0200
Re: [PATCH v3 1/8] MAINTAINERS: Add glob for Aspeed devicetree bindings Arnd Bergmann <arnd@arndb.de> - 2016-09-07 16:50 +0200
[PATCH v3 4/8] gpio: dt-bindings: Add documentation for Aspeed GPIO controllers Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 4/8] gpio: dt-bindings: Add documentation for Aspeed GPIO controllers Rob Herring <robh@kernel.org> - 2016-09-02 17:10 +0200
Re: [PATCH v3 4/8] gpio: dt-bindings: Add documentation for Aspeed GPIO controllers Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 16:50 +0200
Re: [PATCH v3 4/8] gpio: dt-bindings: Add documentation for Aspeed GPIO controllers Andrew Jeffery <andrew@aj.id.au> - 2016-09-08 03:20 +0200
[PATCH v3 3/8] pinctrl: dt-bindings: Add documentation for Aspeed pin controllers Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 3/8] pinctrl: dt-bindings: Add documentation for Aspeed pin controllers Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 16:50 +0200
[PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 16:40 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Lee Jones <lee.jones@linaro.org> - 2016-09-07 18:30 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Andrew Jeffery <andrew@aj.id.au> - 2016-09-08 03:10 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Andrew Jeffery <andrew@aj.id.au> - 2016-09-08 03:10 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Lee Jones <lee.jones@linaro.org> - 2016-09-08 09:10 +0200
Re: [PATCH v3 5/8] pinctrl: Add core support for Aspeed SoCs Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 17:00 +0200
Re: [PATCH v3 5/8] pinctrl: Add core support for Aspeed SoCs Andrew Jeffery <andrew@aj.id.au> - 2016-09-08 06:00 +0200
Re: [PATCH v3 6/8] pinctrl: Add pinctrl-aspeed-g4 driver Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 17:00 +0200
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